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review.evervolv.com / android_kernel_oneplus_msm8996 / a745f039b901b43937f61f149ad9cee2796ed299 / . / arch / blackfin / mach-common / arch_checks.c
blob: d8643fdd0fcf1d9ccc7812c7a46c9fd822d08213 [file] [log] [blame]
Robin Getzf16295e2007-08-03 18:07:17 +0800[diff] [blame]1/*
Robin Getz96f10502009-09-24 14:11:24 +0000[diff] [blame]2 * Do some checking to make sure things are OK
Robin Getzf16295e2007-08-03 18:07:17 +0800[diff] [blame]3 *
Mike Frysinger1ed181f2010-05-27 22:33:46 +0000[diff] [blame]4 * Copyright 2007-2010 Analog Devices Inc.
Robin Getzf16295e2007-08-03 18:07:17 +0800[diff] [blame]5 *
Robin Getz96f10502009-09-24 14:11:24 +0000[diff] [blame]6 * Licensed under the GPL-2 or later.
Robin Getzf16295e2007-08-03 18:07:17 +0800[diff] [blame]7 */
8
Mike Frysinger13752042008-08-06 17:10:57 +0800[diff] [blame]9#include <asm/fixed_code.h>
Bryan Wu639f6572008-08-27 10:51:02 +0800[diff] [blame]10#include <mach/anomaly.h>
11#include <asm/clocks.h>
Robin Getzf16295e2007-08-03 18:07:17 +0800[diff] [blame]12
13#ifdef CONFIG_BFIN_KERNEL_CLOCK
14
15# if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ)
16# error "VCO selected is more than maximum value. Please change the VCO multipler"
17# endif
18
19# if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ)
20# error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier"
21# endif
22
23# if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ)
24# error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"
25# endif
26
27# if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ)
28# error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK"
29# endif
30
31# if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ)
32# error "Please select sclk less than cclk"
33# endif
34
35#endif /* CONFIG_BFIN_KERNEL_CLOCK */
Mike Frysinger13752042008-08-06 17:10:57 +0800[diff] [blame]36
37#if CONFIG_BOOT_LOAD < FIXED_CODE_END
38# error "The kernel load address must be after the fixed code section"
39#endif
40
41#if (CONFIG_BOOT_LOAD & 0x3)
42# error "The kernel load address must be 4 byte aligned"
43#endif
Mike Frysingerf7e989a2009-03-05 17:33:36 +0800[diff] [blame]44
45/* The entire kernel must be able to make a 24bit pcrel call to start of L1 */
46#if ((0xffffffff - L1_CODE_START + 1) + CONFIG_BOOT_LOAD) > 0x1000000
47# error "The kernel load address is too high; keep it below 10meg for safety"
48#endif
Robin Getz000495222009-03-05 18:18:49 +0800[diff] [blame]49
Mike Frysinger1ed181f2010-05-27 22:33:46 +0000[diff] [blame]50#if ANOMALY_05000263 && defined(CONFIG_MPU)
51# error the MPU will not function safely while Anomaly 05000263 applies
52#endif
53
Mike Frysinger357fd372009-03-06 00:24:01 +0800[diff] [blame]54#if ANOMALY_05000448
55# error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
Robin Getz000495222009-03-05 18:18:49 +0800[diff] [blame]56#endif
Graf Yang5ba76672009-05-07 04:09:15 +0000[diff] [blame]57
58/* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */
59#if ANOMALY_05000220 && \
Mike Frysingera2ca78c2009-11-03 02:57:45 +0000[diff] [blame]60 (defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK))
Mike Frysinger5369fba2010-05-27 22:40:26 +0000[diff] [blame]61# error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory"
Mike Frysingera2ca78c2009-11-03 02:57:45 +0000[diff] [blame]62#endif
Mike Frysinger74181292010-05-27 22:46:46 +0000[diff] [blame]63
Mike Frysinger820b1272011-02-02 22:31:42 -0500[diff] [blame]64#if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1)
Mike Frysinger74181292010-05-27 22:46:46 +0000[diff] [blame]65# error You need IFLUSH in L1 inst while Anomaly 05000491 applies
66#endif