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Mark Brown3cc72982012-06-19 16:31:53 +01001/*
2 * Platform data for Arizona devices
3 *
4 * Copyright 2012 Wolfson Microelectronics. PLC.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef _ARIZONA_PDATA_H
12#define _ARIZONA_PDATA_H
13
14#define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */
15#define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */
16#define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */
17#define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */
18#define ARIZONA_GPN_PU 0x4000 /* GPN_PU */
19#define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */
20#define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */
21#define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */
22#define ARIZONA_GPN_PD 0x2000 /* GPN_PD */
23#define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */
24#define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */
25#define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */
26#define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */
27#define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */
28#define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */
29#define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */
30#define ARIZONA_GPN_POL 0x0400 /* GPN_POL */
31#define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */
32#define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */
33#define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */
34#define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */
35#define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */
36#define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */
37#define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */
38#define ARIZONA_GPN_DB 0x0100 /* GPN_DB */
39#define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */
40#define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */
41#define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */
42#define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */
43#define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */
44#define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */
45
46#define ARIZONA_MAX_GPIO 5
47
48#define ARIZONA_32KZ_MCLK1 1
49#define ARIZONA_32KZ_MCLK2 2
50#define ARIZONA_32KZ_NONE 3
51
Mark Browne102bef2012-07-10 12:37:58 +010052#define ARIZONA_MAX_INPUT 4
Mark Brown3cc72982012-06-19 16:31:53 +010053
54#define ARIZONA_DMIC_MICVDD 0
55#define ARIZONA_DMIC_MICBIAS1 1
56#define ARIZONA_DMIC_MICBIAS2 2
57#define ARIZONA_DMIC_MICBIAS3 3
58
Mark Brown3d91f822013-01-29 00:47:37 +080059#define ARIZONA_MAX_MICBIAS 3
60
Mark Brown3cc72982012-06-19 16:31:53 +010061#define ARIZONA_INMODE_DIFF 0
62#define ARIZONA_INMODE_SE 1
63#define ARIZONA_INMODE_DMIC 2
64
Mark Browne102bef2012-07-10 12:37:58 +010065#define ARIZONA_MAX_OUTPUT 6
Mark Brown3cc72982012-06-19 16:31:53 +010066
Mark Brownc94aa302013-01-17 16:35:14 +090067#define ARIZONA_MAX_AIF 3
68
Mark Brown9dd555e2012-11-26 21:17:21 +000069#define ARIZONA_HAP_ACT_ERM 0
70#define ARIZONA_HAP_ACT_LRA 2
71
Mark Brown2a51da02012-07-09 19:33:14 +010072#define ARIZONA_MAX_PDM_SPK 2
Mark Brown3cc72982012-06-19 16:31:53 +010073
74struct regulator_init_data;
75
Mark Brown3d91f822013-01-29 00:47:37 +080076struct arizona_micbias {
77 int mV; /** Regulated voltage */
78 unsigned int ext_cap:1; /** External capacitor fitted */
79 unsigned int discharge:1; /** Actively discharge */
80 unsigned int fast_start:1; /** Enable aggressive startup ramp rate */
81};
82
Mark Brown3cc72982012-06-19 16:31:53 +010083struct arizona_micd_config {
84 unsigned int src;
85 unsigned int bias;
86 bool gpio;
87};
88
89struct arizona_pdata {
90 int reset; /** GPIO controlling /RESET, if any */
91 int ldoena; /** GPIO controlling LODENA, if any */
92
93 /** Regulator configuration for MICVDD */
94 struct regulator_init_data *micvdd;
95
96 /** Regulator configuration for LDO1 */
97 struct regulator_init_data *ldo1;
98
99 /** If a direct 32kHz clock is provided on an MCLK specify it here */
100 int clk32k_src;
101
102 bool irq_active_high; /** IRQ polarity */
103
104 /* Base GPIO */
105 int gpio_base;
106
107 /** Pin state for GPIO pins */
108 int gpio_defaults[ARIZONA_MAX_GPIO];
109
Mark Brownc94aa302013-01-17 16:35:14 +0900110 /**
111 * Maximum number of channels clocks will be generated for,
112 * useful for systems where and I2S bus with multiple data
113 * lines is mastered.
114 */
115 int max_channels_clocked[ARIZONA_MAX_AIF];
116
Mark Brown92a49872013-01-11 08:55:39 +0900117 /** GPIO5 is used for jack detection */
118 bool jd_gpio5;
119
Mark Browndd235ee2013-01-11 08:55:51 +0900120 /** Use the headphone detect circuit to identify the accessory */
121 bool hpdet_acc_id;
122
Mark Brown1eda6aa2013-01-11 08:55:54 +0900123 /** GPIO used for mic isolation with HPDET */
124 int hpdet_id_gpio;
125
Mark Brown3cc72982012-06-19 16:31:53 +0100126 /** GPIO for mic detection polarity */
127 int micd_pol_gpio;
128
Mark Brownb17e5462013-01-11 08:55:24 +0900129 /** Mic detect ramp rate */
130 int micd_bias_start_time;
131
Mark Brown2e033db2013-01-21 17:36:33 +0900132 /** Mic detect sample rate */
133 int micd_rate;
134
135 /** Mic detect debounce level */
136 int micd_dbtime;
137
Mark Brownbbbd46e2013-01-10 19:38:43 +0000138 /** Force MICBIAS on for mic detect */
139 bool micd_force_micbias;
140
Mark Brown3cc72982012-06-19 16:31:53 +0100141 /** Headset polarity configurations */
142 struct arizona_micd_config *micd_configs;
143 int num_micd_configs;
144
145 /** Reference voltage for DMIC inputs */
146 int dmic_ref[ARIZONA_MAX_INPUT];
147
Mark Brown3d91f822013-01-29 00:47:37 +0800148 /** MICBIAS configurations */
149 struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
150
Mark Brown3cc72982012-06-19 16:31:53 +0100151 /** Mode of input structures */
152 int inmode[ARIZONA_MAX_INPUT];
153
154 /** Mode for outputs */
155 bool out_mono[ARIZONA_MAX_OUTPUT];
156
157 /** PDM speaker mute setting */
158 unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
159
160 /** PDM speaker format */
161 unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
Mark Brown9dd555e2012-11-26 21:17:21 +0000162
163 /** Haptic actuator type */
164 unsigned int hap_act;
Mark Brown3cc72982012-06-19 16:31:53 +0100165};
166
167#endif