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Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/sram.c
3 *
4 * OMAP SRAM detection and management
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
Santosh Shilimkar44169072009-05-28 14:16:04 -07009 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030016#undef DEBUG
Tony Lindgren92105bb2005-09-07 17:20:26 +010017
Tony Lindgren92105bb2005-09-07 17:20:26 +010018#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010021#include <linux/io.h>
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -070022#include <linux/omapfb.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010023
Tony Lindgren53d9cc72006-02-08 22:06:45 +000024#include <asm/tlb.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010025#include <asm/cacheflush.h>
26
Tony Lindgren670c1042006-04-02 17:46:25 +010027#include <asm/mach/map.h>
28
Tony Lindgrence491cf2009-10-20 09:40:47 -070029#include <plat/sram.h>
30#include <plat/board.h>
31#include <plat/cpu.h>
Tomi Valkeinenafedec12009-08-07 12:01:55 +030032#include <plat/vram.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010033
Tony Lindgrence491cf2009-10-20 09:40:47 -070034#include <plat/control.h>
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -070035#include "sram.h"
36#include "fb.h"
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030037
38#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
39# include "../mach-omap2/prm.h"
40# include "../mach-omap2/cm.h"
41# include "../mach-omap2/sdrc.h"
42#endif
43
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000044#define OMAP1_SRAM_PA 0x20000000
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030045#define OMAP1_SRAM_VA VMALLOC_END
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000046#define OMAP2_SRAM_PA 0x40200000
Tony Lindgren670c1042006-04-02 17:46:25 +010047#define OMAP2_SRAM_PUB_PA 0x4020f800
Santosh Shilimkare49b8242009-10-19 17:25:53 -070048#define OMAP2_SRAM_VA 0xfe400000
Mans Rullgarde85c2052009-05-25 11:08:41 -070049#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030050#define OMAP3_SRAM_PA 0x40200000
Santosh Shilimkare49b8242009-10-19 17:25:53 -070051#define OMAP3_SRAM_VA 0xfe400000
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030052#define OMAP3_SRAM_PUB_PA 0x40208000
Janboe Ye370bc1f2009-08-10 14:49:50 +030053#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
Santosh Shilimkara7c3ae22009-12-11 16:16:35 -080054#define OMAP4_SRAM_PA 0x40300000
55#define OMAP4_SRAM_VA 0xfe400000
56#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
57#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000058
Vikram Panditaf47d8c62010-09-16 18:19:25 +053059#if defined(CONFIG_ARCH_OMAP2PLUS)
Tony Lindgren670c1042006-04-02 17:46:25 +010060#define SRAM_BOOTLOADER_SZ 0x00
61#else
Tony Lindgren92105bb2005-09-07 17:20:26 +010062#define SRAM_BOOTLOADER_SZ 0x80
Tony Lindgren670c1042006-04-02 17:46:25 +010063#endif
64
Santosh Shilimkar233fd642009-10-19 15:25:31 -070065#define OMAP24XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68005048)
66#define OMAP24XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68005050)
67#define OMAP24XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68005058)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030068
Santosh Shilimkar233fd642009-10-19 15:25:31 -070069#define OMAP34XX_VA_REQINFOPERM0 OMAP2_L3_IO_ADDRESS(0x68012848)
70#define OMAP34XX_VA_READPERM0 OMAP2_L3_IO_ADDRESS(0x68012850)
71#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
72#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
73#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
74#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030075
Tony Lindgren670c1042006-04-02 17:46:25 +010076#define GP_DEVICE 0x300
Tony Lindgren670c1042006-04-02 17:46:25 +010077
78#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
Tony Lindgren92105bb2005-09-07 17:20:26 +010079
Tony Lindgrenc40fae952006-12-07 13:58:10 -080080static unsigned long omap_sram_start;
Tony Lindgren92105bb2005-09-07 17:20:26 +010081static unsigned long omap_sram_base;
82static unsigned long omap_sram_size;
83static unsigned long omap_sram_ceil;
84
Imre Deakb7cc6d42007-03-06 03:16:36 -080085/*
86 * Depending on the target RAMFS firewall setup, the public usable amount of
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010087 * SRAM varies. The default accessible size for all device types is 2k. A GP
88 * device allows ARM11 but not other initiators for full size. This
Tony Lindgren670c1042006-04-02 17:46:25 +010089 * functionality seems ok until some nice security API happens.
90 */
91static int is_sram_locked(void)
92{
Vikram Pandita2a277532010-09-16 18:19:24 +053093 if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010094 /* RAMFW: R/W access to all initiators for all qualifier sets */
Tony Lindgren670c1042006-04-02 17:46:25 +010095 if (cpu_is_omap242x()) {
Tony Lindgrenc2d43e32008-07-03 12:24:38 +030096 __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
97 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
98 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
99 }
100 if (cpu_is_omap34xx()) {
101 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
102 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
103 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
104 __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
105 __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
Tony Lindgren670c1042006-04-02 17:46:25 +0100106 }
107 return 0;
108 } else
109 return 1; /* assume locked with no PPA or security driver */
110}
111
Tony Lindgren92105bb2005-09-07 17:20:26 +0100112/*
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000113 * The amount of SRAM depends on the core type.
Tony Lindgren92105bb2005-09-07 17:20:26 +0100114 * Note that we cannot try to test for SRAM here because writes
115 * to secure SRAM will hang the system. Also the SRAM is not
116 * yet mapped at this point.
117 */
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700118static void __init omap_detect_sram(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100119{
Imre Deakb7cc6d42007-03-06 03:16:36 -0800120 unsigned long reserved;
Tony Lindgren670c1042006-04-02 17:46:25 +0100121
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300122 if (cpu_class_is_omap2()) {
Tony Lindgren670c1042006-04-02 17:46:25 +0100123 if (is_sram_locked()) {
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300124 if (cpu_is_omap34xx()) {
125 omap_sram_base = OMAP3_SRAM_PUB_VA;
126 omap_sram_start = OMAP3_SRAM_PUB_PA;
Tero Kristo5b0acc52009-06-23 13:30:23 +0300127 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
128 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
129 omap_sram_size = 0x7000; /* 28K */
130 } else {
131 omap_sram_size = 0x8000; /* 32K */
132 }
Santosh Shilimkara7c3ae22009-12-11 16:16:35 -0800133 } else if (cpu_is_omap44xx()) {
134 omap_sram_base = OMAP4_SRAM_PUB_VA;
135 omap_sram_start = OMAP4_SRAM_PUB_PA;
136 omap_sram_size = 0xa000; /* 40K */
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300137 } else {
138 omap_sram_base = OMAP2_SRAM_PUB_VA;
139 omap_sram_start = OMAP2_SRAM_PUB_PA;
140 omap_sram_size = 0x800; /* 2K */
141 }
Tony Lindgren670c1042006-04-02 17:46:25 +0100142 } else {
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300143 if (cpu_is_omap34xx()) {
144 omap_sram_base = OMAP3_SRAM_VA;
145 omap_sram_start = OMAP3_SRAM_PA;
Tony Lindgren670c1042006-04-02 17:46:25 +0100146 omap_sram_size = 0x10000; /* 64K */
Santosh Shilimkar44169072009-05-28 14:16:04 -0700147 } else if (cpu_is_omap44xx()) {
148 omap_sram_base = OMAP4_SRAM_VA;
149 omap_sram_start = OMAP4_SRAM_PA;
Santosh Shilimkara7c3ae22009-12-11 16:16:35 -0800150 omap_sram_size = 0xe000; /* 56K */
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300151 } else {
152 omap_sram_base = OMAP2_SRAM_VA;
153 omap_sram_start = OMAP2_SRAM_PA;
154 if (cpu_is_omap242x())
155 omap_sram_size = 0xa0000; /* 640K */
156 else if (cpu_is_omap243x())
157 omap_sram_size = 0x10000; /* 64K */
158 }
Tony Lindgren670c1042006-04-02 17:46:25 +0100159 }
160 } else {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000161 omap_sram_base = OMAP1_SRAM_VA;
Tony Lindgrenc40fae952006-12-07 13:58:10 -0800162 omap_sram_start = OMAP1_SRAM_PA;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100163
Zebediah C. McClure557096f2009-03-23 18:07:44 -0700164 if (cpu_is_omap7xx())
Tony Lindgren670c1042006-04-02 17:46:25 +0100165 omap_sram_size = 0x32000; /* 200K */
166 else if (cpu_is_omap15xx())
167 omap_sram_size = 0x30000; /* 192K */
168 else if (cpu_is_omap1610() || cpu_is_omap1621() ||
169 cpu_is_omap1710())
170 omap_sram_size = 0x4000; /* 16K */
171 else if (cpu_is_omap1611())
172 omap_sram_size = 0x3e800; /* 250K */
173 else {
174 printk(KERN_ERR "Could not detect SRAM size\n");
175 omap_sram_size = 0x4000;
176 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100177 }
Imre Deakb7cc6d42007-03-06 03:16:36 -0800178 reserved = omapfb_reserve_sram(omap_sram_start, omap_sram_base,
179 omap_sram_size,
180 omap_sram_start + SRAM_BOOTLOADER_SZ,
181 omap_sram_size - SRAM_BOOTLOADER_SZ);
182 omap_sram_size -= reserved;
Tomi Valkeinenafedec12009-08-07 12:01:55 +0300183
184 reserved = omap_vram_reserve_sram(omap_sram_start, omap_sram_base,
185 omap_sram_size,
186 omap_sram_start + SRAM_BOOTLOADER_SZ,
187 omap_sram_size - SRAM_BOOTLOADER_SZ);
188 omap_sram_size -= reserved;
189
Tony Lindgren92105bb2005-09-07 17:20:26 +0100190 omap_sram_ceil = omap_sram_base + omap_sram_size;
191}
192
193static struct map_desc omap_sram_io_desc[] __initdata = {
Deepak Saxena9fe133b2005-10-28 15:19:00 +0100194 { /* .length gets filled in at runtime */
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000195 .virtual = OMAP1_SRAM_VA,
196 .pfn = __phys_to_pfn(OMAP1_SRAM_PA),
Tony Lindgrence2deca2006-06-26 16:16:24 -0700197 .type = MT_MEMORY
Deepak Saxena9fe133b2005-10-28 15:19:00 +0100198 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100199};
200
201/*
Tony Lindgrence2deca2006-06-26 16:16:24 -0700202 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
Tony Lindgren92105bb2005-09-07 17:20:26 +0100203 */
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700204static void __init omap_map_sram(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100205{
Tony Lindgren670c1042006-04-02 17:46:25 +0100206 unsigned long base;
207
Tony Lindgren92105bb2005-09-07 17:20:26 +0100208 if (omap_sram_size == 0)
209 return;
210
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000211 if (cpu_is_omap24xx()) {
212 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
Tony Lindgren670c1042006-04-02 17:46:25 +0100213
Kevin Hilmand1284b52006-09-25 12:41:24 +0300214 base = OMAP2_SRAM_PA;
Tony Lindgren670c1042006-04-02 17:46:25 +0100215 base = ROUND_DOWN(base, PAGE_SIZE);
216 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000217 }
218
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300219 if (cpu_is_omap34xx()) {
220 omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
221 base = OMAP3_SRAM_PA;
222 base = ROUND_DOWN(base, PAGE_SIZE);
223 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
Paul Walmsleyd9295742009-05-12 17:27:09 -0600224
225 /*
226 * SRAM must be marked as non-cached on OMAP3 since the
227 * CORE DPLL M2 divider change code (in SRAM) runs with the
228 * SDRAM controller disabled, and if it is marked cached,
229 * the ARM may attempt to write cache lines back to SDRAM
230 * which will cause the system to hang.
231 */
232 omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED;
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300233 }
234
Santosh Shilimkar44169072009-05-28 14:16:04 -0700235 if (cpu_is_omap44xx()) {
236 omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
237 base = OMAP4_SRAM_PA;
238 base = ROUND_DOWN(base, PAGE_SIZE);
239 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
240 }
Tony Lindgrence2deca2006-06-26 16:16:24 -0700241 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
Tony Lindgren92105bb2005-09-07 17:20:26 +0100242 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
243
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000244 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
Tony Lindgren670c1042006-04-02 17:46:25 +0100245 __pfn_to_phys(omap_sram_io_desc[0].pfn),
246 omap_sram_io_desc[0].virtual,
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000247 omap_sram_io_desc[0].length);
248
Tony Lindgren92105bb2005-09-07 17:20:26 +0100249 /*
Tony Lindgren53d9cc72006-02-08 22:06:45 +0000250 * Normally devicemaps_init() would flush caches and tlb after
251 * mdesc->map_io(), but since we're called from map_io(), we
252 * must do it here.
253 */
254 local_flush_tlb_all();
255 flush_cache_all();
256
257 /*
Tony Lindgren92105bb2005-09-07 17:20:26 +0100258 * Looks like we need to preserve some bootloader code at the
259 * beginning of SRAM for jumping to flash for reboot to work...
260 */
261 memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
262 omap_sram_size - SRAM_BOOTLOADER_SZ);
263}
264
Tony Lindgren92105bb2005-09-07 17:20:26 +0100265void * omap_sram_push(void * start, unsigned long size)
266{
267 if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
268 printk(KERN_ERR "Not enough space in SRAM\n");
269 return NULL;
270 }
Tony Lindgren670c1042006-04-02 17:46:25 +0100271
Tony Lindgren92105bb2005-09-07 17:20:26 +0100272 omap_sram_ceil -= size;
Tony Lindgren670c1042006-04-02 17:46:25 +0100273 omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
Tony Lindgren92105bb2005-09-07 17:20:26 +0100274 memcpy((void *)omap_sram_ceil, start, size);
ye janboe913b1432009-10-05 13:31:44 -0700275 flush_icache_range((unsigned long)omap_sram_ceil,
276 (unsigned long)(omap_sram_ceil + size));
Tony Lindgren92105bb2005-09-07 17:20:26 +0100277
278 return (void *)omap_sram_ceil;
279}
280
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000281#ifdef CONFIG_ARCH_OMAP1
282
283static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
284
285void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
286{
Santosh Shilimkarda7a0642009-05-25 11:26:48 -0700287 BUG_ON(!_omap_sram_reprogram_clock);
Russell King020f9702008-12-01 17:40:54 +0000288 _omap_sram_reprogram_clock(dpllctl, ckctl);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000289}
290
291int __init omap1_sram_init(void)
292{
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300293 _omap_sram_reprogram_clock =
294 omap_sram_push(omap1_sram_reprogram_clock,
295 omap1_sram_reprogram_clock_sz);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000296
297 return 0;
298}
299
300#else
301#define omap1_sram_init() do {} while (0)
302#endif
303
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300304#if defined(CONFIG_ARCH_OMAP2)
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000305
306static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
307 u32 base_cs, u32 force_unlock);
308
309void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
310 u32 base_cs, u32 force_unlock)
311{
Santosh Shilimkarda7a0642009-05-25 11:26:48 -0700312 BUG_ON(!_omap2_sram_ddr_init);
Russell King020f9702008-12-01 17:40:54 +0000313 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
314 base_cs, force_unlock);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000315}
316
317static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
318 u32 mem_type);
319
320void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
321{
Santosh Shilimkarda7a0642009-05-25 11:26:48 -0700322 BUG_ON(!_omap2_sram_reprogram_sdrc);
Russell King020f9702008-12-01 17:40:54 +0000323 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000324}
325
326static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
327
328u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
329{
Santosh Shilimkarda7a0642009-05-25 11:26:48 -0700330 BUG_ON(!_omap2_set_prcm);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000331 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
332}
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300333#endif
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000334
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300335#ifdef CONFIG_ARCH_OMAP2420
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700336static int __init omap242x_sram_init(void)
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000337{
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300338 _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
339 omap242x_sram_ddr_init_sz);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000340
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300341 _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
342 omap242x_sram_reprogram_sdrc_sz);
343
344 _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
345 omap242x_sram_set_prcm_sz);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000346
347 return 0;
348}
349#else
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300350static inline int omap242x_sram_init(void)
351{
352 return 0;
353}
354#endif
355
356#ifdef CONFIG_ARCH_OMAP2430
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700357static int __init omap243x_sram_init(void)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300358{
359 _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
360 omap243x_sram_ddr_init_sz);
361
362 _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
363 omap243x_sram_reprogram_sdrc_sz);
364
365 _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
366 omap243x_sram_set_prcm_sz);
367
368 return 0;
369}
370#else
371static inline int omap243x_sram_init(void)
372{
373 return 0;
374}
375#endif
376
377#ifdef CONFIG_ARCH_OMAP3
378
Jean Pihet58cda882009-07-24 19:43:25 -0600379static u32 (*_omap3_sram_configure_core_dpll)(
380 u32 m2, u32 unlock_dll, u32 f, u32 inc,
381 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
382 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
383 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
384 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
385
386u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
387 u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
388 u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
389 u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
390 u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300391{
Santosh Shilimkarda7a0642009-05-25 11:26:48 -0700392 BUG_ON(!_omap3_sram_configure_core_dpll);
Jean Pihet58cda882009-07-24 19:43:25 -0600393 return _omap3_sram_configure_core_dpll(
394 m2, unlock_dll, f, inc,
395 sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
396 sdrc_actim_ctrl_b_0, sdrc_mr_0,
397 sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
398 sdrc_actim_ctrl_b_1, sdrc_mr_1);
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300399}
400
Rajendra Nayak3231fc82008-09-26 17:49:14 +0530401#ifdef CONFIG_PM
402void omap3_sram_restore_context(void)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300403{
404 omap_sram_ceil = omap_sram_base + omap_sram_size;
405
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300406 _omap3_sram_configure_core_dpll =
407 omap_sram_push(omap3_sram_configure_core_dpll,
408 omap3_sram_configure_core_dpll_sz);
Rajendra Nayak3231fc82008-09-26 17:49:14 +0530409 omap_push_sram_idle();
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300410}
Rajendra Nayak3231fc82008-09-26 17:49:14 +0530411#endif /* CONFIG_PM */
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300412
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700413static int __init omap34xx_sram_init(void)
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300414{
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300415 _omap3_sram_configure_core_dpll =
416 omap_sram_push(omap3_sram_configure_core_dpll,
417 omap3_sram_configure_core_dpll_sz);
Rajendra Nayak3231fc82008-09-26 17:49:14 +0530418 omap_push_sram_idle();
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300419 return 0;
420}
421#else
422static inline int omap34xx_sram_init(void)
423{
424 return 0;
425}
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000426#endif
427
Tony Lindgren82cd4ad2010-04-30 12:57:15 -0700428#ifdef CONFIG_ARCH_OMAP4
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700429static int __init omap44xx_sram_init(void)
Tony Lindgren82cd4ad2010-04-30 12:57:15 -0700430{
431 printk(KERN_ERR "FIXME: %s not implemented\n", __func__);
432
433 return -ENODEV;
434}
435#else
436static inline int omap44xx_sram_init(void)
437{
438 return 0;
439}
440#endif
441
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000442int __init omap_sram_init(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100443{
444 omap_detect_sram();
445 omap_map_sram();
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000446
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300447 if (!(cpu_class_is_omap2()))
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000448 omap1_sram_init();
Tony Lindgrenc2d43e32008-07-03 12:24:38 +0300449 else if (cpu_is_omap242x())
450 omap242x_sram_init();
451 else if (cpu_is_omap2430())
452 omap243x_sram_init();
453 else if (cpu_is_omap34xx())
454 omap34xx_sram_init();
Santosh Shilimkar44169072009-05-28 14:16:04 -0700455 else if (cpu_is_omap44xx())
Tony Lindgren82cd4ad2010-04-30 12:57:15 -0700456 omap44xx_sram_init();
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000457
458 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100459}