| Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame^] | 1 | /* |
| 2 | * cx18 driver PCI memory mapped IO access routines |
| 3 | * |
| 4 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
| 5 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 20 | * 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef CX18_IO_H |
| 24 | #define CX18_IO_H |
| 25 | |
| 26 | #include "cx18-driver.h" |
| 27 | |
| 28 | /* This is a PCI post thing, where if the pci register is not read, then |
| 29 | the write doesn't always take effect right away. By reading back the |
| 30 | register any pending PCI writes will be performed (in order), and so |
| 31 | you can be sure that the writes are guaranteed to be done. |
| 32 | |
| 33 | Rarely needed, only in some timing sensitive cases. |
| 34 | Apparently if this is not done some motherboards seem |
| 35 | to kill the firmware and get into the broken state until computer is |
| 36 | rebooted. */ |
| 37 | u32 cx18_write_sync(struct cx18 *cx, u32 val, void __iomem *addr); |
| 38 | |
| 39 | void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr); |
| 40 | u32 cx18_readl(struct cx18 *cx, const void __iomem *addr); |
| 41 | |
| 42 | /* No endiannes conversion calls */ |
| 43 | void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr); |
| 44 | u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr); |
| 45 | |
| 46 | /* Access "register" region of CX23418 memory mapped I/O */ |
| 47 | u32 cx18_read_reg(struct cx18 *cx, u32 reg); |
| 48 | void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg); |
| 49 | u32 cx18_write_reg_sync(struct cx18 *cx, u32 val, u32 reg); |
| 50 | |
| 51 | /* Access "encoder memory" region of CX23418 memory mapped I/O */ |
| 52 | u32 cx18_read_enc(struct cx18 *cx, u32 addr); |
| 53 | void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr); |
| 54 | u32 cx18_write_enc_sync(struct cx18 *cx, u32 val, u32 addr); |
| 55 | |
| 56 | void cx18_memcpy_fromio(struct cx18 *cx, void *to, |
| 57 | const void __iomem *from, unsigned int len); |
| 58 | void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count); |
| 59 | |
| 60 | void cx18_sw1_irq_enable(struct cx18 *cx, u32 val); |
| 61 | void cx18_sw1_irq_disable(struct cx18 *cx, u32 val); |
| 62 | void cx18_sw2_irq_enable(struct cx18 *cx, u32 val); |
| 63 | void cx18_sw2_irq_disable(struct cx18 *cx, u32 val); |
| 64 | void cx18_setup_page(struct cx18 *cx, u32 addr); |
| 65 | |
| 66 | /* Tries to recover from the CX23418 responding improperly on the PCI bus */ |
| 67 | int cx18_pci_try_recover(struct cx18 *cx); |
| 68 | |
| 69 | #endif /* CX18_IO_H */ |