| Jayachandran C | 5c64250 | 2011-05-07 01:36:40 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights |
| 3 | * reserved. |
| 4 | * |
| 5 | * This software is available to you under a choice of one of two |
| 6 | * licenses. You may choose to be licensed under the terms of the GNU |
| 7 | * General Public License (GPL) Version 2, available from the file |
| 8 | * COPYING in the main directory of this source tree, or the NetLogic |
| 9 | * license below: |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * |
| 15 | * 1. Redistributions of source code must retain the above copyright |
| 16 | * notice, this list of conditions and the following disclaimer. |
| 17 | * 2. Redistributions in binary form must reproduce the above copyright |
| 18 | * notice, this list of conditions and the following disclaimer in |
| 19 | * the documentation and/or other materials provided with the |
| 20 | * distribution. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR |
| 23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE |
| 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ |
| 34 | |
| 35 | #include <asm/asm.h> |
| 36 | #include <asm/asm-offsets.h> |
| 37 | #include <asm/regdef.h> |
| 38 | #include <asm/mipsregs.h> |
| 39 | |
| 40 | |
| 41 | /* Don't jump to linux function from Bootloader stack. Change it |
| 42 | * here. Kernel might allocate bootloader memory before all the CPUs are |
| 43 | * brought up (eg: Inode cache region) and we better don't overwrite this |
| 44 | * memory |
| 45 | */ |
| 46 | NESTED(prom_pre_boot_secondary_cpus, 16, sp) |
| 47 | .set mips64 |
| 48 | mfc0 t0, $15, 1 # read ebase |
| 49 | andi t0, 0x1f # t0 has the processor_id() |
| 50 | sll t0, 2 # offset in cpu array |
| 51 | |
| 52 | PTR_LA t1, nlm_cpu_ready # mark CPU ready |
| 53 | PTR_ADDU t1, t0 |
| 54 | li t2, 1 |
| 55 | sw t2, 0(t1) |
| 56 | |
| 57 | PTR_LA t1, nlm_cpu_unblock |
| 58 | PTR_ADDU t1, t0 |
| 59 | 1: lw t2, 0(t1) # wait till unblocked |
| 60 | beqz t2, 1b |
| 61 | nop |
| 62 | |
| 63 | PTR_LA t1, nlm_next_sp |
| 64 | PTR_L sp, 0(t1) |
| 65 | PTR_LA t1, nlm_next_gp |
| 66 | PTR_L gp, 0(t1) |
| 67 | |
| 68 | PTR_LA t0, nlm_early_init_secondary |
| 69 | jalr t0 |
| 70 | nop |
| 71 | |
| 72 | PTR_LA t0, smp_bootstrap |
| 73 | jr t0 |
| 74 | nop |
| 75 | END(prom_pre_boot_secondary_cpus) |
| 76 | |
| 77 | NESTED(nlm_boot_smp_nmi, 0, sp) |
| 78 | .set push |
| 79 | .set noat |
| 80 | .set mips64 |
| 81 | .set noreorder |
| 82 | |
| 83 | /* Clear the NMI and BEV bits */ |
| 84 | MFC0 k0, CP0_STATUS |
| 85 | li k1, 0xffb7ffff |
| 86 | and k0, k0, k1 |
| 87 | MTC0 k0, CP0_STATUS |
| 88 | |
| 89 | PTR_LA k1, secondary_entry_point |
| 90 | PTR_L k0, 0(k1) |
| 91 | jr k0 |
| 92 | nop |
| 93 | .set pop |
| 94 | END(nlm_boot_smp_nmi) |