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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
Tomi Valkeinen559d6702009-11-03 11:23:50 +02002 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030018#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
Tomi Valkeinen559d6702009-11-03 11:23:50 +020020
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
Tomi Valkeinen559d6702009-11-03 11:23:50 +020024
25#define DISPC_IRQ_FRAMEDONE (1 << 0)
26#define DISPC_IRQ_VSYNC (1 << 1)
27#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
28#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
29#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
30#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
31#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
32#define DISPC_IRQ_GFX_END_WIN (1 << 7)
33#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
34#define DISPC_IRQ_OCP_ERR (1 << 9)
35#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
36#define DISPC_IRQ_VID1_END_WIN (1 << 11)
37#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
38#define DISPC_IRQ_VID2_END_WIN (1 << 13)
39#define DISPC_IRQ_SYNC_LOST (1 << 14)
40#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
41#define DISPC_IRQ_WAKEUP (1 << 16)
Sumit Semwal2a205f32010-12-02 11:27:12 +000042#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
43#define DISPC_IRQ_VSYNC2 (1 << 18)
44#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
45#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
Tomi Valkeinen559d6702009-11-03 11:23:50 +020046
47struct omap_dss_device;
48struct omap_overlay_manager;
49
50enum omap_display_type {
51 OMAP_DISPLAY_TYPE_NONE = 0,
52 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
53 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
54 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
55 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
56 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
Mythri P Kb1196012011-03-08 17:15:54 +053057 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020058};
59
60enum omap_plane {
61 OMAP_DSS_GFX = 0,
62 OMAP_DSS_VIDEO1 = 1,
63 OMAP_DSS_VIDEO2 = 2
64};
65
66enum omap_channel {
67 OMAP_DSS_CHANNEL_LCD = 0,
68 OMAP_DSS_CHANNEL_DIGIT = 1,
Sumit Semwal8613b002010-12-02 11:27:09 +000069 OMAP_DSS_CHANNEL_LCD2 = 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020070};
71
72enum omap_color_mode {
73 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
74 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
75 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
76 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
77 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
78 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
79 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
80 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
81 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
82 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
83 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
84 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
85 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
86 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
Amber Jainf20e4222011-05-19 19:47:50 +053087 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
88 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
89 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
90 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
91 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +020092};
93
94enum omap_lcd_display_type {
95 OMAP_DSS_LCD_DISPLAY_STN,
96 OMAP_DSS_LCD_DISPLAY_TFT,
97};
98
99enum omap_dss_load_mode {
100 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
101 OMAP_DSS_LOAD_CLUT_ONLY = 1,
102 OMAP_DSS_LOAD_FRAME_ONLY = 2,
103 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
104};
105
106enum omap_dss_trans_key_type {
107 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
108 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
109};
110
111enum omap_rfbi_te_mode {
112 OMAP_DSS_RFBI_TE_MODE_1 = 1,
113 OMAP_DSS_RFBI_TE_MODE_2 = 2,
114};
115
116enum omap_panel_config {
117 OMAP_DSS_LCD_IVS = 1<<0,
118 OMAP_DSS_LCD_IHS = 1<<1,
119 OMAP_DSS_LCD_IPC = 1<<2,
120 OMAP_DSS_LCD_IEO = 1<<3,
121 OMAP_DSS_LCD_RF = 1<<4,
122 OMAP_DSS_LCD_ONOFF = 1<<5,
123
124 OMAP_DSS_LCD_TFT = 1<<20,
125};
126
127enum omap_dss_venc_type {
128 OMAP_DSS_VENC_TYPE_COMPOSITE,
129 OMAP_DSS_VENC_TYPE_SVIDEO,
130};
131
Archit Taneja7e951ee2011-07-22 12:45:04 +0530132enum omap_dss_dsi_mode {
133 OMAP_DSS_DSI_CMD_MODE = 0,
134 OMAP_DSS_DSI_VIDEO_MODE,
135};
136
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200137enum omap_display_caps {
138 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
139 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
140};
141
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200142enum omap_dss_display_state {
143 OMAP_DSS_DISPLAY_DISABLED = 0,
144 OMAP_DSS_DISPLAY_ACTIVE,
145 OMAP_DSS_DISPLAY_SUSPENDED,
146};
147
148/* XXX perhaps this should be removed */
149enum omap_dss_overlay_managers {
150 OMAP_DSS_OVL_MGR_LCD,
151 OMAP_DSS_OVL_MGR_TV,
Sumit Semwal8613b002010-12-02 11:27:09 +0000152 OMAP_DSS_OVL_MGR_LCD2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200153};
154
155enum omap_dss_rotation_type {
156 OMAP_DSS_ROT_DMA = 0,
157 OMAP_DSS_ROT_VRFB = 1,
158};
159
160/* clockwise rotation angle */
161enum omap_dss_rotation_angle {
162 OMAP_DSS_ROT_0 = 0,
163 OMAP_DSS_ROT_90 = 1,
164 OMAP_DSS_ROT_180 = 2,
165 OMAP_DSS_ROT_270 = 3,
166};
167
168enum omap_overlay_caps {
169 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300170 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
171 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200172};
173
174enum omap_overlay_manager_caps {
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300175 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200176};
177
Archit Taneja89a35e52011-04-12 13:52:23 +0530178enum omap_dss_clk_source {
179 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
180 * OMAP4: DSS_FCLK */
181 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
182 * OMAP4: PLL1_CLK1 */
183 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
184 * OMAP4: PLL1_CLK2 */
Archit Taneja5a8b5722011-05-12 17:26:29 +0530185 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
186 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
Archit Taneja89a35e52011-04-12 13:52:23 +0530187};
188
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200189/* RFBI */
190
191struct rfbi_timings {
192 int cs_on_time;
193 int cs_off_time;
194 int we_on_time;
195 int we_off_time;
196 int re_on_time;
197 int re_off_time;
198 int we_cycle_time;
199 int re_cycle_time;
200 int cs_pulse_width;
201 int access_time;
202
203 int clk_div;
204
205 u32 tim[5]; /* set by rfbi_convert_timings() */
206
207 int converted;
208};
209
210void omap_rfbi_write_command(const void *buf, u32 len);
211void omap_rfbi_read_data(void *buf, u32 len);
212void omap_rfbi_write_data(const void *buf, u32 len);
213void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
214 u16 x, u16 y,
215 u16 w, u16 h);
216int omap_rfbi_enable_te(bool enable, unsigned line);
217int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
218 unsigned hs_pulse_time, unsigned vs_pulse_time,
219 int hs_pol_inv, int vs_pol_inv, int extif_div);
Tomi Valkeinen773139f2011-04-21 19:50:31 +0300220void rfbi_bus_lock(void);
221void rfbi_bus_unlock(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200222
223/* DSI */
Archit Taneja1ffefe72011-05-12 17:26:24 +0530224void dsi_bus_lock(struct omap_dss_device *dssdev);
225void dsi_bus_unlock(struct omap_dss_device *dssdev);
226int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
227 int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530228int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
229 int len);
230int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
231int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530232int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
233 u8 param);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530234int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
235 u8 param);
236int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
237 u8 param1, u8 param2);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530238int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
239 u8 *data, int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530240int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
241 u8 *data, int len);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530242int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
243 u8 *buf, int buflen);
Archit Tanejab3b89c02011-08-30 16:07:39 +0530244int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
245 int buflen);
246int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
247 u8 *buf, int buflen);
248int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
249 u8 param1, u8 param2, u8 *buf, int buflen);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530250int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
251 u16 len);
252int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
253int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200254
255/* Board specific data */
256struct omap_dss_board_info {
Tomi Valkeinenaac927c2011-05-23 15:46:54 +0300257 int (*get_context_loss_count)(struct device *dev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200258 int num_devices;
259 struct omap_dss_device **devices;
260 struct omap_dss_device *default_device;
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300261 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
262 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200263};
264
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000265#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
266/* Init with the board info */
267extern int omap_display_init(struct omap_dss_board_info *board_data);
268#else
269static inline int omap_display_init(struct omap_dss_board_info *board_data)
270{
271 return 0;
272}
273#endif
274
Senthilvadivu Guruswamycf07f532011-01-24 06:21:56 +0000275struct omap_display_platform_data {
276 struct omap_dss_board_info *board_data;
277 /* TODO: Additional members to be added when PM is considered */
278};
279
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200280struct omap_video_timings {
281 /* Unit: pixels */
282 u16 x_res;
283 /* Unit: pixels */
284 u16 y_res;
285 /* Unit: KHz */
286 u32 pixel_clock;
287 /* Unit: pixel clocks */
288 u16 hsw; /* Horizontal synchronization pulse width */
289 /* Unit: pixel clocks */
290 u16 hfp; /* Horizontal front porch */
291 /* Unit: pixel clocks */
292 u16 hbp; /* Horizontal back porch */
293 /* Unit: line clocks */
294 u16 vsw; /* Vertical synchronization pulse width */
295 /* Unit: line clocks */
296 u16 vfp; /* Vertical front porch */
297 /* Unit: line clocks */
298 u16 vbp; /* Vertical back porch */
299};
300
301#ifdef CONFIG_OMAP2_DSS_VENC
302/* Hardcoded timings for tv modes. Venc only uses these to
303 * identify the mode, and does not actually use the configs
304 * itself. However, the configs should be something that
305 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200306extern const struct omap_video_timings omap_dss_pal_timings;
307extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200308#endif
309
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300310struct omap_dss_cpr_coefs {
311 s16 rr, rg, rb;
312 s16 gr, gg, gb;
313 s16 br, bg, bb;
314};
315
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200316struct omap_overlay_info {
317 bool enabled;
318
319 u32 paddr;
320 void __iomem *vaddr;
Amber Jain0d66cbb2011-05-19 19:47:54 +0530321 u32 p_uv_addr; /* for NV12 format */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200322 u16 screen_width;
323 u16 width;
324 u16 height;
325 enum omap_color_mode color_mode;
326 u8 rotation;
327 enum omap_dss_rotation_type rotation_type;
328 bool mirror;
329
330 u16 pos_x;
331 u16 pos_y;
332 u16 out_width; /* if 0, out_width == width */
333 u16 out_height; /* if 0, out_height == height */
334 u8 global_alpha;
Rajkumar Nfd28a392010-11-04 12:28:42 +0100335 u8 pre_mult_alpha;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200336};
337
338struct omap_overlay {
339 struct kobject kobj;
340 struct list_head list;
341
342 /* static fields */
343 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300344 enum omap_plane id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200345 enum omap_color_mode supported_modes;
346 enum omap_overlay_caps caps;
347
348 /* dynamic fields */
349 struct omap_overlay_manager *manager;
350 struct omap_overlay_info info;
351
Tomi Valkeinen8fa80312011-08-16 12:56:19 +0300352 bool manager_changed;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200353 /* if true, info has been changed, but not applied() yet */
354 bool info_dirty;
355
356 int (*set_manager)(struct omap_overlay *ovl,
357 struct omap_overlay_manager *mgr);
358 int (*unset_manager)(struct omap_overlay *ovl);
359
360 int (*set_overlay_info)(struct omap_overlay *ovl,
361 struct omap_overlay_info *info);
362 void (*get_overlay_info)(struct omap_overlay *ovl,
363 struct omap_overlay_info *info);
364
365 int (*wait_for_go)(struct omap_overlay *ovl);
366};
367
368struct omap_overlay_manager_info {
369 u32 default_color;
370
371 enum omap_dss_trans_key_type trans_key_type;
372 u32 trans_key;
373 bool trans_enabled;
374
375 bool alpha_enabled;
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300376
377 bool cpr_enable;
378 struct omap_dss_cpr_coefs cpr_coefs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200379};
380
381struct omap_overlay_manager {
382 struct kobject kobj;
383 struct list_head list;
384
385 /* static fields */
386 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300387 enum omap_channel id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200388 enum omap_overlay_manager_caps caps;
389 int num_overlays;
390 struct omap_overlay **overlays;
391 enum omap_display_type supported_displays;
392
393 /* dynamic fields */
394 struct omap_dss_device *device;
395 struct omap_overlay_manager_info info;
396
397 bool device_changed;
398 /* if true, info has been changed but not applied() yet */
399 bool info_dirty;
400
401 int (*set_device)(struct omap_overlay_manager *mgr,
402 struct omap_dss_device *dssdev);
403 int (*unset_device)(struct omap_overlay_manager *mgr);
404
405 int (*set_manager_info)(struct omap_overlay_manager *mgr,
406 struct omap_overlay_manager_info *info);
407 void (*get_manager_info)(struct omap_overlay_manager *mgr,
408 struct omap_overlay_manager_info *info);
409
410 int (*apply)(struct omap_overlay_manager *mgr);
411 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200412 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Tomi Valkeinena2faee82010-01-08 17:14:53 +0200413
414 int (*enable)(struct omap_overlay_manager *mgr);
415 int (*disable)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200416};
417
418struct omap_dss_device {
419 struct device dev;
420
421 enum omap_display_type type;
422
Sumit Semwal18faa1b2010-12-02 11:27:14 +0000423 enum omap_channel channel;
424
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200425 union {
426 struct {
427 u8 data_lines;
428 } dpi;
429
430 struct {
431 u8 channel;
432 u8 data_lines;
433 } rfbi;
434
435 struct {
436 u8 datapairs;
437 } sdi;
438
439 struct {
440 u8 clk_lane;
441 u8 clk_pol;
442 u8 data1_lane;
443 u8 data1_pol;
444 u8 data2_lane;
445 u8 data2_pol;
Archit Taneja75d72472011-05-16 15:17:08 +0530446 u8 data3_lane;
447 u8 data3_pol;
448 u8 data4_lane;
449 u8 data4_pol;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200450
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530451 int module;
452
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200453 bool ext_te;
454 u8 ext_te_gpio;
455 } dsi;
456
457 struct {
458 enum omap_dss_venc_type type;
459 bool invert_polarity;
460 } venc;
461 } phy;
462
463 struct {
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200464 struct {
Archit Tanejae8881662011-04-12 13:52:24 +0530465 struct {
466 u16 lck_div;
467 u16 pck_div;
468 enum omap_dss_clk_source lcd_clk_src;
469 } channel;
470
471 enum omap_dss_clk_source dispc_fclk_src;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200472 } dispc;
473
474 struct {
475 u16 regn;
476 u16 regm;
477 u16 regm_dispc;
478 u16 regm_dsi;
479
480 u16 lp_clk_div;
Archit Tanejae8881662011-04-12 13:52:24 +0530481 enum omap_dss_clk_source dsi_fclk_src;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200482 } dsi;
Archit Taneja6cb07b22011-04-12 13:52:25 +0530483
484 struct {
485 u16 regn;
486 u16 regm2;
487 } hdmi;
Tomi Valkeinenc6940a32011-02-22 13:36:10 +0200488 } clocks;
489
490 struct {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200491 struct omap_video_timings timings;
492
493 int acbi; /* ac-bias pin transitions per interrupt */
494 /* Unit: line clocks */
495 int acb; /* ac-bias pin frequency */
496
497 enum omap_panel_config config;
Archit Taneja7e951ee2011-07-22 12:45:04 +0530498
499 enum omap_dss_dsi_mode dsi_mode;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200500 } panel;
501
502 struct {
503 u8 pixel_size;
504 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200505 } ctrl;
506
507 int reset_gpio;
508
509 int max_backlight_level;
510
511 const char *name;
512
513 /* used to match device to driver */
514 const char *driver_name;
515
516 void *data;
517
518 struct omap_dss_driver *driver;
519
520 /* helper variable for driver suspend/resume */
521 bool activate_after_resume;
522
523 enum omap_display_caps caps;
524
525 struct omap_overlay_manager *manager;
526
527 enum omap_dss_display_state state;
528
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200529 /* platform specific */
530 int (*platform_enable)(struct omap_dss_device *dssdev);
531 void (*platform_disable)(struct omap_dss_device *dssdev);
532 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
533 int (*get_backlight)(struct omap_dss_device *dssdev);
534};
535
536struct omap_dss_driver {
537 struct device_driver driver;
538
539 int (*probe)(struct omap_dss_device *);
540 void (*remove)(struct omap_dss_device *);
541
542 int (*enable)(struct omap_dss_device *display);
543 void (*disable)(struct omap_dss_device *display);
544 int (*suspend)(struct omap_dss_device *display);
545 int (*resume)(struct omap_dss_device *display);
546 int (*run_test)(struct omap_dss_device *display, int test);
547
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200548 int (*update)(struct omap_dss_device *dssdev,
549 u16 x, u16 y, u16 w, u16 h);
550 int (*sync)(struct omap_dss_device *dssdev);
551
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200552 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200553 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200554
555 u8 (*get_rotate)(struct omap_dss_device *dssdev);
556 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
557
558 bool (*get_mirror)(struct omap_dss_device *dssdev);
559 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
560
561 int (*memory_read)(struct omap_dss_device *dssdev,
562 void *buf, size_t size,
563 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200564
565 void (*get_resolution)(struct omap_dss_device *dssdev,
566 u16 *xres, u16 *yres);
Jani Nikula7a0987b2010-06-16 15:26:36 +0300567 void (*get_dimensions)(struct omap_dss_device *dssdev,
568 u32 *width, u32 *height);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200569 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200570
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200571 int (*check_timings)(struct omap_dss_device *dssdev,
572 struct omap_video_timings *timings);
573 void (*set_timings)(struct omap_dss_device *dssdev,
574 struct omap_video_timings *timings);
575 void (*get_timings)(struct omap_dss_device *dssdev,
576 struct omap_video_timings *timings);
577
Tomi Valkeinen36511312010-01-19 15:53:16 +0200578 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
579 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200580};
581
582int omap_dss_register_driver(struct omap_dss_driver *);
583void omap_dss_unregister_driver(struct omap_dss_driver *);
584
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200585void omap_dss_get_device(struct omap_dss_device *dssdev);
586void omap_dss_put_device(struct omap_dss_device *dssdev);
587#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
588struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
589struct omap_dss_device *omap_dss_find_device(void *data,
590 int (*match)(struct omap_dss_device *dssdev, void *data));
591
592int omap_dss_start_device(struct omap_dss_device *dssdev);
593void omap_dss_stop_device(struct omap_dss_device *dssdev);
594
595int omap_dss_get_num_overlay_managers(void);
596struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
597
598int omap_dss_get_num_overlays(void);
599struct omap_overlay *omap_dss_get_overlay(int num);
600
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200601void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
602 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200603int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
604
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200605typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
606int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
607int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
608
609int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
610int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
611 unsigned long timeout);
612
613#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
614#define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
615
Archit Taneja1ffefe72011-05-12 17:26:24 +0530616void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
617 bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200618int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen61140c92010-01-12 16:00:30 +0200619
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200620int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
Tomi Valkeinen26a8c252010-06-09 15:31:34 +0300621 u16 *x, u16 *y, u16 *w, u16 *h,
622 bool enlarge_update_area);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200623int omap_dsi_update(struct omap_dss_device *dssdev,
624 int channel,
625 u16 x, u16 y, u16 w, u16 h,
626 void (*callback)(int, void *), void *data);
Archit Taneja5ee3c142011-03-02 12:35:53 +0530627int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
628int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
629void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200630
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200631int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
Tomi Valkeinen2a89dc12010-07-30 12:39:34 +0300632void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
Tomi Valkeinen22d6d672010-10-11 11:33:30 +0300633 bool disconnect_lanes, bool enter_ulps);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200634
635int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
636void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200637void dpi_set_timings(struct omap_dss_device *dssdev,
638 struct omap_video_timings *timings);
639int dpi_check_timings(struct omap_dss_device *dssdev,
640 struct omap_video_timings *timings);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200641
642int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
643void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
644
645int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
646void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200647int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
648 u16 *x, u16 *y, u16 *w, u16 *h);
649int omap_rfbi_update(struct omap_dss_device *dssdev,
650 u16 x, u16 y, u16 w, u16 h,
651 void (*callback)(void *), void *data);
Tomi Valkeinen1d5952a2011-04-29 15:57:01 +0300652int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
653 int data_lines);
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200654
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200655#endif