| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * time.c: MIPS CPU Count/Compare timer hookup | 
 | 3 |  * | 
 | 4 |  * Author: Mark.Zhan, <rongkai.zhan@windriver.com> | 
 | 5 |  * | 
 | 6 |  * This file is subject to the terms and conditions of the GNU General Public | 
 | 7 |  * License.  See the file "COPYING" in the main directory of this archive | 
 | 8 |  * for more details. | 
 | 9 |  * | 
 | 10 |  * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org) | 
 | 11 |  * Copyright (C) 2006, Wind River System Inc. | 
 | 12 |  */ | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 13 | #include <linux/init.h> | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 14 | #include <linux/interrupt.h> | 
| Yoichi Yuasa | 4b92fe2 | 2007-10-10 00:28:26 +0900 | [diff] [blame] | 15 | #include <linux/irq.h> | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 16 |  | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 17 | #include <asm/gt64120.h> | 
| Yoichi Yuasa | 4b92fe2 | 2007-10-10 00:28:26 +0900 | [diff] [blame] | 18 | #include <asm/time.h> | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 19 |  | 
 | 20 | #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ | 
 | 21 |  | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 22 | /* | 
 | 23 |  * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect | 
 | 24 |  * | 
 | 25 |  * NOTE: We disable all GT64120 timers, and use MIPS processor internal | 
 | 26 |  * timer as the source of kernel clock tick. | 
 | 27 |  */ | 
| Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 28 | void __init plat_time_init(void) | 
| Mark.Zhan | a240a46 | 2006-05-06 17:04:20 +0800 | [diff] [blame] | 29 | { | 
 | 30 | 	/* Disable GT64120 timers */ | 
 | 31 | 	GT_WRITE(GT_TC_CONTROL_OFS, 0x00); | 
 | 32 | 	GT_WRITE(GT_TC0_OFS, 0x00); | 
 | 33 | 	GT_WRITE(GT_TC1_OFS, 0x00); | 
 | 34 | 	GT_WRITE(GT_TC2_OFS, 0x00); | 
 | 35 | 	GT_WRITE(GT_TC3_OFS, 0x00); | 
 | 36 |  | 
 | 37 | 	/* Use MIPS compare/count internal timer */ | 
 | 38 | 	mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ; | 
 | 39 | } |