| Paul Walmsley | 657ebfa | 2010-02-22 22:09:20 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP3-common clock function prototypes and macros |
| 3 | * |
| 4 | * Copyright (C) 2007-2010 Texas Instruments, Inc. |
| 5 | * Copyright (C) 2007-2010 Nokia Corporation |
| 6 | */ |
| 7 | |
| 8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H |
| 9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H |
| 10 | |
| 11 | int omap3xxx_clk_init(void); |
| Rajendra Nayak | b4777a2 | 2012-04-27 15:53:48 +0530 | [diff] [blame^] | 12 | #ifdef CONFIG_COMMON_CLK |
| 13 | int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate, |
| 14 | unsigned long parent_rate); |
| 15 | int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, |
| 16 | unsigned long parent_rate); |
| 17 | #else |
| Paul Walmsley | 657ebfa | 2010-02-22 22:09:20 -0700 | [diff] [blame] | 18 | int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); |
| 19 | int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); |
| Rajendra Nayak | b4777a2 | 2012-04-27 15:53:48 +0530 | [diff] [blame^] | 20 | #endif |
| Paul Walmsley | 657ebfa | 2010-02-22 22:09:20 -0700 | [diff] [blame] | 21 | void omap3_clk_lock_dpll5(void); |
| 22 | |
| 23 | extern struct clk *sdrc_ick_p; |
| 24 | extern struct clk *arm_fck_p; |
| 25 | |
| 26 | extern const struct clkops clkops_noncore_dpll_ops; |
| 27 | |
| 28 | #endif |