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Michael Hennerichdc26aec2008-11-18 17:48:22 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Michael Hennerichdc26aec2008-11-18 17:48:22 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2
Michael Hennerichdc26aec2008-11-18 17:48:22 +08007 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
Barry Songf1cb6462009-08-03 04:40:36 +000012#include <linux/mtd/physmap.h>
Michael Hennerichdc26aec2008-11-18 17:48:22 +080013#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18#include <asm/bfin5xx_spi.h>
19#include <asm/dma.h>
20#include <asm/gpio.h>
21#include <asm/nand.h>
22#include <asm/portmux.h>
23#include <asm/dpmc.h>
24#include <linux/input.h>
25
26/*
27 * Name the Board for the /proc/cpuinfo
28 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080029const char bfin_board_name[] = "ADI BF538-EZKIT";
Michael Hennerichdc26aec2008-11-18 17:48:22 +080030
31/*
32 * Driver needs to know address, irq and flag pin.
33 */
34
35
36#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
37static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40};
41#endif
42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44static struct resource bfin_uart_resources[] = {
45#ifdef CONFIG_SERIAL_BFIN_UART0
46 {
47 .start = 0xFFC00400,
48 .end = 0xFFC004FF,
49 .flags = IORESOURCE_MEM,
50 },
51#endif
52#ifdef CONFIG_SERIAL_BFIN_UART1
53 {
54 .start = 0xFFC02000,
55 .end = 0xFFC020FF,
56 .flags = IORESOURCE_MEM,
57 },
58#endif
59#ifdef CONFIG_SERIAL_BFIN_UART2
60 {
61 .start = 0xFFC02100,
62 .end = 0xFFC021FF,
63 .flags = IORESOURCE_MEM,
64 },
65#endif
66};
67
68static struct platform_device bfin_uart_device = {
69 .name = "bfin-uart",
70 .id = 1,
71 .num_resources = ARRAY_SIZE(bfin_uart_resources),
72 .resource = bfin_uart_resources,
73};
74#endif
75
76#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Michael Hennerichdc26aec2008-11-18 17:48:22 +080077#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +080078static struct resource bfin_sir0_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +080079 {
80 .start = 0xFFC00400,
81 .end = 0xFFC004FF,
82 .flags = IORESOURCE_MEM,
83 },
Graf Yang42bd8bc2009-01-07 23:14:39 +080084 {
85 .start = IRQ_UART0_RX,
86 .end = IRQ_UART0_RX+1,
87 .flags = IORESOURCE_IRQ,
88 },
89 {
90 .start = CH_UART0_RX,
91 .end = CH_UART0_RX+1,
92 .flags = IORESOURCE_DMA,
93 },
94};
95static struct platform_device bfin_sir0_device = {
96 .name = "bfin_sir",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
99 .resource = bfin_sir0_resources,
100};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800101#endif
102#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800103static struct resource bfin_sir1_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800104 {
105 .start = 0xFFC02000,
106 .end = 0xFFC020FF,
107 .flags = IORESOURCE_MEM,
108 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800109 {
110 .start = IRQ_UART1_RX,
111 .end = IRQ_UART1_RX+1,
112 .flags = IORESOURCE_IRQ,
113 },
114 {
115 .start = CH_UART1_RX,
116 .end = CH_UART1_RX+1,
117 .flags = IORESOURCE_DMA,
118 },
119};
120static struct platform_device bfin_sir1_device = {
121 .name = "bfin_sir",
122 .id = 1,
123 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
124 .resource = bfin_sir1_resources,
125};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800126#endif
127#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800128static struct resource bfin_sir2_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800129 {
130 .start = 0xFFC02100,
131 .end = 0xFFC021FF,
132 .flags = IORESOURCE_MEM,
133 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800134 {
135 .start = IRQ_UART2_RX,
136 .end = IRQ_UART2_RX+1,
137 .flags = IORESOURCE_IRQ,
138 },
139 {
140 .start = CH_UART2_RX,
141 .end = CH_UART2_RX+1,
142 .flags = IORESOURCE_DMA,
143 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800144};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800145static struct platform_device bfin_sir2_device = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800146 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800147 .id = 2,
148 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
149 .resource = bfin_sir2_resources,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800150};
151#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800152#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800153
154/*
155 * USB-LAN EzExtender board
156 * Driver needs to know address, irq and flag pin.
157 */
158#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000159#include <linux/smc91x.h>
160
161static struct smc91x_platdata smc91x_info = {
162 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
163 .leda = RPC_LED_100_10,
164 .ledb = RPC_LED_TX_RX,
165};
166
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800167static struct resource smc91x_resources[] = {
168 {
169 .name = "smc91x-regs",
170 .start = 0x20310300,
171 .end = 0x20310300 + 16,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PF0,
175 .end = IRQ_PF0,
176 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
177 },
178};
179static struct platform_device smc91x_device = {
180 .name = "smc91x",
181 .id = 0,
182 .num_resources = ARRAY_SIZE(smc91x_resources),
183 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000184 .dev = {
185 .platform_data = &smc91x_info,
186 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800187};
188#endif
189
190#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
191/* all SPI peripherals info goes here */
192#if defined(CONFIG_MTD_M25P80) \
193 || defined(CONFIG_MTD_M25P80_MODULE)
194/* SPI flash chip (m25p16) */
195static struct mtd_partition bfin_spi_flash_partitions[] = {
196 {
197 .name = "bootloader(spi)",
198 .size = 0x00040000,
199 .offset = 0,
200 .mask_flags = MTD_CAP_ROM
201 }, {
202 .name = "linux kernel(spi)",
203 .size = 0x1c0000,
204 .offset = 0x40000
205 }
206};
207
208static struct flash_platform_data bfin_spi_flash_data = {
209 .name = "m25p80",
210 .parts = bfin_spi_flash_partitions,
211 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
212 .type = "m25p16",
213};
214
215static struct bfin5xx_spi_chip spi_flash_chip_info = {
216 .enable_dma = 0, /* use dma transfer with this chip*/
217 .bits_per_word = 8,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800218};
219#endif
220
221#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
222#include <linux/spi/ad7879.h>
223static const struct ad7879_platform_data bfin_ad7879_ts_info = {
224 .model = 7879, /* Model = AD7879 */
225 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
226 .pressure_max = 10000,
227 .pressure_min = 0,
228 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
229 .acquisition_time = 1, /* 4us acquisition time per sample */
230 .median = 2, /* do 8 measurements */
231 .averaging = 1, /* take the average of 4 middle samples */
232 .pen_down_acc_interval = 255, /* 9.4 ms */
233 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
234 .gpio_default = 1, /* During initialization set GPIO = HIGH */
235};
236#endif
237
238#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
239static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
240 .enable_dma = 0,
241 .bits_per_word = 16,
242};
243#endif
244
245#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
246#include <asm/bfin-lq035q1.h>
247
248static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
249 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
250 .use_bl = 0, /* let something else control the LCD Blacklight */
251 .gpio_bl = GPIO_PF7,
252};
253
254static struct resource bfin_lq035q1_resources[] = {
255 {
256 .start = IRQ_PPI_ERROR,
257 .end = IRQ_PPI_ERROR,
258 .flags = IORESOURCE_IRQ,
259 },
260};
261
262static struct platform_device bfin_lq035q1_device = {
263 .name = "bfin-lq035q1",
264 .id = -1,
265 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
266 .resource = bfin_lq035q1_resources,
267 .dev = {
268 .platform_data = &bfin_lq035q1_data,
269 },
270};
271#endif
272
273#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
274static struct bfin5xx_spi_chip spidev_chip_info = {
275 .enable_dma = 0,
276 .bits_per_word = 8,
277};
278#endif
279
280#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
281static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
282 .enable_dma = 0,
283 .bits_per_word = 8,
284};
285#endif
286
287static struct spi_board_info bf538_spi_board_info[] __initdata = {
288#if defined(CONFIG_MTD_M25P80) \
289 || defined(CONFIG_MTD_M25P80_MODULE)
290 {
291 /* the modalias must be the same as spi device driver name */
292 .modalias = "m25p80", /* Name of spi_driver for this device */
293 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
294 .bus_num = 0, /* Framework bus number */
295 .chip_select = 1, /* SPI_SSEL1*/
296 .platform_data = &bfin_spi_flash_data,
297 .controller_data = &spi_flash_chip_info,
298 .mode = SPI_MODE_3,
299 },
300#endif
301#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
302 {
303 .modalias = "ad7879",
304 .platform_data = &bfin_ad7879_ts_info,
305 .irq = IRQ_PF3,
306 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
307 .bus_num = 0,
308 .chip_select = 1,
309 .controller_data = &spi_ad7879_chip_info,
310 .mode = SPI_CPHA | SPI_CPOL,
311 },
312#endif
313#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
314 {
315 .modalias = "bfin-lq035q1-spi",
316 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
317 .bus_num = 0,
318 .chip_select = 2,
319 .controller_data = &lq035q1_spi_chip_info,
320 .mode = SPI_CPHA | SPI_CPOL,
321 },
322#endif
323#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
324 {
325 .modalias = "spidev",
326 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
327 .bus_num = 0,
328 .chip_select = 1,
329 .controller_data = &spidev_chip_info,
330 },
331#endif
332};
333
334/* SPI (0) */
335static struct resource bfin_spi0_resource[] = {
336 [0] = {
337 .start = SPI0_REGBASE,
338 .end = SPI0_REGBASE + 0xFF,
339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
342 .start = CH_SPI0,
343 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000344 .flags = IORESOURCE_DMA,
345 },
346 [2] = {
347 .start = IRQ_SPI0,
348 .end = IRQ_SPI0,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800349 .flags = IORESOURCE_IRQ,
350 }
351};
352
353/* SPI (1) */
354static struct resource bfin_spi1_resource[] = {
355 [0] = {
356 .start = SPI1_REGBASE,
357 .end = SPI1_REGBASE + 0xFF,
358 .flags = IORESOURCE_MEM,
359 },
360 [1] = {
361 .start = CH_SPI1,
362 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000363 .flags = IORESOURCE_DMA,
364 },
365 [2] = {
366 .start = IRQ_SPI1,
367 .end = IRQ_SPI1,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800368 .flags = IORESOURCE_IRQ,
369 }
370};
371
372/* SPI (2) */
373static struct resource bfin_spi2_resource[] = {
374 [0] = {
375 .start = SPI2_REGBASE,
376 .end = SPI2_REGBASE + 0xFF,
377 .flags = IORESOURCE_MEM,
378 },
379 [1] = {
380 .start = CH_SPI2,
381 .end = CH_SPI2,
Barry Song769cfc02009-09-10 04:32:47 +0000382 .flags = IORESOURCE_DMA,
383 },
384 [2] = {
385 .start = IRQ_SPI2,
386 .end = IRQ_SPI2,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800387 .flags = IORESOURCE_IRQ,
388 }
389};
390
391/* SPI controller data */
392static struct bfin5xx_spi_master bf538_spi_master_info0 = {
393 .num_chipselect = 8,
394 .enable_dma = 1, /* master has the ability to do dma transfer */
395 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
396};
397
398static struct platform_device bf538_spi_master0 = {
399 .name = "bfin-spi",
400 .id = 0, /* Bus number */
401 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
402 .resource = bfin_spi0_resource,
403 .dev = {
404 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
405 },
406};
407
408static struct bfin5xx_spi_master bf538_spi_master_info1 = {
409 .num_chipselect = 8,
410 .enable_dma = 1, /* master has the ability to do dma transfer */
411 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
412};
413
414static struct platform_device bf538_spi_master1 = {
415 .name = "bfin-spi",
416 .id = 1, /* Bus number */
417 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
418 .resource = bfin_spi1_resource,
419 .dev = {
420 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
421 },
422};
423
424static struct bfin5xx_spi_master bf538_spi_master_info2 = {
425 .num_chipselect = 8,
426 .enable_dma = 1, /* master has the ability to do dma transfer */
427 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
428};
429
430static struct platform_device bf538_spi_master2 = {
431 .name = "bfin-spi",
432 .id = 2, /* Bus number */
433 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
434 .resource = bfin_spi2_resource,
435 .dev = {
436 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
437 },
438};
439
440#endif /* spi master and devices */
441
442#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
443static struct resource bfin_twi0_resource[] = {
444 [0] = {
445 .start = TWI0_REGBASE,
446 .end = TWI0_REGBASE + 0xFF,
447 .flags = IORESOURCE_MEM,
448 },
449 [1] = {
450 .start = IRQ_TWI0,
451 .end = IRQ_TWI0,
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
456static struct platform_device i2c_bfin_twi0_device = {
457 .name = "i2c-bfin-twi",
458 .id = 0,
459 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
460 .resource = bfin_twi0_resource,
461};
462
463#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
464static struct resource bfin_twi1_resource[] = {
465 [0] = {
466 .start = TWI1_REGBASE,
467 .end = TWI1_REGBASE + 0xFF,
468 .flags = IORESOURCE_MEM,
469 },
470 [1] = {
471 .start = IRQ_TWI1,
472 .end = IRQ_TWI1,
473 .flags = IORESOURCE_IRQ,
474 },
475};
476
477static struct platform_device i2c_bfin_twi1_device = {
478 .name = "i2c-bfin-twi",
479 .id = 1,
480 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
481 .resource = bfin_twi1_resource,
482};
483#endif
484#endif
485
486#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
487#include <linux/gpio_keys.h>
488
489static struct gpio_keys_button bfin_gpio_keys_table[] = {
490 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
491};
492
493static struct gpio_keys_platform_data bfin_gpio_keys_data = {
494 .buttons = bfin_gpio_keys_table,
495 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
496};
497
498static struct platform_device bfin_device_gpiokeys = {
499 .name = "gpio-keys",
500 .dev = {
501 .platform_data = &bfin_gpio_keys_data,
502 },
503};
504#endif
505
506static const unsigned int cclk_vlev_datasheet[] =
507{
508/*
509 * Internal VLEV BF538SBBC1533
510 ****temporarily using these values until data sheet is updated
511 */
512 VRPAIR(VLEV_100, 150000000),
513 VRPAIR(VLEV_100, 250000000),
514 VRPAIR(VLEV_110, 276000000),
515 VRPAIR(VLEV_115, 301000000),
516 VRPAIR(VLEV_120, 525000000),
517 VRPAIR(VLEV_125, 550000000),
518 VRPAIR(VLEV_130, 600000000),
519};
520
521static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
522 .tuple_tab = cclk_vlev_datasheet,
523 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
524 .vr_settling_time = 25 /* us */,
525};
526
527static struct platform_device bfin_dpmc = {
528 .name = "bfin dpmc",
529 .dev = {
530 .platform_data = &bfin_dmpc_vreg_data,
531 },
532};
533
Barry Songf1cb6462009-08-03 04:40:36 +0000534#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
535static struct mtd_partition ezkit_partitions[] = {
536 {
537 .name = "bootloader(nor)",
538 .size = 0x40000,
539 .offset = 0,
540 }, {
541 .name = "linux kernel(nor)",
542 .size = 0x180000,
543 .offset = MTDPART_OFS_APPEND,
544 }, {
545 .name = "file system(nor)",
546 .size = MTDPART_SIZ_FULL,
547 .offset = MTDPART_OFS_APPEND,
548 }
549};
550
551static struct physmap_flash_data ezkit_flash_data = {
552 .width = 2,
553 .parts = ezkit_partitions,
554 .nr_parts = ARRAY_SIZE(ezkit_partitions),
555};
556
557static struct resource ezkit_flash_resource = {
558 .start = 0x20000000,
559#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
560 .end = 0x202fffff,
561#else
562 .end = 0x203fffff,
563#endif
564 .flags = IORESOURCE_MEM,
565};
566
567static struct platform_device ezkit_flash_device = {
568 .name = "physmap-flash",
569 .id = 0,
570 .dev = {
571 .platform_data = &ezkit_flash_data,
572 },
573 .num_resources = 1,
574 .resource = &ezkit_flash_resource,
575};
576#endif
577
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800578static struct platform_device *cm_bf538_devices[] __initdata = {
579
580 &bfin_dpmc,
581
582#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
583 &rtc_device,
584#endif
585
586#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
587 &bfin_uart_device,
588#endif
589
590#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
591 &bf538_spi_master0,
592 &bf538_spi_master1,
593 &bf538_spi_master2,
594#endif
595
596#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
597 &i2c_bfin_twi0_device,
598 &i2c_bfin_twi1_device,
599#endif
600
601#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800602#ifdef CONFIG_BFIN_SIR0
603 &bfin_sir0_device,
604#endif
605#ifdef CONFIG_BFIN_SIR1
606 &bfin_sir1_device,
607#endif
608#ifdef CONFIG_BFIN_SIR2
609 &bfin_sir2_device,
610#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800611#endif
612
613#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
614 &smc91x_device,
615#endif
616
617#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
618 &bfin_lq035q1_device,
619#endif
620
621#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
622 &bfin_device_gpiokeys,
623#endif
Mike Frysingerc97618d2009-01-07 23:14:38 +0800624
Barry Songf1cb6462009-08-03 04:40:36 +0000625#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
626 &ezkit_flash_device,
627#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800628};
629
630static int __init ezkit_init(void)
631{
632 printk(KERN_INFO "%s(): registering device resources\n", __func__);
633 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
634
635#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
636 spi_register_board_info(bf538_spi_board_info,
637 ARRAY_SIZE(bf538_spi_board_info));
638#endif
639
640 return 0;
641}
642
643arch_initcall(ezkit_init);