Gitiles
Code Review Sign In
review.evervolv.com / android_kernel_oneplus_msm8996 / b67bfe0d42cac56c512dd5da4b1b347a23f4b70a / . / arch / sparc / kernel / entry.h
blob: cc3c5cb47cdaa4d18e14533f5078b2dbd5f51649 [file] [log] [blame]
David S. Miller3d5ae6b2008-03-25 21:51:40 -0700[diff] [blame]1#ifndef _ENTRY_H
2#define _ENTRY_H
3
David S. Millerbfdf9eb2008-03-26 00:46:21 -0700[diff] [blame]4#include <linux/kernel.h>
David S. Miller99cd2202008-03-26 00:19:43 -0700[diff] [blame]5#include <linux/types.h>
David S. Millerbfdf9eb2008-03-26 00:46:21 -0700[diff] [blame]6#include <linux/init.h>
David S. Miller3d5ae6b2008-03-25 21:51:40 -0700[diff] [blame]7
Sam Ravnborg81265fd2008-12-08 01:08:24 -0800[diff] [blame]8/* irq */
9extern void handler_irq(int irq, struct pt_regs *regs);
10
Sam Ravnborg8d74e322008-12-08 01:04:59 -0800[diff] [blame]11#ifdef CONFIG_SPARC32
12/* traps */
13extern void do_hw_interrupt(struct pt_regs *regs, unsigned long type);
14extern void do_illegal_instruction(struct pt_regs *regs, unsigned long pc,
15 unsigned long npc, unsigned long psr);
16
17extern void do_priv_instruction(struct pt_regs *regs, unsigned long pc,
18 unsigned long npc, unsigned long psr);
19extern void do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc,
20 unsigned long npc,
21 unsigned long psr);
22extern void do_fpd_trap(struct pt_regs *regs, unsigned long pc,
23 unsigned long npc, unsigned long psr);
24extern void do_fpe_trap(struct pt_regs *regs, unsigned long pc,
25 unsigned long npc, unsigned long psr);
26extern void handle_tag_overflow(struct pt_regs *regs, unsigned long pc,
27 unsigned long npc, unsigned long psr);
28extern void handle_watchpoint(struct pt_regs *regs, unsigned long pc,
29 unsigned long npc, unsigned long psr);
30extern void handle_reg_access(struct pt_regs *regs, unsigned long pc,
31 unsigned long npc, unsigned long psr);
32extern void handle_cp_disabled(struct pt_regs *regs, unsigned long pc,
33 unsigned long npc, unsigned long psr);
34extern void handle_cp_exception(struct pt_regs *regs, unsigned long pc,
35 unsigned long npc, unsigned long psr);
36
37
38
39/* entry.S */
40extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
41 void *fpqueue, unsigned long *fpqdepth);
42extern void fpload(unsigned long *fpregs, unsigned long *fsr);
43
44#else /* CONFIG_SPARC32 */
David S. Miller0b641202011-11-17 22:44:58 -0800[diff] [blame]45
46#include <asm/trap_block.h>
47
David S. Milleref7c4d42011-07-29 09:42:07 -0700[diff] [blame]48struct popc_3insn_patch_entry {
49 unsigned int addr;
50 unsigned int insns[3];
51};
52extern struct popc_3insn_patch_entry __popc_3insn_patch,
53 __popc_3insn_patch_end;
54
David S. Miller56d205c2011-08-02 20:23:34 -0700[diff] [blame]55struct popc_6insn_patch_entry {
56 unsigned int addr;
57 unsigned int insns[6];
58};
59extern struct popc_6insn_patch_entry __popc_6insn_patch,
60 __popc_6insn_patch_end;
61
David S. Millere9b9eb52012-10-27 23:00:41 -0700[diff] [blame]62struct pause_patch_entry {
63 unsigned int addr;
64 unsigned int insns[3];
65};
David S. Miller187818c2012-10-28 13:04:47 -0700[diff] [blame]66extern struct pause_patch_entry __pause_3insn_patch,
67 __pause_3insn_patch_end;
David S. Millere9b9eb52012-10-27 23:00:41 -0700[diff] [blame]68
David S. Miller3d5ae6b2008-03-25 21:51:40 -0700[diff] [blame]69extern void __init per_cpu_patch(void);
David S. Miller0b641202011-11-17 22:44:58 -0800[diff] [blame]70extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
71 struct sun4v_1insn_patch_entry *);
72extern void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
73 struct sun4v_2insn_patch_entry *);
David S. Miller3d5ae6b2008-03-25 21:51:40 -0700[diff] [blame]74extern void __init sun4v_patch(void);
75extern void __init boot_cpu_id_too_large(int cpu);
76extern unsigned int dcache_parity_tl1_occurred;
77extern unsigned int icache_parity_tl1_occurred;
78
David S. Miller207ddd02008-03-26 01:43:29 -0700[diff] [blame]79extern asmlinkage void sparc_breakpoint(struct pt_regs *regs);
David S. Millercf3d7c12008-03-26 01:11:55 -0700[diff] [blame]80extern void timer_interrupt(int irq, struct pt_regs *regs);
81
David S. Miller062ea6d2008-03-26 01:52:18 -0700[diff] [blame]82extern void do_notify_resume(struct pt_regs *regs,
83 unsigned long orig_i0,
David S. Miller062ea6d2008-03-26 01:52:18 -0700[diff] [blame]84 unsigned long thread_info_flags);
85
David S. Millerfe06cca2008-08-24 20:10:23 -0700[diff] [blame]86extern asmlinkage int syscall_trace_enter(struct pt_regs *regs);
87extern asmlinkage void syscall_trace_leave(struct pt_regs *regs);
David S. Millerbfdf9eb2008-03-26 00:46:21 -0700[diff] [blame]88
David S. Miller99cd2202008-03-26 00:19:43 -0700[diff] [blame]89extern void bad_trap_tl1(struct pt_regs *regs, long lvl);
90
91extern void do_fpe_common(struct pt_regs *regs);
92extern void do_fpieee(struct pt_regs *regs);
93extern void do_fpother(struct pt_regs *regs);
94extern void do_tof(struct pt_regs *regs);
95extern void do_div0(struct pt_regs *regs);
96extern void do_illegal_instruction(struct pt_regs *regs);
97extern void mem_address_unaligned(struct pt_regs *regs,
98 unsigned long sfar,
99 unsigned long sfsr);
100extern void sun4v_do_mna(struct pt_regs *regs,
101 unsigned long addr,
102 unsigned long type_ctx);
103extern void do_privop(struct pt_regs *regs);
104extern void do_privact(struct pt_regs *regs);
105extern void do_cee(struct pt_regs *regs);
106extern void do_cee_tl1(struct pt_regs *regs);
107extern void do_dae_tl1(struct pt_regs *regs);
108extern void do_iae_tl1(struct pt_regs *regs);
109extern void do_div0_tl1(struct pt_regs *regs);
110extern void do_fpdis_tl1(struct pt_regs *regs);
111extern void do_fpieee_tl1(struct pt_regs *regs);
112extern void do_fpother_tl1(struct pt_regs *regs);
113extern void do_ill_tl1(struct pt_regs *regs);
114extern void do_irq_tl1(struct pt_regs *regs);
115extern void do_lddfmna_tl1(struct pt_regs *regs);
116extern void do_stdfmna_tl1(struct pt_regs *regs);
117extern void do_paw(struct pt_regs *regs);
118extern void do_paw_tl1(struct pt_regs *regs);
119extern void do_vaw(struct pt_regs *regs);
120extern void do_vaw_tl1(struct pt_regs *regs);
121extern void do_tof_tl1(struct pt_regs *regs);
122extern void do_getpsr(struct pt_regs *regs);
123
124extern void spitfire_insn_access_exception(struct pt_regs *regs,
125 unsigned long sfsr,
126 unsigned long sfar);
127extern void spitfire_insn_access_exception_tl1(struct pt_regs *regs,
128 unsigned long sfsr,
129 unsigned long sfar);
130extern void spitfire_data_access_exception(struct pt_regs *regs,
131 unsigned long sfsr,
132 unsigned long sfar);
133extern void spitfire_data_access_exception_tl1(struct pt_regs *regs,
134 unsigned long sfsr,
135 unsigned long sfar);
136extern void spitfire_access_error(struct pt_regs *regs,
137 unsigned long status_encoded,
138 unsigned long afar);
139
140extern void cheetah_fecc_handler(struct pt_regs *regs,
141 unsigned long afsr,
142 unsigned long afar);
143extern void cheetah_cee_handler(struct pt_regs *regs,
144 unsigned long afsr,
145 unsigned long afar);
146extern void cheetah_deferred_handler(struct pt_regs *regs,
147 unsigned long afsr,
148 unsigned long afar);
149extern void cheetah_plus_parity_error(int type, struct pt_regs *regs);
150
151extern void sun4v_insn_access_exception(struct pt_regs *regs,
152 unsigned long addr,
153 unsigned long type_ctx);
154extern void sun4v_insn_access_exception_tl1(struct pt_regs *regs,
155 unsigned long addr,
156 unsigned long type_ctx);
157extern void sun4v_data_access_exception(struct pt_regs *regs,
158 unsigned long addr,
159 unsigned long type_ctx);
160extern void sun4v_data_access_exception_tl1(struct pt_regs *regs,
161 unsigned long addr,
162 unsigned long type_ctx);
163extern void sun4v_resum_error(struct pt_regs *regs,
164 unsigned long offset);
165extern void sun4v_resum_overflow(struct pt_regs *regs);
166extern void sun4v_nonresum_error(struct pt_regs *regs,
167 unsigned long offset);
168extern void sun4v_nonresum_overflow(struct pt_regs *regs);
169
170extern unsigned long sun4v_err_itlb_vaddr;
171extern unsigned long sun4v_err_itlb_ctx;
172extern unsigned long sun4v_err_itlb_pte;
173extern unsigned long sun4v_err_itlb_error;
174
175extern void sun4v_itlb_error_report(struct pt_regs *regs, int tl);
176
177extern unsigned long sun4v_err_dtlb_vaddr;
178extern unsigned long sun4v_err_dtlb_ctx;
179extern unsigned long sun4v_err_dtlb_pte;
180extern unsigned long sun4v_err_dtlb_error;
181
182extern void sun4v_dtlb_error_report(struct pt_regs *regs, int tl);
183extern void hypervisor_tlbop_error(unsigned long err,
184 unsigned long op);
185extern void hypervisor_tlbop_error_xcall(unsigned long err,
186 unsigned long op);
187
188/* WARNING: The error trap handlers in assembly know the precise
189 * layout of the following structure.
190 *
191 * C-level handlers in traps.c use this information to log the
192 * error and then determine how to recover (if possible).
193 */
194struct cheetah_err_info {
195/*0x00*/u64 afsr;
196/*0x08*/u64 afar;
197
198 /* D-cache state */
199/*0x10*/u64 dcache_data[4]; /* The actual data */
200/*0x30*/u64 dcache_index; /* D-cache index */
201/*0x38*/u64 dcache_tag; /* D-cache tag/valid */
202/*0x40*/u64 dcache_utag; /* D-cache microtag */
203/*0x48*/u64 dcache_stag; /* D-cache snooptag */
204
205 /* I-cache state */
206/*0x50*/u64 icache_data[8]; /* The actual insns + predecode */
207/*0x90*/u64 icache_index; /* I-cache index */
208/*0x98*/u64 icache_tag; /* I-cache phys tag */
209/*0xa0*/u64 icache_utag; /* I-cache microtag */
210/*0xa8*/u64 icache_stag; /* I-cache snooptag */
211/*0xb0*/u64 icache_upper; /* I-cache upper-tag */
212/*0xb8*/u64 icache_lower; /* I-cache lower-tag */
213
214 /* E-cache state */
215/*0xc0*/u64 ecache_data[4]; /* 32 bytes from staging registers */
216/*0xe0*/u64 ecache_index; /* E-cache index */
217/*0xe8*/u64 ecache_tag; /* E-cache tag/state */
218
219/*0xf0*/u64 __pad[32 - 30];
220};
221#define CHAFSR_INVALID ((u64)-1L)
222
223/* This is allocated at boot time based upon the largest hardware
224 * cpu ID in the system. We allocate two entries per cpu, one for
225 * TL==0 logging and one for TL >= 1 logging.
226 */
227extern struct cheetah_err_info *cheetah_error_log;
228
David S. Millerd91aa122008-03-26 00:37:51 -0700[diff] [blame]229/* UPA nodes send interrupt packet to UltraSparc with first data reg
230 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
231 * delivered. We must translate this into a non-vector IRQ so we can
232 * set the softint on this cpu.
233 *
234 * To make processing these packets efficient and race free we use
235 * an array of irq buckets below. The interrupt vector handler in
236 * entry.S feeds incoming packets into per-cpu pil-indexed lists.
237 *
238 * If you make changes to ino_bucket, please update hand coded assembler
239 * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
240 */
241struct ino_bucket {
242/*0x00*/unsigned long __irq_chain_pa;
243
Sam Ravnborgfe414932011-01-22 11:32:19 +0000[diff] [blame]244 /* Interrupt number assigned to this INO. */
245/*0x08*/unsigned int __irq;
David S. Millerd91aa122008-03-26 00:37:51 -0700[diff] [blame]246/*0x0c*/unsigned int __pad;
247};
248
249extern struct ino_bucket *ivector_table;
250extern unsigned long ivector_table_pa;
251
David S. Millerd91aa122008-03-26 00:37:51 -0700[diff] [blame]252extern void init_irqwork_curcpu(void);
253extern void __cpuinit sun4v_register_mondo_queues(int this_cpu);
254
Sam Ravnborg8d74e322008-12-08 01:04:59 -0800[diff] [blame]255#endif /* CONFIG_SPARC32 */
David S. Miller3d5ae6b2008-03-25 21:51:40 -0700[diff] [blame]256#endif /* _ENTRY_H */