Doug Anderson | b81dfaa | 2013-04-16 06:29:00 +0000 | [diff] [blame^] | 1 | GPIO-based I2C Arbitration Using a Challenge & Response Mechanism |
| 2 | ================================================================= |
| 3 | This uses GPIO lines and a challenge & response mechanism to arbitrate who is |
| 4 | the master of an I2C bus in a multimaster situation. |
| 5 | |
| 6 | In many cases using GPIOs to arbitrate is not needed and a design can use |
| 7 | the standard I2C multi-master rules. Using GPIOs is generally useful in |
| 8 | the case where there is a device on the bus that has errata and/or bugs |
| 9 | that makes standard multimaster mode not feasible. |
| 10 | |
| 11 | |
| 12 | Algorithm: |
| 13 | |
| 14 | All masters on the bus have a 'bus claim' line which is an output that the |
| 15 | others can see. These are all active low with pull-ups enabled. We'll |
| 16 | describe these lines as: |
| 17 | |
| 18 | - OUR_CLAIM: output from us signaling to other hosts that we want the bus |
| 19 | - THEIR_CLAIMS: output from others signaling that they want the bus |
| 20 | |
| 21 | The basic algorithm is to assert your line when you want the bus, then make |
| 22 | sure that the other side doesn't want it also. A detailed explanation is best |
| 23 | done with an example. |
| 24 | |
| 25 | Let's say we want to claim the bus. We: |
| 26 | 1. Assert OUR_CLAIM. |
| 27 | 2. Waits a little bit for the other sides to notice (slew time, say 10 |
| 28 | microseconds). |
| 29 | 3. Check THEIR_CLAIMS. If none are asserted then the we have the bus and we are |
| 30 | done. |
| 31 | 4. Otherwise, wait for a few milliseconds and see if THEIR_CLAIMS are released. |
| 32 | 5. If not, back off, release the claim and wait for a few more milliseconds. |
| 33 | 6. Go back to 1 (until retry time has expired). |
| 34 | |
| 35 | |
| 36 | Required properties: |
| 37 | - compatible: i2c-arb-gpio-challenge |
| 38 | - our-claim-gpio: The GPIO that we use to claim the bus. |
| 39 | - their-claim-gpios: The GPIOs that the other sides use to claim the bus. |
| 40 | Note that some implementations may only support a single other master. |
| 41 | - Standard I2C mux properties. See mux.txt in this directory. |
| 42 | - Single I2C child bus node at reg 0. See mux.txt in this directory. |
| 43 | |
| 44 | Optional properties: |
| 45 | - slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us. |
| 46 | - wait-retry-us: we'll attempt another claim after this many microseconds. |
| 47 | Default is 3000 us. |
| 48 | - wait-free-us: we'll give up after this many microseconds. Default is 50000 us. |
| 49 | |
| 50 | |
| 51 | Example: |
| 52 | i2c@12CA0000 { |
| 53 | compatible = "acme,some-i2c-device"; |
| 54 | #address-cells = <1>; |
| 55 | #size-cells = <0>; |
| 56 | }; |
| 57 | |
| 58 | i2c-arbitrator { |
| 59 | compatible = "i2c-arb-gpio-challenge"; |
| 60 | #address-cells = <1>; |
| 61 | #size-cells = <0>; |
| 62 | |
| 63 | i2c-parent = <&{/i2c@12CA0000}>; |
| 64 | |
| 65 | our-claim-gpio = <&gpf0 3 1>; |
| 66 | their-claim-gpios = <&gpe0 4 1>; |
| 67 | slew-delay-us = <10>; |
| 68 | wait-retry-us = <3000>; |
| 69 | wait-free-us = <50000>; |
| 70 | |
| 71 | i2c@0 { |
| 72 | reg = <0>; |
| 73 | #address-cells = <1>; |
| 74 | #size-cells = <0>; |
| 75 | |
| 76 | i2c@52 { |
| 77 | // Normal I2C device |
| 78 | }; |
| 79 | }; |
| 80 | }; |