Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 1 | #include <asm/ia32.h> |
Hiroshi Shimamoto | 8869a2e | 2008-12-18 14:46:52 -0800 | [diff] [blame] | 2 | |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 3 | #define __NO_STUBS 1 |
| 4 | #undef __SYSCALL |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 5 | #undef _ASM_X86_UNISTD_64_H |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 6 | #define __SYSCALL(nr, sym) [nr] = 1, |
| 7 | static char syscalls[] = { |
| 8 | #include <asm/unistd.h> |
| 9 | }; |
| 10 | |
| 11 | int main(void) |
| 12 | { |
Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 13 | #ifdef CONFIG_PARAVIRT |
Jeremy Fitzhardinge | fab5842 | 2008-06-25 00:19:31 -0400 | [diff] [blame] | 14 | OFFSET(PV_IRQ_adjust_exception_frame, pv_irq_ops, adjust_exception_frame); |
Jeremy Fitzhardinge | 2be2998 | 2008-06-25 00:19:28 -0400 | [diff] [blame] | 15 | OFFSET(PV_CPU_usergs_sysret32, pv_cpu_ops, usergs_sysret32); |
| 16 | OFFSET(PV_CPU_usergs_sysret64, pv_cpu_ops, usergs_sysret64); |
Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 17 | OFFSET(PV_CPU_swapgs, pv_cpu_ops, swapgs); |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 18 | BLANK(); |
Glauber de Oliveira Costa | a59153dc | 2008-01-30 13:33:19 +0100 | [diff] [blame] | 19 | #endif |
| 20 | |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 21 | #ifdef CONFIG_IA32_EMULATION |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 22 | OFFSET(TI_sysenter_return, thread_info, sysenter_return); |
| 23 | BLANK(); |
| 24 | |
| 25 | #define ENTRY(entry) OFFSET(IA32_SIGCONTEXT_ ## entry, sigcontext_ia32, entry) |
H. Peter Anvin | 742fa54 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 26 | ENTRY(ax); |
| 27 | ENTRY(bx); |
| 28 | ENTRY(cx); |
| 29 | ENTRY(dx); |
| 30 | ENTRY(si); |
| 31 | ENTRY(di); |
| 32 | ENTRY(bp); |
| 33 | ENTRY(sp); |
| 34 | ENTRY(ip); |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 35 | BLANK(); |
| 36 | #undef ENTRY |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 37 | |
| 38 | OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext); |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 39 | BLANK(); |
| 40 | #endif |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 41 | |
| 42 | #define ENTRY(entry) OFFSET(pt_regs_ ## entry, pt_regs, entry) |
H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 43 | ENTRY(bx); |
| 44 | ENTRY(bx); |
| 45 | ENTRY(cx); |
| 46 | ENTRY(dx); |
| 47 | ENTRY(sp); |
| 48 | ENTRY(bp); |
| 49 | ENTRY(si); |
| 50 | ENTRY(di); |
Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 51 | ENTRY(r8); |
| 52 | ENTRY(r9); |
| 53 | ENTRY(r10); |
| 54 | ENTRY(r11); |
| 55 | ENTRY(r12); |
| 56 | ENTRY(r13); |
| 57 | ENTRY(r14); |
| 58 | ENTRY(r15); |
H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 59 | ENTRY(flags); |
Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 60 | BLANK(); |
| 61 | #undef ENTRY |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 62 | |
| 63 | #define ENTRY(entry) OFFSET(saved_context_ ## entry, saved_context, entry) |
Rafael J. Wysocki | 0de80bc | 2007-10-23 22:37:24 +0200 | [diff] [blame] | 64 | ENTRY(cr0); |
| 65 | ENTRY(cr2); |
| 66 | ENTRY(cr3); |
| 67 | ENTRY(cr4); |
| 68 | ENTRY(cr8); |
| 69 | BLANK(); |
| 70 | #undef ENTRY |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 71 | |
| 72 | OFFSET(TSS_ist, tss_struct, x86_tss.ist); |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 73 | BLANK(); |
Jan Beulich | b82fef8 | 2011-02-09 08:24:34 +0000 | [diff] [blame^] | 74 | |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 75 | DEFINE(__NR_syscall_max, sizeof(syscalls) - 1); |
Eric W. Biederman | bd53147 | 2007-10-26 11:29:04 -0600 | [diff] [blame] | 76 | |
Thomas Gleixner | c3ca5f3 | 2007-10-11 11:14:19 +0200 | [diff] [blame] | 77 | return 0; |
| 78 | } |