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review.evervolv.com / android_kernel_oneplus_msm8996 / ba6fa29c6dd51a1245a109f4b460092b51cad0f0 / . / arch / powerpc / boot / dts / p1020rdb.dts
blob: 518bf99b1f5082acdded16fbd8c8eca91005b773 [file] [log] [blame]
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]1/*
2 * P1020 RDB Device Tree Source
3 *
Prabhakar Kushwahad2f98922011-03-25 10:17:45 +0530[diff] [blame]4 * Copyright 2009-2011 Freescale Semiconductor Inc.
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
Kumar Gala4e36afa2011-10-20 02:21:09 -0500[diff] [blame]12/include/ "fsl/p1020si-pre.dtsi"
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]13/ {
Prabhakar Kushwahab6e4df42011-04-07 14:40:55 +0530[diff] [blame]14 model = "fsl,P1020RDB";
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]15 compatible = "fsl,P1020RDB";
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]16
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]17 memory {
18 device_type = "memory";
19 };
20
Kumar Gala4e36afa2011-10-20 02:21:09 -0500[diff] [blame]21 board_lbc: lbc: localbus@ffe05000 {
22 reg = <0 0xffe05000 0 0x1000>;
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]23
24 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
25 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
26 0x1 0x0 0x0 0xffa00000 0x00040000
27 0x2 0x0 0x0 0xffb00000 0x00020000>;
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]28 };
29
Kumar Gala4e36afa2011-10-20 02:21:09 -0500[diff] [blame]30 board_soc: soc: soc@ffe00000 {
31 ranges = <0x0 0x0 0xffe00000 0x100000>;
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]32 };
33
34 pci0: pcie@ffe09000 {
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]35 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
Prabhakar Kushwahad2f98922011-03-25 10:17:45 +0530[diff] [blame]36 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
Kumar Galafc2478e2011-10-19 10:58:05 -0500[diff] [blame]37 reg = <0 0xffe09000 0 0x1000>;
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]38 pcie@0 {
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]39 ranges = <0x2000000 0x0 0xa0000000
40 0x2000000 0x0 0xa0000000
41 0x0 0x20000000
42
43 0x1000000 0x0 0x0
44 0x1000000 0x0 0x0
45 0x0 0x100000>;
46 };
47 };
48
49 pci1: pcie@ffe0a000 {
Kumar Galafc2478e2011-10-19 10:58:05 -0500[diff] [blame]50 reg = <0 0xffe0a000 0 0x1000>;
Prabhakar Kushwahad2f98922011-03-25 10:17:45 +0530[diff] [blame]51 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
52 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]53 pcie@0 {
Prabhakar Kushwahad2f98922011-03-25 10:17:45 +0530[diff] [blame]54 ranges = <0x2000000 0x0 0x80000000
55 0x2000000 0x0 0x80000000
Poonam Aggrwal52dffd72009-09-25 09:50:28 +0530[diff] [blame]56 0x0 0x20000000
57
58 0x1000000 0x0 0x0
59 0x1000000 0x0 0x0
60 0x0 0x100000>;
61 };
62 };
63};
Kumar Gala4e36afa2011-10-20 02:21:09 -0500[diff] [blame]64
65/include/ "p1020rdb.dtsi"
66/include/ "fsl/p1020si-post.dtsi"