blob: 237310cc7e6ce077958857c9996725c4242d12a9 [file] [log] [blame]
Kumar Gala01af9502009-04-15 14:38:40 -05001/*
2 * P2020 DS Device Tree Source
3 *
Prabhakar Kushwahaeb2c5d92011-04-08 17:57:05 +05304 * Copyright 2009-2011 Freescale Semiconductor Inc.
Kumar Gala01af9502009-04-15 14:38:40 -05005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
Kumar Gala7f9ce712011-10-26 08:35:24 -050012/include/ "fsl/p2020si-pre.dtsi"
Prabhakar Kushwahaeb2c5d92011-04-08 17:57:05 +053013
Kumar Gala01af9502009-04-15 14:38:40 -050014/ {
Prabhakar Kushwahaeb2c5d92011-04-08 17:57:05 +053015 model = "fsl,P2020DS";
Kumar Gala01af9502009-04-15 14:38:40 -050016 compatible = "fsl,P2020DS";
Kumar Gala01af9502009-04-15 14:38:40 -050017
Kumar Gala01af9502009-04-15 14:38:40 -050018 memory {
19 device_type = "memory";
20 };
21
Kumar Gala7f9ce712011-10-26 08:35:24 -050022 board_lbc: lbc: localbus@ffe05000 {
Kumar Gala01af9502009-04-15 14:38:40 -050023 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
24 0x1 0x0 0x0 0xe0000000 0x08000000
25 0x2 0x0 0x0 0xffa00000 0x00040000
26 0x3 0x0 0x0 0xffdf0000 0x00008000
27 0x4 0x0 0x0 0xffa40000 0x00040000
28 0x5 0x0 0x0 0xffa80000 0x00040000
29 0x6 0x0 0x0 0xffac0000 0x00040000>;
Kumar Gala7f9ce712011-10-26 08:35:24 -050030 reg = <0 0xffe05000 0 0x1000>;
Kumar Gala01af9502009-04-15 14:38:40 -050031 };
32
Kumar Gala7f9ce712011-10-26 08:35:24 -050033 board_soc: soc: soc@ffe00000 {
34 ranges = <0x0 0x0 0xffe00000 0x100000>;
Kumar Gala01af9502009-04-15 14:38:40 -050035 };
36
Kumar Gala7f9ce712011-10-26 08:35:24 -050037 pci2: pcie@ffe08000 {
Kumar Gala01af9502009-04-15 14:38:40 -050038 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
39 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
Kumar Gala7f9ce712011-10-26 08:35:24 -050040 reg = <0 0xffe08000 0 0x1000>;
Kumar Gala01af9502009-04-15 14:38:40 -050041 pcie@0 {
Kumar Gala01af9502009-04-15 14:38:40 -050042 ranges = <0x2000000 0x0 0x80000000
43 0x2000000 0x0 0x80000000
44 0x0 0x20000000
45
46 0x1000000 0x0 0x0
47 0x1000000 0x0 0x0
48 0x0 0x10000>;
49 };
50 };
51
Kumar Gala7f9ce712011-10-26 08:35:24 -050052 board_pci1: pci1: pcie@ffe09000 {
Kumar Gala01af9502009-04-15 14:38:40 -050053 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
Kumar Gala7f9ce712011-10-26 08:35:24 -050055 reg = <0 0xffe09000 0 0x1000>;
Kumar Gala01af9502009-04-15 14:38:40 -050056 pcie@0 {
Kumar Gala01af9502009-04-15 14:38:40 -050057 ranges = <0x2000000 0x0 0xa0000000
58 0x2000000 0x0 0xa0000000
59 0x0 0x20000000
60
61 0x1000000 0x0 0x0
62 0x1000000 0x0 0x0
63 0x0 0x10000>;
Kumar Gala01af9502009-04-15 14:38:40 -050064 };
Kumar Gala01af9502009-04-15 14:38:40 -050065 };
66
Kumar Gala7f9ce712011-10-26 08:35:24 -050067 pci0: pcie@ffe0a000 {
Kumar Gala01af9502009-04-15 14:38:40 -050068 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
69 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
Kumar Gala7f9ce712011-10-26 08:35:24 -050070 reg = <0 0xffe0a000 0 0x1000>;
Kumar Gala01af9502009-04-15 14:38:40 -050071 pcie@0 {
Kumar Gala01af9502009-04-15 14:38:40 -050072 ranges = <0x2000000 0x0 0xc0000000
73 0x2000000 0x0 0xc0000000
74 0x0 0x20000000
75
76 0x1000000 0x0 0x0
77 0x1000000 0x0 0x0
78 0x0 0x10000>;
79 };
80 };
81};
Kumar Gala7f9ce712011-10-26 08:35:24 -050082
83/*
84 * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
85 * for interrupt-map & interrupt-map-mask
86 */
87
88/include/ "fsl/p2020si-post.dtsi"
89/include/ "p2020ds.dtsi"