| Tomasz Figa | 0f7238a | 2012-11-06 15:09:04 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos4212 SoC device tree source |
| 3 | * |
| 4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212 |
| 8 | * based board files can include this file and provide values for board specfic |
| 9 | * bindings. |
| 10 | * |
| 11 | * Note: This file does not include device nodes for all the controllers in |
| 12 | * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional |
| 13 | * nodes can be added to this file. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License version 2 as |
| 17 | * published by the Free Software Foundation. |
| 18 | */ |
| 19 | |
| 20 | /include/ "exynos4x12.dtsi" |
| 21 | |
| 22 | / { |
| 23 | compatible = "samsung,exynos4212"; |
| 24 | |
| 25 | gic:interrupt-controller@10490000 { |
| 26 | cpu-offset = <0x8000>; |
| 27 | }; |
| Thomas Abraham | bbd9700a | 2013-03-09 16:12:35 +0900 | [diff] [blame^] | 28 | |
| 29 | mct@10050000 { |
| 30 | compatible = "samsung,exynos4412-mct"; |
| 31 | reg = <0x10050000 0x800>; |
| 32 | interrupt-controller; |
| 33 | #interrups-cells = <2>; |
| 34 | interrupt-parent = <&mct_map>; |
| 35 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, |
| 36 | <4 0>, <5 0>; |
| 37 | |
| 38 | mct_map: mct-map { |
| 39 | #interrupt-cells = <2>; |
| 40 | #address-cells = <0>; |
| 41 | #size-cells = <0>; |
| 42 | interrupt-map = <0x0 0 &gic 0 57 0>, |
| 43 | <0x1 0 &combiner 12 5>, |
| 44 | <0x2 0 &combiner 12 6>, |
| 45 | <0x3 0 &combiner 12 7>, |
| 46 | <0x4 0 &gic 1 12 0>, |
| 47 | <0x5 0 &gic 1 12 0>; |
| 48 | }; |
| 49 | }; |
| Tomasz Figa | 0f7238a | 2012-11-06 15:09:04 +0900 | [diff] [blame] | 50 | }; |