| Maxime Ripard | afd24e1 | 2012-11-14 09:59:14 +0100 | [diff] [blame] | 1 | Allwinner Sunxi Interrupt Controller |
| 2 | |
| 3 | Required properties: |
| 4 | |
| 5 | - compatible : should be "allwinner,sunxi-ic" |
| 6 | - reg : Specifies base physical address and size of the registers. |
| 7 | - interrupt-controller : Identifies the node as an interrupt controller |
| 8 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 9 | interrupt source. The value shall be 1. |
| 10 | |
| 11 | The interrupt sources are as follows: |
| 12 | |
| 13 | 0: ENMI |
| 14 | 1: UART0 |
| 15 | 2: UART1 |
| 16 | 3: UART2 |
| 17 | 4: UART3 |
| 18 | 5: IR0 |
| 19 | 6: IR1 |
| 20 | 7: I2C0 |
| 21 | 8: I2C1 |
| 22 | 9: I2C2 |
| 23 | 10: SPI0 |
| 24 | 11: SPI1 |
| 25 | 12: SPI2 |
| 26 | 13: SPDIF |
| 27 | 14: AC97 |
| 28 | 15: TS |
| 29 | 16: I2S |
| 30 | 17: UART4 |
| 31 | 18: UART5 |
| 32 | 19: UART6 |
| 33 | 20: UART7 |
| 34 | 21: KEYPAD |
| 35 | 22: TIMER0 |
| 36 | 23: TIMER1 |
| 37 | 24: TIMER2 |
| 38 | 25: TIMER3 |
| 39 | 26: CAN |
| 40 | 27: DMA |
| 41 | 28: PIO |
| 42 | 29: TOUCH_PANEL |
| 43 | 30: AUDIO_CODEC |
| 44 | 31: LRADC |
| 45 | 32: SDMC0 |
| 46 | 33: SDMC1 |
| 47 | 34: SDMC2 |
| 48 | 35: SDMC3 |
| 49 | 36: MEMSTICK |
| 50 | 37: NAND |
| 51 | 38: USB0 |
| 52 | 39: USB1 |
| 53 | 40: USB2 |
| 54 | 41: SCR |
| 55 | 42: CSI0 |
| 56 | 43: CSI1 |
| 57 | 44: LCDCTRL0 |
| 58 | 45: LCDCTRL1 |
| 59 | 46: MP |
| 60 | 47: DEFEBE0 |
| 61 | 48: DEFEBE1 |
| 62 | 49: PMU |
| 63 | 50: SPI3 |
| 64 | 51: TZASC |
| 65 | 52: PATA |
| 66 | 53: VE |
| 67 | 54: SS |
| 68 | 55: EMAC |
| 69 | 56: SATA |
| 70 | 57: GPS |
| 71 | 58: HDMI |
| 72 | 59: TVE |
| 73 | 60: ACE |
| 74 | 61: TVD |
| 75 | 62: PS2_0 |
| 76 | 63: PS2_1 |
| 77 | 64: USB3 |
| 78 | 65: USB4 |
| 79 | 66: PLE_PFM |
| 80 | 67: TIMER4 |
| 81 | 68: TIMER5 |
| 82 | 69: GPU_GP |
| 83 | 70: GPU_GPMMU |
| 84 | 71: GPU_PP0 |
| 85 | 72: GPU_PPMMU0 |
| 86 | 73: GPU_PMU |
| 87 | 74: GPU_RSV0 |
| 88 | 75: GPU_RSV1 |
| 89 | 76: GPU_RSV2 |
| 90 | 77: GPU_RSV3 |
| 91 | 78: GPU_RSV4 |
| 92 | 79: GPU_RSV5 |
| 93 | 80: GPU_RSV6 |
| 94 | 82: SYNC_TIMER0 |
| 95 | 83: SYNC_TIMER1 |
| 96 | |
| 97 | Example: |
| 98 | |
| 99 | intc: interrupt-controller { |
| 100 | compatible = "allwinner,sunxi-ic"; |
| 101 | reg = <0x01c20400 0x400>; |
| 102 | interrupt-controller; |
| 103 | #interrupt-cells = <2>; |
| 104 | }; |