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review.evervolv.com / android_kernel_oneplus_msm8996 / be055b2f89b5842f41363b5655a33dffb51a8294 / . / arch / arm / boot / dts / armada-xp-mv78260.dtsi
blob: f8f2b787d2b0e759cfe8578aab6bb1e63e11dd83 [file] [log] [blame]
Thomas Petazzonif3b42b72012-09-13 17:41:48 +0200[diff] [blame]1/*
2 * Device Tree Include file for Marvell Armada XP family SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * Contains definitions specific to the Armada XP MV78260 SoC that are not
13 * common to all Armada XP SoCs.
14 */
15
16/include/ "armada-xp.dtsi"
17
18/ {
19 model = "Marvell Armada XP MV78260 SoC";
20 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
21
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]22 aliases {
23 gpio0 = &gpio0;
24 gpio1 = &gpio1;
25 gpio2 = &gpio2;
26 };
27
Gregory CLEMENT9d202782012-11-17 15:22:24 +0100[diff] [blame]28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 cpu@0 {
33 device_type = "cpu";
34 compatible = "marvell,sheeva-v7";
35 reg = <0>;
36 clocks = <&cpuclk 0>;
37 };
38
39 cpu@1 {
40 device_type = "cpu";
41 compatible = "marvell,sheeva-v7";
42 reg = <1>;
43 clocks = <&cpuclk 1>;
44 };
45 };
46
Thomas Petazzonif3b42b72012-09-13 17:41:48 +0200[diff] [blame]47 soc {
48 pinctrl {
49 compatible = "marvell,mv78260-pinctrl";
50 reg = <0xd0018000 0x38>;
Thomas Petazzoni6d36e8e2012-12-21 15:49:06 +0100[diff] [blame]51
52 sdio_pins: sdio-pins {
53 marvell,pins = "mpp30", "mpp31", "mpp32",
54 "mpp33", "mpp34", "mpp35";
55 marvell,function = "sd0";
56 };
Thomas Petazzonif3b42b72012-09-13 17:41:48 +0200[diff] [blame]57 };
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]58
59 gpio0: gpio@d0018100 {
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]60 compatible = "marvell,orion-gpio";
61 reg = <0xd0018100 0x40>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]62 ngpios = <32>;
63 gpio-controller;
64 #gpio-cells = <2>;
65 interrupt-controller;
66 #interrupts-cells = <2>;
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]67 interrupts = <82>, <83>, <84>, <85>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]68 };
69
70 gpio1: gpio@d0018140 {
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]71 compatible = "marvell,orion-gpio";
72 reg = <0xd0018140 0x40>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]73 ngpios = <32>;
74 gpio-controller;
75 #gpio-cells = <2>;
76 interrupt-controller;
77 #interrupts-cells = <2>;
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]78 interrupts = <87>, <88>, <89>, <90>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]79 };
80
81 gpio2: gpio@d0018180 {
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]82 compatible = "marvell,orion-gpio";
83 reg = <0xd0018180 0x40>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]84 ngpios = <3>;
85 gpio-controller;
86 #gpio-cells = <2>;
87 interrupt-controller;
88 #interrupts-cells = <2>;
Thomas Petazzoni5f79c652013-01-07 17:26:58 +0100[diff] [blame]89 interrupts = <91>;
Thomas Petazzoni397d59f2012-09-19 22:53:01 +0200[diff] [blame]90 };
Thomas Petazzoni77916512013-01-06 11:10:41 +0100[diff] [blame]91
92 ethernet@d0034000 {
93 compatible = "marvell,armada-370-neta";
94 reg = <0xd0034000 0x2500>;
95 interrupts = <14>;
96 clocks = <&gateclk 1>;
97 status = "disabled";
98 };
Thomas Petazzonif3b42b72012-09-13 17:41:48 +0200[diff] [blame]99 };
100};