blob: 2d00165e85ec9e7ef9dc3a7d9b9909bddd04326f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001if ARCH_CLPS711X
2
Alexander Shiyan94bd3272012-05-13 02:40:57 +04003menu "CLPS711X/EP721X/EP731X Implementations"
Linus Torvalds1da177e2005-04-16 15:20:36 -07004
5config ARCH_AUTCPU12
6 bool "AUTCPU12"
7 help
8 Say Y if you intend to run the kernel on the autronix autcpu12
9 board. This board is based on a Cirrus Logic CS89712.
10
11config ARCH_CDB89712
12 bool "CDB89712"
13 help
14 This is an evaluation board from Cirrus for the CS89712 processor.
15 The board includes 2 serial ports, Ethernet, IRDA, and expansion
16 headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
17
Linus Torvalds1da177e2005-04-16 15:20:36 -070018config ARCH_CLEP7312
19 bool "CLEP7312"
Martin Michlmayrf999b8b2006-02-08 21:09:05 +000020 help
21 Boards based on the Cirrus Logic 7212/7312 chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23config ARCH_EDB7211
24 bool "EDB7211"
Russell King05944d72006-11-30 20:43:51 +000025 select ARCH_SELECT_MEMORY_MODEL
Russell Kingb1b3f492012-10-06 17:12:25 +010026 select ARCH_SPARSEMEM_ENABLE
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 help
28 Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
29 evaluation board.
30
31config ARCH_P720T
32 bool "P720T"
33 help
34 Say Y here if you intend to run this kernel on the ARM Prospector
35 720T.
36
37config ARCH_FORTUNET
38 bool "FORTUNET"
39
Linus Torvalds1da177e2005-04-16 15:20:36 -070040config EP72XX_ROM_BOOT
Alexander Shiyan94bd3272012-05-13 02:40:57 +040041 bool "EP721x/EP731x ROM boot"
42 help
Linus Torvalds1da177e2005-04-16 15:20:36 -070043 If you say Y here, your CLPS711x-based kernel will use the bootstrap
44 mode memory map instead of the normal memory map.
45
Alexander Shiyan94bd3272012-05-13 02:40:57 +040046 Processors derived from the Cirrus CLPS711X core support two boot
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 modes. Normal mode boots from the external memory device at CS0.
48 Bootstrap mode rearranges parts of the memory map, placing an
49 internal 128 byte bootstrap ROM at CS0. This option performs the
50 address map changes required to support booting in this mode.
51
52 You almost surely want to say N here.
53
Linus Torvalds1da177e2005-04-16 15:20:36 -070054endmenu
55
56endif