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Kukjin Kim7d30e8b2011-02-14 16:33:10 +09001/* linux arch/arm/mach-exynos4/hotplug.c
Changhwan Youn11adcc22010-08-20 18:17:51 +09002 *
3 * Cloned from linux/arch/arm/mach-realview/hotplug.c
4 *
5 * Copyright (C) 2002 ARM Ltd.
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/smp.h>
JungHi Min911c29b2011-07-16 13:39:09 +090016#include <linux/io.h>
Changhwan Youn11adcc22010-08-20 18:17:51 +090017
18#include <asm/cacheflush.h>
Russell King15d07dc2012-03-28 18:30:01 +010019#include <asm/cp15.h>
Will Deaconeb504392012-01-20 12:01:12 +010020#include <asm/smp_plat.h>
Changhwan Youn11adcc22010-08-20 18:17:51 +090021
JungHi Min911c29b2011-07-16 13:39:09 +090022#include <mach/regs-pmu.h>
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090023#include <plat/cpu.h>
JungHi Min911c29b2011-07-16 13:39:09 +090024
Marc Zyngier06853ae2011-09-08 13:15:22 +010025#include "common.h"
26
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090027static inline void cpu_enter_lowpower_a9(void)
Changhwan Youn11adcc22010-08-20 18:17:51 +090028{
29 unsigned int v;
30
31 flush_cache_all();
32 asm volatile(
33 " mcr p15, 0, %1, c7, c5, 0\n"
34 " mcr p15, 0, %1, c7, c10, 4\n"
35 /*
36 * Turn off coherency
37 */
38 " mrc p15, 0, %0, c1, c0, 1\n"
Kukjin Kimad849a22011-02-28 20:35:33 +090039 " bic %0, %0, %3\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090040 " mcr p15, 0, %0, c1, c0, 1\n"
41 " mrc p15, 0, %0, c1, c0, 0\n"
Russell King30b99d02011-01-14 12:06:26 +000042 " bic %0, %0, %2\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090043 " mcr p15, 0, %0, c1, c0, 0\n"
44 : "=&r" (v)
Kukjin Kimad849a22011-02-28 20:35:33 +090045 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
Changhwan Youn11adcc22010-08-20 18:17:51 +090046 : "cc");
47}
48
Abhilash Kesavan756e46d2012-11-22 14:46:17 +090049static inline void cpu_enter_lowpower_a15(void)
50{
51 unsigned int v;
52
53 asm volatile(
54 " mrc p15, 0, %0, c1, c0, 0\n"
55 " bic %0, %0, %1\n"
56 " mcr p15, 0, %0, c1, c0, 0\n"
57 : "=&r" (v)
58 : "Ir" (CR_C)
59 : "cc");
60
61 flush_cache_louis();
62
63 asm volatile(
64 /*
65 * Turn off coherency
66 */
67 " mrc p15, 0, %0, c1, c0, 1\n"
68 " bic %0, %0, %1\n"
69 " mcr p15, 0, %0, c1, c0, 1\n"
70 : "=&r" (v)
71 : "Ir" (0x40)
72 : "cc");
73
74 isb();
75 dsb();
76}
77
Changhwan Youn11adcc22010-08-20 18:17:51 +090078static inline void cpu_leave_lowpower(void)
79{
80 unsigned int v;
81
82 asm volatile(
83 "mrc p15, 0, %0, c1, c0, 0\n"
Russell Kinge3d9c622010-12-19 11:36:33 +000084 " orr %0, %0, %1\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090085 " mcr p15, 0, %0, c1, c0, 0\n"
86 " mrc p15, 0, %0, c1, c0, 1\n"
Kukjin Kimad849a22011-02-28 20:35:33 +090087 " orr %0, %0, %2\n"
Changhwan Youn11adcc22010-08-20 18:17:51 +090088 " mcr p15, 0, %0, c1, c0, 1\n"
89 : "=&r" (v)
Kukjin Kimad849a22011-02-28 20:35:33 +090090 : "Ir" (CR_C), "Ir" (0x40)
Changhwan Youn11adcc22010-08-20 18:17:51 +090091 : "cc");
92}
93
Russell Kingd4450262010-12-19 11:30:43 +000094static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
Changhwan Youn11adcc22010-08-20 18:17:51 +090095{
Changhwan Youn11adcc22010-08-20 18:17:51 +090096 for (;;) {
JungHi Min911c29b2011-07-16 13:39:09 +090097
98 /* make cpu1 to be turned off at next WFI command */
99 if (cpu == 1)
100 __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
101
Changhwan Youn11adcc22010-08-20 18:17:51 +0900102 /*
103 * here's the WFI
104 */
105 asm(".word 0xe320f003\n"
106 :
107 :
108 : "memory", "cc");
109
Will Deacon2f41c362011-08-09 11:29:19 +0100110 if (pen_release == cpu_logical_map(cpu)) {
Changhwan Youn11adcc22010-08-20 18:17:51 +0900111 /*
112 * OK, proper wakeup, we're done
113 */
114 break;
115 }
116
117 /*
Russell Kingd4450262010-12-19 11:30:43 +0000118 * Getting here, means that we have come out of WFI without
Changhwan Youn11adcc22010-08-20 18:17:51 +0900119 * having been woken up - this shouldn't happen
120 *
Russell Kingd4450262010-12-19 11:30:43 +0000121 * Just note it happening - when we're woken, we can report
122 * its occurrence.
Changhwan Youn11adcc22010-08-20 18:17:51 +0900123 */
Russell Kingd4450262010-12-19 11:30:43 +0000124 (*spurious)++;
Changhwan Youn11adcc22010-08-20 18:17:51 +0900125 }
126}
127
Changhwan Youn11adcc22010-08-20 18:17:51 +0900128/*
129 * platform-specific code to shutdown a CPU
130 *
131 * Called with IRQs disabled
132 */
Marc Zyngier06853ae2011-09-08 13:15:22 +0100133void __ref exynos_cpu_die(unsigned int cpu)
Changhwan Youn11adcc22010-08-20 18:17:51 +0900134{
Russell Kingd4450262010-12-19 11:30:43 +0000135 int spurious = 0;
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900136 int primary_part = 0;
Russell Kingd4450262010-12-19 11:30:43 +0000137
Changhwan Youn11adcc22010-08-20 18:17:51 +0900138 /*
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900139 * we're ready for shutdown now, so do it.
140 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
141 * number by reading the Main ID register and then perform the
142 * appropriate sequence for entering low power.
Changhwan Youn11adcc22010-08-20 18:17:51 +0900143 */
Abhilash Kesavan756e46d2012-11-22 14:46:17 +0900144 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
145 if ((primary_part & 0xfff0) == 0xc0f0)
146 cpu_enter_lowpower_a15();
147 else
148 cpu_enter_lowpower_a9();
149
Russell Kingd4450262010-12-19 11:30:43 +0000150 platform_do_lowpower(cpu, &spurious);
Changhwan Youn11adcc22010-08-20 18:17:51 +0900151
152 /*
153 * bring this CPU back into the world of cache
154 * coherency, and then restore interrupts
155 */
156 cpu_leave_lowpower();
Russell Kingd4450262010-12-19 11:30:43 +0000157
158 if (spurious)
159 pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
Changhwan Youn11adcc22010-08-20 18:17:51 +0900160}