blob: fe6149624b849aa2dd624115711e1eb1e9fcbee6 [file] [log] [blame]
Kukjin Kimbe4ab362011-08-24 17:25:09 +09001/*
Changhwan Youn31451af2011-10-04 17:09:26 +09002 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
Kukjin Kimbe4ab362011-08-24 17:25:09 +09003 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
Sachin Kamat6bba0ca2012-07-13 18:58:53 +090016#include <linux/lcd.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090017#include <linux/mfd/max8997.h>
18#include <linux/mmc/host.h>
19#include <linux/platform_device.h>
Sachin Kamat20aa1982012-09-13 15:52:11 +090020#include <linux/pwm.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090021#include <linux/pwm_backlight.h>
22#include <linux/regulator/machine.h>
23#include <linux/serial_core.h>
Jingoo Hanf034d852012-11-07 08:11:30 +090024#include <linux/platform_data/i2c-s3c2410.h>
Sachin Kamata17b9852012-07-13 18:41:31 +090025#include <linux/platform_data/s3c-hsotg.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090026
27#include <asm/mach/arch.h>
28#include <asm/mach-types.h>
29
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +090030#include <video/samsung_fimd.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090031#include <plat/backlight.h>
32#include <plat/clock.h>
33#include <plat/cpu.h>
34#include <plat/devs.h>
Sachin Kamat6bba0ca2012-07-13 18:58:53 +090035#include <plat/fb.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090036#include <plat/gpio-cfg.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090037#include <plat/keypad.h>
Sachin Kamat691bcb32012-05-12 16:36:19 +090038#include <plat/mfc.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090039#include <plat/regs-serial.h>
40#include <plat/sdhci.h>
41
42#include <mach/map.h>
43
Sachin Kamatb96db042012-07-19 14:41:01 +090044#include <drm/exynos_drm.h>
Kukjin Kimcc511b82011-12-27 08:18:36 +010045#include "common.h"
46
Kukjin Kimbe4ab362011-08-24 17:25:09 +090047/* Following are default values for UCON, ULCON and UFCON UART registers */
Changhwan Youn31451af2011-10-04 17:09:26 +090048#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090049 S3C2410_UCON_RXILEVEL | \
50 S3C2410_UCON_TXIRQMODE | \
51 S3C2410_UCON_RXIRQMODE | \
52 S3C2410_UCON_RXFIFO_TOI | \
53 S3C2443_UCON_RXERR_IRQEN)
54
Changhwan Youn31451af2011-10-04 17:09:26 +090055#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
Kukjin Kimbe4ab362011-08-24 17:25:09 +090056
Changhwan Youn31451af2011-10-04 17:09:26 +090057#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090058 S5PV210_UFCON_TXTRIG4 | \
59 S5PV210_UFCON_RXTRIG4)
60
Changhwan Youn31451af2011-10-04 17:09:26 +090061static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090062 [0] = {
63 .hwport = 0,
64 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090065 .ucon = SMDK4X12_UCON_DEFAULT,
66 .ulcon = SMDK4X12_ULCON_DEFAULT,
67 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090068 },
69 [1] = {
70 .hwport = 1,
71 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090072 .ucon = SMDK4X12_UCON_DEFAULT,
73 .ulcon = SMDK4X12_ULCON_DEFAULT,
74 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090075 },
76 [2] = {
77 .hwport = 2,
78 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090079 .ucon = SMDK4X12_UCON_DEFAULT,
80 .ulcon = SMDK4X12_ULCON_DEFAULT,
81 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090082 },
83 [3] = {
84 .hwport = 3,
85 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090086 .ucon = SMDK4X12_UCON_DEFAULT,
87 .ulcon = SMDK4X12_ULCON_DEFAULT,
88 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090089 },
90};
91
Changhwan Youn31451af2011-10-04 17:09:26 +090092static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090093 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090094#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
95 .max_width = 8,
96 .host_caps = MMC_CAP_8_BIT_DATA,
97#endif
98};
99
Changhwan Youn31451af2011-10-04 17:09:26 +0900100static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900101 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900102};
103
104static struct regulator_consumer_supply max8997_buck1 =
105 REGULATOR_SUPPLY("vdd_arm", NULL);
106
107static struct regulator_consumer_supply max8997_buck2 =
108 REGULATOR_SUPPLY("vdd_int", NULL);
109
110static struct regulator_consumer_supply max8997_buck3 =
111 REGULATOR_SUPPLY("vdd_g3d", NULL);
112
113static struct regulator_init_data max8997_buck1_data = {
114 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900115 .name = "VDD_ARM_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900116 .min_uV = 925000,
117 .max_uV = 1350000,
118 .always_on = 1,
119 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
120 .state_mem = {
121 .disabled = 1,
122 },
123 },
124 .num_consumer_supplies = 1,
125 .consumer_supplies = &max8997_buck1,
126};
127
128static struct regulator_init_data max8997_buck2_data = {
129 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900130 .name = "VDD_INT_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900131 .min_uV = 950000,
132 .max_uV = 1150000,
133 .always_on = 1,
134 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
135 .state_mem = {
136 .disabled = 1,
137 },
138 },
139 .num_consumer_supplies = 1,
140 .consumer_supplies = &max8997_buck2,
141};
142
143static struct regulator_init_data max8997_buck3_data = {
144 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900145 .name = "VDD_G3D_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900146 .min_uV = 950000,
147 .max_uV = 1150000,
148 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
149 REGULATOR_CHANGE_STATUS,
150 .state_mem = {
151 .disabled = 1,
152 },
153 },
154 .num_consumer_supplies = 1,
155 .consumer_supplies = &max8997_buck3,
156};
157
Changhwan Youn31451af2011-10-04 17:09:26 +0900158static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900159 { MAX8997_BUCK1, &max8997_buck1_data },
160 { MAX8997_BUCK2, &max8997_buck2_data },
161 { MAX8997_BUCK3, &max8997_buck3_data },
162};
163
Changhwan Youn31451af2011-10-04 17:09:26 +0900164static struct max8997_platform_data smdk4x12_max8997_pdata = {
165 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
166 .regulators = smdk4x12_max8997_regulators,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900167
168 .buck1_voltage[0] = 1100000, /* 1.1V */
169 .buck1_voltage[1] = 1100000, /* 1.1V */
170 .buck1_voltage[2] = 1100000, /* 1.1V */
171 .buck1_voltage[3] = 1100000, /* 1.1V */
172 .buck1_voltage[4] = 1100000, /* 1.1V */
173 .buck1_voltage[5] = 1100000, /* 1.1V */
174 .buck1_voltage[6] = 1000000, /* 1.0V */
175 .buck1_voltage[7] = 950000, /* 0.95V */
176
177 .buck2_voltage[0] = 1100000, /* 1.1V */
178 .buck2_voltage[1] = 1000000, /* 1.0V */
179 .buck2_voltage[2] = 950000, /* 0.95V */
180 .buck2_voltage[3] = 900000, /* 0.9V */
181 .buck2_voltage[4] = 1100000, /* 1.1V */
182 .buck2_voltage[5] = 1000000, /* 1.0V */
183 .buck2_voltage[6] = 950000, /* 0.95V */
184 .buck2_voltage[7] = 900000, /* 0.9V */
185
186 .buck5_voltage[0] = 1100000, /* 1.1V */
187 .buck5_voltage[1] = 1100000, /* 1.1V */
188 .buck5_voltage[2] = 1100000, /* 1.1V */
189 .buck5_voltage[3] = 1100000, /* 1.1V */
190 .buck5_voltage[4] = 1100000, /* 1.1V */
191 .buck5_voltage[5] = 1100000, /* 1.1V */
192 .buck5_voltage[6] = 1100000, /* 1.1V */
193 .buck5_voltage[7] = 1100000, /* 1.1V */
194};
195
Changhwan Youn31451af2011-10-04 17:09:26 +0900196static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900197 {
198 I2C_BOARD_INFO("max8997", 0x66),
Changhwan Youn31451af2011-10-04 17:09:26 +0900199 .platform_data = &smdk4x12_max8997_pdata,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900200 }
201};
202
Changhwan Youn31451af2011-10-04 17:09:26 +0900203static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900204 { I2C_BOARD_INFO("wm8994", 0x1a), }
205};
206
Changhwan Youn31451af2011-10-04 17:09:26 +0900207static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900208 /* nothing here yet */
209};
210
Changhwan Youn31451af2011-10-04 17:09:26 +0900211static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900212 /* nothing here yet */
213};
214
Changhwan Youn31451af2011-10-04 17:09:26 +0900215static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900216 .no = EXYNOS4_GPD0(1),
217 .func = S3C_GPIO_SFN(2),
218};
219
Changhwan Youn31451af2011-10-04 17:09:26 +0900220static struct platform_pwm_backlight_data smdk4x12_bl_data = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900221 .pwm_id = 1,
222 .pwm_period_ns = 1000,
223};
224
Sachin Kamat20aa1982012-09-13 15:52:11 +0900225static struct pwm_lookup smdk4x12_pwm_lookup[] = {
226 PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
227};
228
Changhwan Youn31451af2011-10-04 17:09:26 +0900229static uint32_t smdk4x12_keymap[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900230 /* KEY(row, col, keycode) */
Sachin Kamat33fe1a42012-06-20 09:12:33 +0900231 KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
232 KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
233 KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
234 KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900235};
236
Changhwan Youn31451af2011-10-04 17:09:26 +0900237static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
238 .keymap = smdk4x12_keymap,
239 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900240};
241
Changhwan Youn31451af2011-10-04 17:09:26 +0900242static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
243 .keymap_data = &smdk4x12_keymap_data,
Sachin Kamat33fe1a42012-06-20 09:12:33 +0900244 .rows = 3,
245 .cols = 8,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900246};
247
Sachin Kamatbdd18532012-12-18 08:55:17 -0800248#ifdef CONFIG_DRM_EXYNOS_FIMD
Sachin Kamatb96db042012-07-19 14:41:01 +0900249static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
250 .panel = {
251 .timing = {
252 .left_margin = 8,
253 .right_margin = 8,
254 .upper_margin = 6,
255 .lower_margin = 6,
256 .hsync_len = 6,
257 .vsync_len = 4,
258 .xres = 480,
259 .yres = 800,
260 },
261 },
262 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
263 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
264 .default_win = 0,
265 .bpp = 32,
266};
267#else
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900268static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
269 .xres = 480,
270 .yres = 800,
271 .virtual_x = 480,
272 .virtual_y = 800 * 2,
273 .max_bpp = 32,
274 .default_bpp = 24,
275};
276
277static struct fb_videomode smdk4x12_lcd_timing = {
278 .left_margin = 8,
279 .right_margin = 8,
280 .upper_margin = 6,
281 .lower_margin = 6,
282 .hsync_len = 6,
283 .vsync_len = 4,
284 .xres = 480,
285 .yres = 800,
286};
287
288static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
289 .win[0] = &smdk4x12_fb_win0,
290 .vtiming = &smdk4x12_lcd_timing,
291 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
292 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
293 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
294};
Sachin Kamatb96db042012-07-19 14:41:01 +0900295#endif
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900296
Sachin Kamata17b9852012-07-13 18:41:31 +0900297/* USB OTG */
298static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
299
Changhwan Youn31451af2011-10-04 17:09:26 +0900300static struct platform_device *smdk4x12_devices[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900301 &s3c_device_hsmmc2,
302 &s3c_device_hsmmc3,
303 &s3c_device_i2c0,
304 &s3c_device_i2c1,
305 &s3c_device_i2c3,
306 &s3c_device_i2c7,
307 &s3c_device_rtc,
Sachin Kamata17b9852012-07-13 18:41:31 +0900308 &s3c_device_usb_hsotg,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900309 &s3c_device_wdt,
Sachin Kamat8e84e7d2012-05-12 16:36:22 +0900310 &s5p_device_fimc0,
311 &s5p_device_fimc1,
312 &s5p_device_fimc2,
313 &s5p_device_fimc3,
314 &s5p_device_fimc_md,
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900315 &s5p_device_fimd0,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900316 &s5p_device_mfc,
317 &s5p_device_mfc_l,
318 &s5p_device_mfc_r,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900319 &samsung_device_keypad,
320};
321
Changhwan Youn31451af2011-10-04 17:09:26 +0900322static void __init smdk4x12_map_io(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900323{
Kukjin Kimcc511b82011-12-27 08:18:36 +0100324 exynos_init_io(NULL, 0);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900325 s3c24xx_init_clocks(clk_xusbxti.rate);
Changhwan Youn31451af2011-10-04 17:09:26 +0900326 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900327}
328
Sachin Kamat691bcb32012-05-12 16:36:19 +0900329static void __init smdk4x12_reserve(void)
330{
331 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
332}
333
Changhwan Youn31451af2011-10-04 17:09:26 +0900334static void __init smdk4x12_machine_init(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900335{
336 s3c_i2c0_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900337 i2c_register_board_info(0, smdk4x12_i2c_devs0,
338 ARRAY_SIZE(smdk4x12_i2c_devs0));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900339
340 s3c_i2c1_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900341 i2c_register_board_info(1, smdk4x12_i2c_devs1,
342 ARRAY_SIZE(smdk4x12_i2c_devs1));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900343
344 s3c_i2c3_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900345 i2c_register_board_info(3, smdk4x12_i2c_devs3,
346 ARRAY_SIZE(smdk4x12_i2c_devs3));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900347
348 s3c_i2c7_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900349 i2c_register_board_info(7, smdk4x12_i2c_devs7,
350 ARRAY_SIZE(smdk4x12_i2c_devs7));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900351
Changhwan Youn31451af2011-10-04 17:09:26 +0900352 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
Sachin Kamat20aa1982012-09-13 15:52:11 +0900353 pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900354
Changhwan Youn31451af2011-10-04 17:09:26 +0900355 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900356
Changhwan Youn31451af2011-10-04 17:09:26 +0900357 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
358 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900359
Sachin Kamata17b9852012-07-13 18:41:31 +0900360 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
361
Sachin Kamatbdd18532012-12-18 08:55:17 -0800362#ifdef CONFIG_DRM_EXYNOS_FIMD
Sachin Kamatb96db042012-07-19 14:41:01 +0900363 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
364 exynos4_fimd0_gpio_setup_24bpp();
365#else
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900366 s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
Sachin Kamatb96db042012-07-19 14:41:01 +0900367#endif
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900368
Changhwan Youn31451af2011-10-04 17:09:26 +0900369 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900370}
371
372MACHINE_START(SMDK4212, "SMDK4212")
373 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Changhwan Youn31451af2011-10-04 17:09:26 +0900374 .atag_offset = 0x100,
Marc Zyngier06853ae2011-09-08 13:15:22 +0100375 .smp = smp_ops(exynos_smp_ops),
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900376 .init_irq = exynos4_init_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900377 .map_io = smdk4x12_map_io,
378 .init_machine = smdk4x12_machine_init,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700379 .init_time = exynos4_timer_init,
Russell King9eb48592012-01-03 11:56:53 +0100380 .restart = exynos4_restart,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900381 .reserve = &smdk4x12_reserve,
Changhwan Youn31451af2011-10-04 17:09:26 +0900382MACHINE_END
383
384MACHINE_START(SMDK4412, "SMDK4412")
385 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
386 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
387 .atag_offset = 0x100,
Marc Zyngier06853ae2011-09-08 13:15:22 +0100388 .smp = smp_ops(exynos_smp_ops),
Changhwan Youn31451af2011-10-04 17:09:26 +0900389 .init_irq = exynos4_init_irq,
390 .map_io = smdk4x12_map_io,
391 .init_machine = smdk4x12_machine_init,
Shawn Guobb13fab2012-04-26 10:35:40 +0800392 .init_late = exynos_init_late,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700393 .init_time = exynos4_timer_init,
Russell King9eb48592012-01-03 11:56:53 +0100394 .restart = exynos4_restart,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900395 .reserve = &smdk4x12_reserve,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900396MACHINE_END