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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2412/dma.c
Ben Dooks34348012006-09-18 23:52:03 +01002 *
Ben Dooksc16f7bd2006-12-17 20:05:21 +01003 * Copyright (c) 2006 Simtec Electronics
Ben Dooks34348012006-09-18 23:52:03 +01004 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2412 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/init.h>
Kay Sievers4a858cf2011-12-21 16:01:38 -080017#include <linux/device.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010018#include <linux/serial_core.h>
Russell Kingfced80c2008-09-06 12:10:45 +010019#include <linux/io.h>
Ben Dooks34348012006-09-18 23:52:03 +010020
Russell Kinga09e64f2008-08-05 16:14:15 +010021#include <mach/dma.h>
Ben Dooks34348012006-09-18 23:52:03 +010022
Ben Dooks992426b2010-02-20 23:01:33 +000023#include <plat/dma-s3c24xx.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010024#include <plat/cpu.h>
Ben Dooks34348012006-09-18 23:52:03 +010025
Ben Dooksa2b7ba92008-10-07 22:26:09 +010026#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/regs-gpio.h>
Ben Dooksf74c95c2008-10-30 10:14:36 +000028#include <plat/regs-ac97.h>
Ben Dooks44dc9402009-03-19 15:02:35 +000029#include <plat/regs-dma.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/regs-lcd.h>
31#include <mach/regs-sdi.h>
Ben Dooks8150bc82009-03-04 00:49:26 +000032#include <plat/regs-iis.h>
Ben Dooks13622702008-10-30 10:14:38 +000033#include <plat/regs-spi.h>
Ben Dooks34348012006-09-18 23:52:03 +010034
35#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
36
37static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
38 [DMACH_XD0] = {
39 .name = "xdreq0",
40 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
Ben Dooksc6709e82008-01-28 13:01:20 +010041 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
Ben Dooks34348012006-09-18 23:52:03 +010042 },
43 [DMACH_XD1] = {
44 .name = "xdreq1",
45 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
Ben Dooksc6709e82008-01-28 13:01:20 +010046 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
Ben Dooks34348012006-09-18 23:52:03 +010047 },
48 [DMACH_SDI] = {
49 .name = "sdi",
50 .channels = MAP(S3C2412_DMAREQSEL_SDI),
Ben Dooksc6709e82008-01-28 13:01:20 +010051 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
Ben Dooks34348012006-09-18 23:52:03 +010052 },
53 [DMACH_SPI0] = {
54 .name = "spi0",
55 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
Ben Dooksc6709e82008-01-28 13:01:20 +010056 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
Ben Dooks34348012006-09-18 23:52:03 +010057 },
58 [DMACH_SPI1] = {
59 .name = "spi1",
60 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
Ben Dooksc6709e82008-01-28 13:01:20 +010061 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
Ben Dooks34348012006-09-18 23:52:03 +010062 },
63 [DMACH_UART0] = {
64 .name = "uart0",
65 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
Ben Dooksc6709e82008-01-28 13:01:20 +010066 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
Ben Dooks34348012006-09-18 23:52:03 +010067 },
68 [DMACH_UART1] = {
69 .name = "uart1",
70 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
Ben Dooksc6709e82008-01-28 13:01:20 +010071 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
Ben Dooks34348012006-09-18 23:52:03 +010072 },
73 [DMACH_UART2] = {
74 .name = "uart2",
75 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
Ben Dooksc6709e82008-01-28 13:01:20 +010076 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
Ben Dooks34348012006-09-18 23:52:03 +010077 },
78 [DMACH_UART0_SRC2] = {
79 .name = "uart0",
80 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
Ben Dooksc6709e82008-01-28 13:01:20 +010081 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
Ben Dooks34348012006-09-18 23:52:03 +010082 },
83 [DMACH_UART1_SRC2] = {
84 .name = "uart1",
85 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
Ben Dooksc6709e82008-01-28 13:01:20 +010086 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
Ben Dooks34348012006-09-18 23:52:03 +010087 },
88 [DMACH_UART2_SRC2] = {
89 .name = "uart2",
90 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
Ben Dooksc6709e82008-01-28 13:01:20 +010091 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
Ben Dooks34348012006-09-18 23:52:03 +010092 },
93 [DMACH_TIMER] = {
94 .name = "timer",
95 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
Ben Dooksc6709e82008-01-28 13:01:20 +010096 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
Ben Dooks34348012006-09-18 23:52:03 +010097 },
98 [DMACH_I2S_IN] = {
99 .name = "i2s-sdi",
100 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
Ben Dooksc6709e82008-01-28 13:01:20 +0100101 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
Ben Dooks34348012006-09-18 23:52:03 +0100102 },
103 [DMACH_I2S_OUT] = {
104 .name = "i2s-sdo",
105 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
Ben Dooksc6709e82008-01-28 13:01:20 +0100106 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
Ben Dooks34348012006-09-18 23:52:03 +0100107 },
108 [DMACH_USB_EP1] = {
109 .name = "usb-ep1",
110 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
Ben Dooksc6709e82008-01-28 13:01:20 +0100111 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
Ben Dooks34348012006-09-18 23:52:03 +0100112 },
113 [DMACH_USB_EP2] = {
114 .name = "usb-ep2",
115 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
Ben Dooksc6709e82008-01-28 13:01:20 +0100116 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
Ben Dooks34348012006-09-18 23:52:03 +0100117 },
118 [DMACH_USB_EP3] = {
119 .name = "usb-ep3",
120 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
Ben Dooksc6709e82008-01-28 13:01:20 +0100121 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
Ben Dooks34348012006-09-18 23:52:03 +0100122 },
123 [DMACH_USB_EP4] = {
124 .name = "usb-ep4",
125 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
Ben Dooksc6709e82008-01-28 13:01:20 +0100126 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
Ben Dooks34348012006-09-18 23:52:03 +0100127 },
128};
129
Ben Dooksc6709e82008-01-28 13:01:20 +0100130static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
131 struct s3c24xx_dma_map *map,
Boojin Kim51ddf312011-09-02 09:44:44 +0900132 enum dma_data_direction dir)
Ben Dooksc6709e82008-01-28 13:01:20 +0100133{
134 unsigned long chsel;
135
Boojin Kim51ddf312011-09-02 09:44:44 +0900136 if (dir == DMA_FROM_DEVICE)
Ben Dooksc6709e82008-01-28 13:01:20 +0100137 chsel = map->channels_rx[0];
138 else
139 chsel = map->channels[0];
140
141 chsel &= ~DMA_CH_VALID;
142 chsel |= S3C2412_DMAREQSEL_HW;
143
144 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
145}
146
Ben Dooks34348012006-09-18 23:52:03 +0100147static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
148 struct s3c24xx_dma_map *map)
149{
Ben Dooksc6709e82008-01-28 13:01:20 +0100150 s3c2412_dma_direction(chan, map, chan->source);
Ben Dooks34348012006-09-18 23:52:03 +0100151}
152
153static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
154 .select = s3c2412_dma_select,
Ben Dooksc6709e82008-01-28 13:01:20 +0100155 .direction = s3c2412_dma_direction,
Ben Dooks34348012006-09-18 23:52:03 +0100156 .dcon_mask = 0,
157 .map = s3c2412_dma_mappings,
158 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
159};
160
Heiko Stuebner04511a62012-01-27 15:35:25 +0900161static int __init s3c2412_dma_add(struct device *dev,
162 struct subsys_interface *sif)
Ben Dooks34348012006-09-18 23:52:03 +0100163{
Ben Dooks48adbcf2007-02-17 15:37:14 +0100164 s3c2410_dma_init();
Ben Dooks34348012006-09-18 23:52:03 +0100165 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
166}
167
Kay Sievers4a858cf2011-12-21 16:01:38 -0800168static struct subsys_interface s3c2412_dma_interface = {
169 .name = "s3c2412_dma",
170 .subsys = &s3c2412_subsys,
171 .add_dev = s3c2412_dma_add,
Ben Dooks34348012006-09-18 23:52:03 +0100172};
173
174static int __init s3c2412_dma_init(void)
175{
Kay Sievers4a858cf2011-12-21 16:01:38 -0800176 return subsys_interface_register(&s3c2412_dma_interface);
Ben Dooks34348012006-09-18 23:52:03 +0100177}
178
179arch_initcall(s3c2412_dma_init);