blob: 95114ed395ac6939d6a82551c289de52fa943edf [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Lars-Peter Clausen90590542011-11-11 11:06:38 +010010#include <linux/export.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080011#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070012#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000013#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070014#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080015#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070016#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080017#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080018#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070019#include <linux/spi/spi.h>
20#include <linux/spi/flash.h>
21#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080022#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070023#endif
Sonic Zhang7a9cc482009-12-22 04:47:04 +000024#include <linux/i2c.h>
25#include <linux/i2c/adp5588.h>
Mike Frysinger0531c462010-01-19 07:04:29 +000026#include <linux/etherdevice.h>
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050027#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070028#include <linux/irq.h>
29#include <linux/interrupt.h>
David Brownell27f5d752007-10-04 18:06:16 -070030#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080031#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000032#include <linux/leds.h>
33#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080034#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080035#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080036#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080037#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080038#include <asm/dpmc.h>
Scott Jiang6f53dbb2011-03-01 09:43:50 +000039#include <asm/bfin_sport.h>
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000040#ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
41#include <linux/regulator/fixed.h>
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +000042#endif
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000043#include <linux/regulator/machine.h>
Sonic Zhangf32792d2010-02-09 02:47:09 +000044#include <linux/regulator/consumer.h>
45#include <linux/regulator/userspace-consumer.h>
Bryan Wu1394f032007-05-06 14:50:22 -070046
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080050const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070051
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
Bryan Wu1394f032007-05-06 14:50:22 -070056#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080057#include <linux/usb/isp1760.h>
58static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070059 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080060 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070062 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080065 .start = IRQ_PF7,
66 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080067 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070068 },
69};
70
Michael Hennerich3f375692008-11-18 17:48:22 +080071static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080073 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
78};
79
80static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb762009-10-15 10:37:33 +000081 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070082 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080083 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070088};
Bryan Wu1394f032007-05-06 14:50:22 -070089#endif
90
Michael Hennerich2463ef22008-01-27 16:49:48 +080091#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080092#include <linux/gpio_keys.h>
93
94static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99};
100
101static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104};
105
106static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111};
112#endif
113
Bryan Wu1394f032007-05-06 14:50:22 -0700114#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800120 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800121 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800124 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800128 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133};
134
135static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140};
141#endif
142
143#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147};
148#endif
149
150#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000151#include <linux/smc91x.h>
152
153static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157};
158
Bryan Wu1394f032007-05-06 14:50:22 -0700159static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800165 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171};
172static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000177 .dev = {
178 .platform_data = &smc91x_info,
179 },
Bryan Wu1394f032007-05-06 14:50:22 -0700180};
181#endif
182
Alex Landauf40d24d2007-07-12 12:11:48 +0800183#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000187 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200};
201
202static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207};
208#endif
209
Bryan Wu1394f032007-05-06 14:50:22 -0700210#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800216 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800220 }, {
Mike Frysinger01218652009-12-21 15:07:43 +0000221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
Bryan Wu1394f032007-05-06 14:50:22 -0700223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225};
226
227#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228void sl811_port_power(struct device *dev, int is_on)
229{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700232}
233#endif
234
235static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240#endif
241};
242
243static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251};
252#endif
253
254#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800260 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800264 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
Michael Hennerich9e758942010-03-18 12:51:49 +0000267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
Bryan Wu1394f032007-05-06 14:50:22 -0700268 },
269};
270
271static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280};
281
282static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290};
291#endif
292
Barry Song706a01b2009-11-02 07:29:07 +0000293#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000294static unsigned short bfin_can_peripherals[] = {
Barry Song706a01b2009-11-02 07:29:07 +0000295 P_CAN0_RX, P_CAN0_TX, 0
296};
297
298static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319};
320
321static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328};
329#endif
330
Bryan Wu1394f032007-05-06 14:50:22 -0700331#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Sonic Zhang02460d02010-06-11 10:44:22 +0000332#include <linux/bfin_mac.h>
333static const unsigned short bfin_mac_peripherals[] = P_MII0;
334
335static struct bfin_phydev_platform_data bfin_phydev_data[] = {
336 {
337 .addr = 1,
338 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
339 },
340};
341
342static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
343 .phydev_number = 1,
344 .phydev_data = bfin_phydev_data,
345 .phy_mode = PHY_INTERFACE_MODE_MII,
346 .mac_peripherals = bfin_mac_peripherals,
347};
348
Graf Yang65319622009-02-04 16:49:45 +0800349static struct platform_device bfin_mii_bus = {
350 .name = "bfin_mii_bus",
Sonic Zhang02460d02010-06-11 10:44:22 +0000351 .dev = {
352 .platform_data = &bfin_mii_bus_data,
353 }
Graf Yang65319622009-02-04 16:49:45 +0800354};
355
Bryan Wu1394f032007-05-06 14:50:22 -0700356static struct platform_device bfin_mac_device = {
357 .name = "bfin_mac",
Sonic Zhang02460d02010-06-11 10:44:22 +0000358 .dev = {
359 .platform_data = &bfin_mii_bus,
360 }
Bryan Wu1394f032007-05-06 14:50:22 -0700361};
362#endif
363
364#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
365static struct resource net2272_bfin_resources[] = {
366 {
367 .start = 0x20300000,
368 .end = 0x20300000 + 0x100,
369 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800370 }, {
Mike Frysinger9be86312011-05-04 11:20:15 -0400371 .start = 1,
372 .flags = IORESOURCE_BUS,
373 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700374 .start = IRQ_PF7,
375 .end = IRQ_PF7,
376 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
377 },
378};
379
380static struct platform_device net2272_bfin_device = {
381 .name = "net2272",
382 .id = -1,
383 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
384 .resource = net2272_bfin_resources,
385};
386#endif
387
Mike Frysingerfc689112008-06-25 11:41:42 +0800388#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
Mike Frysingerfc689112008-06-25 11:41:42 +0800389const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
390
391static struct mtd_partition bfin_plat_nand_partitions[] = {
392 {
Robin Getzaa582972008-08-05 17:47:29 +0800393 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800394 .size = 0x400000,
395 .offset = 0,
396 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800397 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800398 .size = MTDPART_SIZ_FULL,
399 .offset = MTDPART_OFS_APPEND,
400 },
401};
Mike Frysingerfc689112008-06-25 11:41:42 +0800402
403#define BFIN_NAND_PLAT_CLE 2
404#define BFIN_NAND_PLAT_ALE 1
405static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
406{
407 struct nand_chip *this = mtd->priv;
408
409 if (cmd == NAND_CMD_NONE)
410 return;
411
412 if (ctrl & NAND_CLE)
413 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
414 else
415 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
416}
417
418#define BFIN_NAND_PLAT_READY GPIO_PF3
419static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
420{
421 return gpio_get_value(BFIN_NAND_PLAT_READY);
422}
423
424static struct platform_nand_data bfin_plat_nand_data = {
425 .chip = {
Marek Vasutef566092010-08-12 03:53:54 +0100426 .nr_chips = 1,
Mike Frysingerfc689112008-06-25 11:41:42 +0800427 .chip_delay = 30,
Mike Frysingerfc689112008-06-25 11:41:42 +0800428 .part_probe_types = part_probes,
429 .partitions = bfin_plat_nand_partitions,
430 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
Mike Frysingerfc689112008-06-25 11:41:42 +0800431 },
432 .ctrl = {
433 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
434 .dev_ready = bfin_plat_nand_dev_ready,
435 },
436};
437
438#define MAX(x, y) (x > y ? x : y)
439static struct resource bfin_plat_nand_resources = {
440 .start = 0x20212000,
441 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
Mike Frysinger67d99632010-03-16 14:28:44 +0000442 .flags = IORESOURCE_MEM,
Mike Frysingerfc689112008-06-25 11:41:42 +0800443};
444
445static struct platform_device bfin_async_nand_device = {
446 .name = "gen_nand",
447 .id = -1,
448 .num_resources = 1,
449 .resource = &bfin_plat_nand_resources,
450 .dev = {
451 .platform_data = &bfin_plat_nand_data,
452 },
453};
454
455static void bfin_plat_nand_init(void)
456{
457 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
458}
459#else
460static void bfin_plat_nand_init(void) {}
461#endif
462
Mike Frysinger793dc272008-03-26 08:09:12 +0800463#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800464static struct mtd_partition stamp_partitions[] = {
465 {
Robin Getzaa582972008-08-05 17:47:29 +0800466 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800467 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800468 .offset = 0,
469 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800470 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800471 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800472 .offset = MTDPART_OFS_APPEND,
473 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800474 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800475 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800476 .offset = MTDPART_OFS_APPEND,
477 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800478 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800479 .size = MTDPART_SIZ_FULL,
480 .offset = 0x3F0000,
481 .mask_flags = MTD_WRITEABLE,
482 }
483};
484
485static struct physmap_flash_data stamp_flash_data = {
486 .width = 2,
487 .parts = stamp_partitions,
488 .nr_parts = ARRAY_SIZE(stamp_partitions),
Barry Song38e76732010-01-15 03:24:39 +0000489#ifdef CONFIG_ROMKERNEL
490 .probe_type = "map_rom",
491#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800492};
493
494static struct resource stamp_flash_resource = {
495 .start = 0x20000000,
496 .end = 0x203fffff,
497 .flags = IORESOURCE_MEM,
498};
499
500static struct platform_device stamp_flash_device = {
501 .name = "physmap-flash",
502 .id = 0,
503 .dev = {
504 .platform_data = &stamp_flash_data,
505 },
506 .num_resources = 1,
507 .resource = &stamp_flash_resource,
508};
Mike Frysinger793dc272008-03-26 08:09:12 +0800509#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800510
Bryan Wu1394f032007-05-06 14:50:22 -0700511#if defined(CONFIG_MTD_M25P80) \
512 || defined(CONFIG_MTD_M25P80_MODULE)
513static struct mtd_partition bfin_spi_flash_partitions[] = {
514 {
Robin Getzaa582972008-08-05 17:47:29 +0800515 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800516 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700517 .offset = 0,
518 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800519 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800520 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800521 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800522 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800523 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800524 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800525 .size = MTDPART_SIZ_FULL,
526 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700527 }
528};
529
530static struct flash_platform_data bfin_spi_flash_data = {
531 .name = "m25p80",
532 .parts = bfin_spi_flash_partitions,
533 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a8078b32008-11-18 17:48:22 +0800534 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700535};
536
537/* SPI flash chip (m25p64) */
538static struct bfin5xx_spi_chip spi_flash_chip_info = {
539 .enable_dma = 0, /* use dma transfer with this chip*/
Yi Lia65912c2010-04-06 05:53:16 +0000540};
541#endif
542
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000543#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000544#include <linux/input/ad714x.h>
Barry Song427f2772009-07-17 07:04:55 +0000545
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000546static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000547 {
548 .start_stage = 0,
549 .end_stage = 7,
550 .max_coord = 128,
551 },
552};
553
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000554static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000555 {
556 .keycode = BTN_FORWARD,
557 .l_mask = 0,
558 .h_mask = 0x600,
559 },
560 {
561 .keycode = BTN_LEFT,
562 .l_mask = 0,
563 .h_mask = 0x500,
564 },
565 {
566 .keycode = BTN_MIDDLE,
567 .l_mask = 0,
568 .h_mask = 0x800,
569 },
570 {
571 .keycode = BTN_RIGHT,
572 .l_mask = 0x100,
573 .h_mask = 0x400,
574 },
575 {
576 .keycode = BTN_BACK,
577 .l_mask = 0x200,
578 .h_mask = 0x400,
579 },
580};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000581static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000582 .slider_num = 1,
583 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000584 .slider = ad7147_spi_slider_plat,
585 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000586 .stage_cfg_reg = {
587 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
588 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
591 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
592 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
593 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
594 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
595 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
596 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
597 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
598 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
599 },
600 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
601};
602#endif
603
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000604#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000605#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000606static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000607 {
608 .keycode = BTN_1,
609 .l_mask = 0,
610 .h_mask = 0x1,
611 },
612 {
613 .keycode = BTN_2,
614 .l_mask = 0,
615 .h_mask = 0x2,
616 },
617 {
618 .keycode = BTN_3,
619 .l_mask = 0,
620 .h_mask = 0x4,
621 },
622 {
623 .keycode = BTN_4,
624 .l_mask = 0x0,
625 .h_mask = 0x8,
626 },
627};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000628static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000629 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000630 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000631 .stage_cfg_reg = {
632 /* fixme: figure out right setting for all comoponent according
633 * to hardware feature of EVAL-AD7142EB board */
634 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
635 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
636 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
637 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
643 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
644 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
645 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
646 },
647 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
648};
649#endif
650
Graf Yangf5f95312010-02-10 07:15:59 +0000651#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
652static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
653 .enable_dma = 0,
Graf Yangf5f95312010-02-10 07:15:59 +0000654};
655#endif
656
Graf Yangdf6a9492010-02-21 10:23:07 +0000657#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000658static unsigned short ad2s120x_platform_data[] = {
Graf Yangdf6a9492010-02-21 10:23:07 +0000659 /* used as SAMPLE and RDVEL */
660 GPIO_PF5, GPIO_PF6, 0
661};
662
663static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
664 .enable_dma = 0,
Graf Yangdf6a9492010-02-21 10:23:07 +0000665};
666#endif
667
Graf Yang848c51c2010-02-26 11:49:52 +0000668#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000669static unsigned short ad2s1210_platform_data[] = {
Graf Yang848c51c2010-02-26 11:49:52 +0000670 /* use as SAMPLE, A0, A1 */
671 GPIO_PF7, GPIO_PF8, GPIO_PF9,
672# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
673 /* the RES0 and RES1 pins */
674 GPIO_PF4, GPIO_PF5,
675# endif
676 0,
677};
678
679static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
680 .enable_dma = 0,
Graf Yang848c51c2010-02-26 11:49:52 +0000681};
682#endif
683
Michael Hennerich0891bae2010-03-08 11:58:53 +0000684#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
685static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
686 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000687};
688#endif
689
690#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
691static unsigned short ad7816_platform_data[] = {
692 GPIO_PF4, /* rdwr_pin */
693 GPIO_PF5, /* convert_pin */
694 GPIO_PF7, /* busy_pin */
695 0,
696};
697
698static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
699 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000700};
701#endif
702
703#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
704static unsigned long adt7310_platform_data[3] = {
705/* INT bound temperature alarm event. line 1 */
706 IRQ_PG4, IRQF_TRIGGER_LOW,
707/* CT bound temperature alarm event irq_flags. line 0 */
708 IRQF_TRIGGER_LOW,
709};
710
711static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
712 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000713};
714#endif
715
716#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
717static unsigned short ad7298_platform_data[] = {
718 GPIO_PF7, /* busy_pin */
719 0,
720};
Michael Hennerich0891bae2010-03-08 11:58:53 +0000721#endif
722
723#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
724static unsigned long adt7316_spi_data[2] = {
725 IRQF_TRIGGER_LOW, /* interrupt flags */
726 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
727};
728
729static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
730 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000731};
732#endif
733
Yi Lif79ea4c2009-01-07 23:14:38 +0800734#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
735#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
736
737static int bfin_mmc_spi_init(struct device *dev,
738 irqreturn_t (*detect_int)(int, void *), void *data)
739{
740 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
741 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
742}
743
744static void bfin_mmc_spi_exit(struct device *dev, void *data)
745{
746 free_irq(MMC_SPI_CARD_DETECT_INT, data);
747}
748
749static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
750 .init = bfin_mmc_spi_init,
751 .exit = bfin_mmc_spi_exit,
752 .detect_delay = 100, /* msecs */
753};
754
755static struct bfin5xx_spi_chip mmc_spi_chip_info = {
756 .enable_dma = 0,
Yi Lie68d1eb2009-06-03 09:46:22 +0000757 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800758};
759#endif
760
Bryan Wu1394f032007-05-06 14:50:22 -0700761#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800762#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700763static const struct ad7877_platform_data bfin_ad7877_ts_info = {
764 .model = 7877,
765 .vref_delay_usecs = 50, /* internal, no capacitor */
766 .x_plate_ohms = 419,
767 .y_plate_ohms = 486,
768 .pressure_max = 1000,
769 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000770 .stopacq_polarity = 1,
771 .first_conversion_delay = 3,
772 .acquisition_time = 1,
773 .averaging = 1,
774 .pen_down_acc_interval = 1,
Bryan Wu1394f032007-05-06 14:50:22 -0700775};
776#endif
777
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800778#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
779#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800780static const struct ad7879_platform_data bfin_ad7879_ts_info = {
781 .model = 7879, /* Model = AD7879 */
782 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
783 .pressure_max = 10000,
784 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000785 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
786 .acquisition_time = 1, /* 4us acquisition time per sample */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800787 .median = 2, /* do 8 measurements */
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000788 .averaging = 1, /* take the average of 4 middle samples */
789 .pen_down_acc_interval = 255, /* 9.4 ms */
Michael Hennerich244d3422009-12-18 09:29:39 +0000790 .gpio_export = 1, /* Export GPIO to gpiolib */
791 .gpio_base = -1, /* Dynamic allocation */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800792};
793#endif
794
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000795#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000796#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000797static const struct adxl34x_platform_data adxl34x_info = {
798 .x_axis_offset = 0,
799 .y_axis_offset = 0,
800 .z_axis_offset = 0,
801 .tap_threshold = 0x31,
802 .tap_duration = 0x10,
803 .tap_latency = 0x60,
804 .tap_window = 0xF0,
805 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
806 .act_axis_control = 0xFF,
807 .activity_threshold = 5,
808 .inactivity_threshold = 3,
809 .inactivity_time = 4,
810 .free_fall_threshold = 0x7,
811 .free_fall_time = 0x20,
812 .data_rate = 0x8,
813 .data_range = ADXL_FULL_RES,
814
815 .ev_type = EV_ABS,
816 .ev_code_x = ABS_X, /* EV_REL */
817 .ev_code_y = ABS_Y, /* EV_REL */
818 .ev_code_z = ABS_Z, /* EV_REL */
819
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000820 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000821
822/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
823/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
824 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
825 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000826 .orientation_enable = ADXL_EN_ORIENTATION_3D,
827 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
828 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
829 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
830 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000831};
832#endif
833
Michael Hennerich85a192e2009-01-07 23:14:38 +0800834#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
835static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
836 .enable_dma = 1,
Michael Hennerich85a192e2009-01-07 23:14:38 +0800837};
838#endif
839
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000840#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000841#include <linux/spi/adf702x.h>
842#define TXREG 0x0160A470
843static const u32 adf7021_regs[] = {
844 0x09608FA0,
845 0x00575011,
846 0x00A7F092,
847 0x2B141563,
848 0x81F29E94,
849 0x00003155,
850 0x050A4F66,
851 0x00000007,
852 0x00000008,
853 0x000231E9,
854 0x3296354A,
855 0x891A2B3B,
856 0x00000D9C,
857 0x0000000D,
858 0x0000000E,
859 0x0000000F,
860};
861
862static struct adf702x_platform_data adf7021_platform_data = {
863 .regs_base = (void *)SPORT1_TCR1,
864 .dma_ch_rx = CH_SPORT1_RX,
865 .dma_ch_tx = CH_SPORT1_TX,
866 .irq_sport_err = IRQ_SPORT1_ERROR,
867 .gpio_int_rfs = GPIO_PF8,
868 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
869 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
870 .adf702x_model = MODEL_ADF7021,
871 .adf702x_regs = adf7021_regs,
872 .tx_reg = TXREG,
873};
Mike Frysinger0531c462010-01-19 07:04:29 +0000874static inline void adf702x_mac_init(void)
875{
Joe Perches6e5928f2012-07-12 22:33:12 -0700876 eth_random_addr(adf7021_platform_data.mac_addr);
Mike Frysinger0531c462010-01-19 07:04:29 +0000877}
878#else
879static inline void adf702x_mac_init(void) {}
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000880#endif
881
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000882#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
883#include <linux/spi/ads7846.h>
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000884static int ads7873_get_pendown_state(void)
885{
886 return gpio_get_value(GPIO_PF6);
887}
888
889static struct ads7846_platform_data __initdata ad7873_pdata = {
890 .model = 7873, /* AD7873 */
891 .x_max = 0xfff,
892 .y_max = 0xfff,
893 .x_plate_ohms = 620,
894 .debounce_max = 1,
895 .debounce_rep = 0,
896 .debounce_tol = (~0),
897 .get_pendown_state = ads7873_get_pendown_state,
898};
899#endif
900
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800901#if defined(CONFIG_MTD_DATAFLASH) \
902 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800903
904static struct mtd_partition bfin_spi_dataflash_partitions[] = {
905 {
906 .name = "bootloader(spi)",
907 .size = 0x00040000,
908 .offset = 0,
909 .mask_flags = MTD_CAP_ROM
910 }, {
911 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800912 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800913 .offset = MTDPART_OFS_APPEND,
914 }, {
915 .name = "file system(spi)",
916 .size = MTDPART_SIZ_FULL,
917 .offset = MTDPART_OFS_APPEND,
918 }
919};
920
921static struct flash_platform_data bfin_spi_dataflash_data = {
922 .name = "SPI Dataflash",
923 .parts = bfin_spi_dataflash_partitions,
924 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
925};
926
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800927/* DataFlash chip */
928static struct bfin5xx_spi_chip data_flash_chip_info = {
929 .enable_dma = 0, /* use dma transfer with this chip*/
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000930};
931#endif
932
Michael Hennerich0891bae2010-03-08 11:58:53 +0000933#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
934static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
935 .enable_dma = 0, /* use dma transfer with this chip*/
Michael Hennerich0891bae2010-03-08 11:58:53 +0000936};
937#endif
938
Bryan Wu1394f032007-05-06 14:50:22 -0700939static struct spi_board_info bfin_spi_board_info[] __initdata = {
940#if defined(CONFIG_MTD_M25P80) \
941 || defined(CONFIG_MTD_M25P80_MODULE)
942 {
943 /* the modalias must be the same as spi device driver name */
944 .modalias = "m25p80", /* Name of spi_driver for this device */
945 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800946 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700947 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
948 .platform_data = &bfin_spi_flash_data,
949 .controller_data = &spi_flash_chip_info,
950 .mode = SPI_MODE_3,
951 },
952#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800953#if defined(CONFIG_MTD_DATAFLASH) \
954 || defined(CONFIG_MTD_DATAFLASH_MODULE)
955 { /* DataFlash chip */
956 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +0800957 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800958 .bus_num = 0, /* Framework bus number */
959 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +0800960 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800961 .controller_data = &data_flash_chip_info,
962 .mode = SPI_MODE_3,
963 },
964#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700965
Scott Jiangd0556362011-08-12 19:31:30 -0400966#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
967 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700968 {
Scott Jiangd0556362011-08-12 19:31:30 -0400969 .modalias = "ad1836",
Bryan Wu1394f032007-05-06 14:50:22 -0700970 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800971 .bus_num = 0,
Barry Song7ba80062010-01-28 09:37:21 +0000972 .chip_select = 4,
Barry Songd40bd712010-02-22 10:31:06 +0000973 .platform_data = "ad1836", /* only includes chip name for the moment */
Barry Song83124402009-08-06 21:03:02 +0000974 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -0700975 },
976#endif
Barry Songd4b834c2009-06-04 10:14:17 +0000977
Bob Liu57084ed2012-01-16 11:18:50 +0800978#ifdef CONFIG_SND_SOC_AD193X_SPI
Barry Songd4b834c2009-06-04 10:14:17 +0000979 {
Barry Song3b827902010-01-27 09:01:36 +0000980 .modalias = "ad193x",
Barry Songd4b834c2009-06-04 10:14:17 +0000981 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
982 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +0000983 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +0000984 .mode = SPI_MODE_3,
985 },
986#endif
987
Lars-Peter Clausen080ae072011-08-30 13:33:06 -0400988#if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
Yi Lia65912c2010-04-06 05:53:16 +0000989 {
Lars-Peter Clausen080ae072011-08-30 13:33:06 -0400990 .modalias = "adav801",
Yi Lia65912c2010-04-06 05:53:16 +0000991 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
992 .bus_num = 0,
993 .chip_select = 1,
Yi Lia65912c2010-04-06 05:53:16 +0000994 .mode = SPI_MODE_3,
995 },
996#endif
997
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000998#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000999 {
1000 .modalias = "ad714x_captouch",
1001 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1002 .irq = IRQ_PF4,
1003 .bus_num = 0,
1004 .chip_select = 5,
1005 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001006 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +00001007 },
1008#endif
1009
Graf Yangf5f95312010-02-10 07:15:59 +00001010#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1011 {
1012 .modalias = "ad2s90",
1013 .bus_num = 0,
1014 .chip_select = 3, /* change it for your board */
Barry Song6fbfa0c2010-04-12 05:04:15 +00001015 .mode = SPI_MODE_3,
Graf Yangf5f95312010-02-10 07:15:59 +00001016 .platform_data = NULL,
1017 .controller_data = &ad2s90_spi_chip_info,
1018 },
1019#endif
1020
Graf Yangdf6a9492010-02-21 10:23:07 +00001021#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1022 {
1023 .modalias = "ad2s120x",
1024 .bus_num = 0,
1025 .chip_select = 4, /* CS, change it for your board */
1026 .platform_data = ad2s120x_platform_data,
1027 .controller_data = &ad2s120x_spi_chip_info,
1028 },
1029#endif
1030
Graf Yang848c51c2010-02-26 11:49:52 +00001031#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1032 {
1033 .modalias = "ad2s1210",
1034 .max_speed_hz = 8192000,
1035 .bus_num = 0,
1036 .chip_select = 4, /* CS, change it for your board */
1037 .platform_data = ad2s1210_platform_data,
1038 .controller_data = &ad2s1210_spi_chip_info,
1039 },
1040#endif
1041
Michael Hennerich0891bae2010-03-08 11:58:53 +00001042#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1043 {
1044 .modalias = "ad7314",
1045 .max_speed_hz = 1000000,
1046 .bus_num = 0,
1047 .chip_select = 4, /* CS, change it for your board */
1048 .controller_data = &ad7314_spi_chip_info,
1049 .mode = SPI_MODE_1,
1050 },
1051#endif
1052
1053#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1054 {
1055 .modalias = "ad7818",
1056 .max_speed_hz = 1000000,
1057 .bus_num = 0,
1058 .chip_select = 4, /* CS, change it for your board */
1059 .platform_data = ad7816_platform_data,
1060 .controller_data = &ad7816_spi_chip_info,
1061 .mode = SPI_MODE_3,
1062 },
1063#endif
1064
1065#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1066 {
1067 .modalias = "adt7310",
1068 .max_speed_hz = 1000000,
1069 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1070 .bus_num = 0,
1071 .chip_select = 4, /* CS, change it for your board */
1072 .platform_data = adt7310_platform_data,
1073 .controller_data = &adt7310_spi_chip_info,
1074 .mode = SPI_MODE_3,
1075 },
1076#endif
1077
1078#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1079 {
1080 .modalias = "ad7298",
1081 .max_speed_hz = 1000000,
1082 .bus_num = 0,
1083 .chip_select = 4, /* CS, change it for your board */
1084 .platform_data = ad7298_platform_data,
Michael Hennerich0891bae2010-03-08 11:58:53 +00001085 .mode = SPI_MODE_3,
1086 },
1087#endif
1088
1089#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1090 {
1091 .modalias = "adt7316",
1092 .max_speed_hz = 1000000,
1093 .irq = IRQ_PG5, /* interrupt line */
1094 .bus_num = 0,
1095 .chip_select = 4, /* CS, change it for your board */
1096 .platform_data = adt7316_spi_data,
1097 .controller_data = &adt7316_spi_chip_info,
1098 .mode = SPI_MODE_3,
1099 },
1100#endif
1101
Yi Lif79ea4c2009-01-07 23:14:38 +08001102#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1103 {
1104 .modalias = "mmc_spi",
1105 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1106 .bus_num = 0,
1107 .chip_select = 4,
1108 .platform_data = &bfin_mmc_spi_pdata,
1109 .controller_data = &mmc_spi_chip_info,
1110 .mode = SPI_MODE_3,
1111 },
1112#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001113#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1114 {
1115 .modalias = "ad7877",
1116 .platform_data = &bfin_ad7877_ts_info,
1117 .irq = IRQ_PF6,
1118 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +08001119 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -07001120 .chip_select = 1,
Bryan Wu1394f032007-05-06 14:50:22 -07001121 },
1122#endif
Michael Hennerichf5150152008-10-16 23:23:18 +08001123#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001124 {
1125 .modalias = "ad7879",
1126 .platform_data = &bfin_ad7879_ts_info,
1127 .irq = IRQ_PF7,
1128 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1129 .bus_num = 0,
1130 .chip_select = 1,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001131 .mode = SPI_CPHA | SPI_CPOL,
1132 },
1133#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001134#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1135 {
1136 .modalias = "spidev",
1137 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1138 .bus_num = 0,
1139 .chip_select = 1,
Michael Hennerich6e668932008-02-09 01:54:09 +08001140 },
1141#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001142#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1143 {
1144 .modalias = "bfin-lq035q1-spi",
1145 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1146 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001147 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001148 .mode = SPI_CPHA | SPI_CPOL,
1149 },
1150#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +08001151#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1152 {
1153 .modalias = "enc28j60",
1154 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1155 .irq = IRQ_PF6,
1156 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001157 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerich85a192e2009-01-07 23:14:38 +08001158 .controller_data = &enc28j60_spi_chip_info,
1159 .mode = SPI_MODE_0,
1160 },
1161#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001162#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1163 {
1164 .modalias = "adxl34x",
1165 .platform_data = &adxl34x_info,
1166 .irq = IRQ_PF6,
1167 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1168 .bus_num = 0,
1169 .chip_select = 2,
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001170 .mode = SPI_MODE_3,
1171 },
1172#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001173#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1174 {
1175 .modalias = "adf702x",
1176 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1177 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001178 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001179 .platform_data = &adf7021_platform_data,
1180 .mode = SPI_MODE_0,
1181 },
1182#endif
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001183#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1184 {
1185 .modalias = "ads7846",
1186 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1187 .bus_num = 0,
1188 .irq = IRQ_PF6,
1189 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001190 .platform_data = &ad7873_pdata,
1191 .mode = SPI_MODE_0,
1192 },
1193#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00001194#if defined(CONFIG_AD7476) \
1195 || defined(CONFIG_AD7476_MODULE)
1196 {
1197 .modalias = "ad7476", /* Name of spi_driver for this device */
1198 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1199 .bus_num = 0, /* Framework bus number */
1200 .chip_select = 1, /* Framework chip select. */
1201 .platform_data = NULL, /* No spi_driver specific config */
1202 .controller_data = &spi_ad7476_chip_info,
1203 .mode = SPI_MODE_3,
1204 },
1205#endif
1206#if defined(CONFIG_ADE7753) \
1207 || defined(CONFIG_ADE7753_MODULE)
1208 {
1209 .modalias = "ade7753",
1210 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1211 .bus_num = 0,
1212 .chip_select = 1, /* CS, change it for your board */
1213 .platform_data = NULL, /* No spi_driver specific config */
1214 .mode = SPI_MODE_1,
1215 },
1216#endif
1217#if defined(CONFIG_ADE7754) \
1218 || defined(CONFIG_ADE7754_MODULE)
1219 {
1220 .modalias = "ade7754",
1221 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1222 .bus_num = 0,
1223 .chip_select = 1, /* CS, change it for your board */
1224 .platform_data = NULL, /* No spi_driver specific config */
1225 .mode = SPI_MODE_1,
1226 },
1227#endif
1228#if defined(CONFIG_ADE7758) \
1229 || defined(CONFIG_ADE7758_MODULE)
1230 {
1231 .modalias = "ade7758",
1232 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1233 .bus_num = 0,
1234 .chip_select = 1, /* CS, change it for your board */
1235 .platform_data = NULL, /* No spi_driver specific config */
1236 .mode = SPI_MODE_1,
1237 },
1238#endif
1239#if defined(CONFIG_ADE7759) \
1240 || defined(CONFIG_ADE7759_MODULE)
1241 {
1242 .modalias = "ade7759",
1243 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1244 .bus_num = 0,
1245 .chip_select = 1, /* CS, change it for your board */
1246 .platform_data = NULL, /* No spi_driver specific config */
1247 .mode = SPI_MODE_1,
1248 },
1249#endif
1250#if defined(CONFIG_ADE7854_SPI) \
1251 || defined(CONFIG_ADE7854_SPI_MODULE)
1252 {
1253 .modalias = "ade7854",
1254 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1255 .bus_num = 0,
1256 .chip_select = 1, /* CS, change it for your board */
1257 .platform_data = NULL, /* No spi_driver specific config */
1258 .mode = SPI_MODE_3,
1259 },
1260#endif
1261#if defined(CONFIG_ADIS16060) \
1262 || defined(CONFIG_ADIS16060_MODULE)
1263 {
1264 .modalias = "adis16060_r",
1265 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1266 .bus_num = 0,
1267 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1268 .platform_data = NULL, /* No spi_driver specific config */
1269 .mode = SPI_MODE_0,
1270 },
1271 {
1272 .modalias = "adis16060_w",
1273 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1274 .bus_num = 0,
1275 .chip_select = 2, /* CS for write, change it for your board */
1276 .platform_data = NULL, /* No spi_driver specific config */
1277 .mode = SPI_MODE_1,
1278 },
1279#endif
1280#if defined(CONFIG_ADIS16130) \
1281 || defined(CONFIG_ADIS16130_MODULE)
1282 {
1283 .modalias = "adis16130",
1284 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1285 .bus_num = 0,
1286 .chip_select = 1, /* CS for read, change it for your board */
1287 .platform_data = NULL, /* No spi_driver specific config */
1288 .mode = SPI_MODE_3,
1289 },
1290#endif
1291#if defined(CONFIG_ADIS16201) \
1292 || defined(CONFIG_ADIS16201_MODULE)
1293 {
1294 .modalias = "adis16201",
1295 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1296 .bus_num = 0,
1297 .chip_select = 5, /* CS, change it for your board */
1298 .platform_data = NULL, /* No spi_driver specific config */
1299 .mode = SPI_MODE_3,
1300 .irq = IRQ_PF4,
1301 },
1302#endif
1303#if defined(CONFIG_ADIS16203) \
1304 || defined(CONFIG_ADIS16203_MODULE)
1305 {
1306 .modalias = "adis16203",
1307 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1308 .bus_num = 0,
1309 .chip_select = 5, /* CS, change it for your board */
1310 .platform_data = NULL, /* No spi_driver specific config */
1311 .mode = SPI_MODE_3,
1312 .irq = IRQ_PF4,
1313 },
1314#endif
1315#if defined(CONFIG_ADIS16204) \
1316 || defined(CONFIG_ADIS16204_MODULE)
1317 {
1318 .modalias = "adis16204",
1319 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1320 .bus_num = 0,
1321 .chip_select = 5, /* CS, change it for your board */
1322 .platform_data = NULL, /* No spi_driver specific config */
1323 .mode = SPI_MODE_3,
1324 .irq = IRQ_PF4,
1325 },
1326#endif
1327#if defined(CONFIG_ADIS16209) \
1328 || defined(CONFIG_ADIS16209_MODULE)
1329 {
1330 .modalias = "adis16209",
1331 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1332 .bus_num = 0,
1333 .chip_select = 5, /* CS, change it for your board */
1334 .platform_data = NULL, /* No spi_driver specific config */
1335 .mode = SPI_MODE_3,
1336 .irq = IRQ_PF4,
1337 },
1338#endif
1339#if defined(CONFIG_ADIS16220) \
1340 || defined(CONFIG_ADIS16220_MODULE)
1341 {
1342 .modalias = "adis16220",
1343 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1344 .bus_num = 0,
1345 .chip_select = 5, /* CS, change it for your board */
1346 .platform_data = NULL, /* No spi_driver specific config */
1347 .mode = SPI_MODE_3,
1348 .irq = IRQ_PF4,
1349 },
1350#endif
1351#if defined(CONFIG_ADIS16240) \
1352 || defined(CONFIG_ADIS16240_MODULE)
1353 {
1354 .modalias = "adis16240",
1355 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1356 .bus_num = 0,
1357 .chip_select = 5, /* CS, change it for your board */
1358 .platform_data = NULL, /* No spi_driver specific config */
1359 .mode = SPI_MODE_3,
1360 .irq = IRQ_PF4,
1361 },
1362#endif
1363#if defined(CONFIG_ADIS16260) \
1364 || defined(CONFIG_ADIS16260_MODULE)
1365 {
1366 .modalias = "adis16260",
1367 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1368 .bus_num = 0,
1369 .chip_select = 5, /* CS, change it for your board */
1370 .platform_data = NULL, /* No spi_driver specific config */
1371 .mode = SPI_MODE_3,
1372 .irq = IRQ_PF4,
1373 },
1374#endif
1375#if defined(CONFIG_ADIS16261) \
1376 || defined(CONFIG_ADIS16261_MODULE)
1377 {
1378 .modalias = "adis16261",
1379 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1380 .bus_num = 0,
1381 .chip_select = 1, /* CS, change it for your board */
1382 .platform_data = NULL, /* No spi_driver specific config */
1383 .mode = SPI_MODE_3,
1384 },
1385#endif
1386#if defined(CONFIG_ADIS16300) \
1387 || defined(CONFIG_ADIS16300_MODULE)
1388 {
1389 .modalias = "adis16300",
1390 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1391 .bus_num = 0,
1392 .chip_select = 5, /* CS, change it for your board */
1393 .platform_data = NULL, /* No spi_driver specific config */
1394 .mode = SPI_MODE_3,
1395 .irq = IRQ_PF4,
1396 },
1397#endif
1398#if defined(CONFIG_ADIS16350) \
1399 || defined(CONFIG_ADIS16350_MODULE)
1400 {
1401 .modalias = "adis16364",
1402 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1403 .bus_num = 0,
1404 .chip_select = 5, /* CS, change it for your board */
1405 .platform_data = NULL, /* No spi_driver specific config */
1406 .mode = SPI_MODE_3,
1407 .irq = IRQ_PF4,
1408 },
1409#endif
1410#if defined(CONFIG_ADIS16400) \
1411 || defined(CONFIG_ADIS16400_MODULE)
1412 {
1413 .modalias = "adis16400",
1414 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1415 .bus_num = 0,
1416 .chip_select = 1, /* CS, change it for your board */
1417 .platform_data = NULL, /* No spi_driver specific config */
1418 .mode = SPI_MODE_3,
1419 },
1420#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001421};
1422
Sonic Zhang7d157fb2011-11-07 18:40:10 +08001423#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001424/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001425static struct bfin5xx_spi_master bfin_spi0_info = {
Barry Songf9f0e3b2009-11-17 09:45:59 +00001426 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
Bryan Wu1394f032007-05-06 14:50:22 -07001427 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001428 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001429};
1430
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001431/* SPI (0) */
1432static struct resource bfin_spi0_resource[] = {
1433 [0] = {
1434 .start = SPI0_REGBASE,
1435 .end = SPI0_REGBASE + 0xFF,
1436 .flags = IORESOURCE_MEM,
1437 },
1438 [1] = {
1439 .start = CH_SPI,
1440 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001441 .flags = IORESOURCE_DMA,
1442 },
1443 [2] = {
1444 .start = IRQ_SPI,
1445 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001446 .flags = IORESOURCE_IRQ,
1447 },
1448};
1449
1450static struct platform_device bfin_spi0_device = {
1451 .name = "bfin-spi",
1452 .id = 0, /* Bus number */
1453 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1454 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001455 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001456 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001457 },
1458};
1459#endif /* spi master and devices */
1460
Cliff Cai1e9aa952009-03-28 23:28:51 +08001461#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1462
1463/* SPORT SPI controller data */
1464static struct bfin5xx_spi_master bfin_sport_spi0_info = {
Scott Jiang8ded9702011-12-06 16:13:43 -05001465 .num_chipselect = MAX_BLACKFIN_GPIOS,
Cliff Cai1e9aa952009-03-28 23:28:51 +08001466 .enable_dma = 0, /* master don't support DMA */
1467 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1468 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1469};
1470
1471static struct resource bfin_sport_spi0_resource[] = {
1472 [0] = {
1473 .start = SPORT0_TCR1,
1474 .end = SPORT0_TCR1 + 0xFF,
1475 .flags = IORESOURCE_MEM,
1476 },
1477 [1] = {
1478 .start = IRQ_SPORT0_ERROR,
1479 .end = IRQ_SPORT0_ERROR,
1480 .flags = IORESOURCE_IRQ,
1481 },
1482};
1483
1484static struct platform_device bfin_sport_spi0_device = {
1485 .name = "bfin-sport-spi",
1486 .id = 1, /* Bus number */
1487 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1488 .resource = bfin_sport_spi0_resource,
1489 .dev = {
1490 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1491 },
1492};
1493
1494static struct bfin5xx_spi_master bfin_sport_spi1_info = {
Scott Jiang8ded9702011-12-06 16:13:43 -05001495 .num_chipselect = MAX_BLACKFIN_GPIOS,
Cliff Cai1e9aa952009-03-28 23:28:51 +08001496 .enable_dma = 0, /* master don't support DMA */
1497 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1498 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1499};
1500
1501static struct resource bfin_sport_spi1_resource[] = {
1502 [0] = {
1503 .start = SPORT1_TCR1,
1504 .end = SPORT1_TCR1 + 0xFF,
1505 .flags = IORESOURCE_MEM,
1506 },
1507 [1] = {
1508 .start = IRQ_SPORT1_ERROR,
1509 .end = IRQ_SPORT1_ERROR,
1510 .flags = IORESOURCE_IRQ,
1511 },
1512};
1513
1514static struct platform_device bfin_sport_spi1_device = {
1515 .name = "bfin-sport-spi",
1516 .id = 2, /* Bus number */
1517 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1518 .resource = bfin_sport_spi1_resource,
1519 .dev = {
1520 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1521 },
1522};
1523
1524#endif /* sport spi master and devices */
1525
Bryan Wu1394f032007-05-06 14:50:22 -07001526#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1527static struct platform_device bfin_fb_device = {
Scott Jiang57820b32012-08-14 11:59:31 -04001528 .name = "bf537_lq035",
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001529};
1530#endif
1531
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001532#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1533#include <asm/bfin-lq035q1.h>
1534
1535static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001536 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1537 .ppi_mode = USE_RGB565_16_BIT_PPI,
1538 .use_bl = 0, /* let something else control the LCD Blacklight */
1539 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001540};
1541
1542static struct resource bfin_lq035q1_resources[] = {
1543 {
1544 .start = IRQ_PPI_ERROR,
1545 .end = IRQ_PPI_ERROR,
1546 .flags = IORESOURCE_IRQ,
1547 },
1548};
1549
1550static struct platform_device bfin_lq035q1_device = {
1551 .name = "bfin-lq035q1",
1552 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001553 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1554 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001555 .dev = {
1556 .platform_data = &bfin_lq035q1_data,
1557 },
1558};
1559#endif
1560
Bob Liubd5fd092012-01-05 11:08:30 +08001561#if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1562 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1563#include <linux/videodev2.h>
1564#include <media/blackfin/bfin_capture.h>
1565#include <media/blackfin/ppi.h>
1566
1567static const unsigned short ppi_req[] = {
1568 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1569 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1570 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1571 0,
1572};
1573
1574static const struct ppi_info ppi_info = {
1575 .type = PPI_TYPE_PPI,
1576 .dma_ch = CH_PPI,
1577 .irq_err = IRQ_PPI_ERROR,
1578 .base = (void __iomem *)PPI_CONTROL,
1579 .pin_req = ppi_req,
1580};
1581
1582#if defined(CONFIG_VIDEO_VS6624) \
1583 || defined(CONFIG_VIDEO_VS6624_MODULE)
1584static struct v4l2_input vs6624_inputs[] = {
1585 {
1586 .index = 0,
1587 .name = "Camera",
1588 .type = V4L2_INPUT_TYPE_CAMERA,
1589 .std = V4L2_STD_UNKNOWN,
1590 },
1591};
1592
1593static struct bcap_route vs6624_routes[] = {
1594 {
1595 .input = 0,
1596 .output = 0,
1597 },
1598};
1599
1600static const unsigned vs6624_ce_pin = GPIO_PF10;
1601
1602static struct bfin_capture_config bfin_capture_data = {
1603 .card_name = "BF537",
1604 .inputs = vs6624_inputs,
1605 .num_inputs = ARRAY_SIZE(vs6624_inputs),
1606 .routes = vs6624_routes,
1607 .i2c_adapter_id = 0,
1608 .board_info = {
1609 .type = "vs6624",
1610 .addr = 0x10,
1611 .platform_data = (void *)&vs6624_ce_pin,
1612 },
1613 .ppi_info = &ppi_info,
1614 .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
1615};
1616#endif
1617
1618static struct platform_device bfin_capture_device = {
1619 .name = "bfin_capture",
1620 .dev = {
1621 .platform_data = &bfin_capture_data,
1622 },
1623};
1624#endif
1625
Bryan Wu1394f032007-05-06 14:50:22 -07001626#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001627#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001628static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001629 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001630 .start = UART0_THR,
1631 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001632 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001633 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001634 {
Sonic Zhangedb0a642011-08-01 17:53:21 +08001635 .start = IRQ_UART0_TX,
1636 .end = IRQ_UART0_TX,
1637 .flags = IORESOURCE_IRQ,
1638 },
1639 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001640 .start = IRQ_UART0_RX,
Sonic Zhangedb0a642011-08-01 17:53:21 +08001641 .end = IRQ_UART0_RX,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001642 .flags = IORESOURCE_IRQ,
1643 },
1644 {
1645 .start = IRQ_UART0_ERROR,
1646 .end = IRQ_UART0_ERROR,
1647 .flags = IORESOURCE_IRQ,
1648 },
1649 {
1650 .start = CH_UART0_TX,
1651 .end = CH_UART0_TX,
1652 .flags = IORESOURCE_DMA,
1653 },
1654 {
1655 .start = CH_UART0_RX,
1656 .end = CH_UART0_RX,
1657 .flags = IORESOURCE_DMA,
1658 },
1659#ifdef CONFIG_BFIN_UART0_CTSRTS
1660 { /* CTS pin */
1661 .start = GPIO_PG7,
1662 .end = GPIO_PG7,
1663 .flags = IORESOURCE_IO,
1664 },
1665 { /* RTS pin */
1666 .start = GPIO_PG6,
1667 .end = GPIO_PG6,
1668 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001669 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001670#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001671};
1672
Mike Frysingera8b19882010-11-24 09:23:04 +00001673static unsigned short bfin_uart0_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001674 P_UART0_TX, P_UART0_RX, 0
1675};
1676
1677static struct platform_device bfin_uart0_device = {
1678 .name = "bfin-uart",
1679 .id = 0,
1680 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1681 .resource = bfin_uart0_resources,
1682 .dev = {
1683 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1684 },
1685};
1686#endif
1687#ifdef CONFIG_SERIAL_BFIN_UART1
1688static struct resource bfin_uart1_resources[] = {
1689 {
1690 .start = UART1_THR,
1691 .end = UART1_GCTL+2,
1692 .flags = IORESOURCE_MEM,
1693 },
1694 {
Sonic Zhangedb0a642011-08-01 17:53:21 +08001695 .start = IRQ_UART1_TX,
1696 .end = IRQ_UART1_TX,
1697 .flags = IORESOURCE_IRQ,
1698 },
1699 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001700 .start = IRQ_UART1_RX,
Sonic Zhangedb0a642011-08-01 17:53:21 +08001701 .end = IRQ_UART1_RX,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001702 .flags = IORESOURCE_IRQ,
1703 },
1704 {
1705 .start = IRQ_UART1_ERROR,
1706 .end = IRQ_UART1_ERROR,
1707 .flags = IORESOURCE_IRQ,
1708 },
1709 {
1710 .start = CH_UART1_TX,
1711 .end = CH_UART1_TX,
1712 .flags = IORESOURCE_DMA,
1713 },
1714 {
1715 .start = CH_UART1_RX,
1716 .end = CH_UART1_RX,
1717 .flags = IORESOURCE_DMA,
1718 },
1719};
1720
Mike Frysingera8b19882010-11-24 09:23:04 +00001721static unsigned short bfin_uart1_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001722 P_UART1_TX, P_UART1_RX, 0
1723};
1724
1725static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001726 .name = "bfin-uart",
1727 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001728 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1729 .resource = bfin_uart1_resources,
1730 .dev = {
1731 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1732 },
Bryan Wu1394f032007-05-06 14:50:22 -07001733};
1734#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001735#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001736
Graf Yang5be36d22008-04-25 03:09:15 +08001737#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001738#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001739static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001740 {
1741 .start = 0xFFC00400,
1742 .end = 0xFFC004FF,
1743 .flags = IORESOURCE_MEM,
1744 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001745 {
1746 .start = IRQ_UART0_RX,
1747 .end = IRQ_UART0_RX+1,
1748 .flags = IORESOURCE_IRQ,
1749 },
1750 {
1751 .start = CH_UART0_RX,
1752 .end = CH_UART0_RX+1,
1753 .flags = IORESOURCE_DMA,
1754 },
1755};
1756
1757static struct platform_device bfin_sir0_device = {
1758 .name = "bfin_sir",
1759 .id = 0,
1760 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1761 .resource = bfin_sir0_resources,
1762};
Graf Yang5be36d22008-04-25 03:09:15 +08001763#endif
1764#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001765static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001766 {
1767 .start = 0xFFC02000,
1768 .end = 0xFFC020FF,
1769 .flags = IORESOURCE_MEM,
1770 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001771 {
1772 .start = IRQ_UART1_RX,
1773 .end = IRQ_UART1_RX+1,
1774 .flags = IORESOURCE_IRQ,
1775 },
1776 {
1777 .start = CH_UART1_RX,
1778 .end = CH_UART1_RX+1,
1779 .flags = IORESOURCE_DMA,
1780 },
Graf Yang5be36d22008-04-25 03:09:15 +08001781};
1782
Graf Yang42bd8bc2009-01-07 23:14:39 +08001783static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001784 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001785 .id = 1,
1786 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1787 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001788};
1789#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001790#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001791
Bryan Wu1394f032007-05-06 14:50:22 -07001792#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Sonic Zhangcf93feb2012-05-15 15:25:50 +08001793static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1794
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001795static struct resource bfin_twi0_resource[] = {
1796 [0] = {
1797 .start = TWI0_REGBASE,
1798 .end = TWI0_REGBASE,
1799 .flags = IORESOURCE_MEM,
1800 },
1801 [1] = {
1802 .start = IRQ_TWI,
1803 .end = IRQ_TWI,
1804 .flags = IORESOURCE_IRQ,
1805 },
1806};
1807
Bryan Wu1394f032007-05-06 14:50:22 -07001808static struct platform_device i2c_bfin_twi_device = {
1809 .name = "i2c-bfin-twi",
1810 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001811 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1812 .resource = bfin_twi0_resource,
Sonic Zhangcf93feb2012-05-15 15:25:50 +08001813 .dev = {
1814 .platform_data = &bfin_twi0_pins,
1815 },
Bryan Wu1394f032007-05-06 14:50:22 -07001816};
1817#endif
1818
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001819#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001820static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1821 [0] = KEY_GRAVE,
1822 [1] = KEY_1,
1823 [2] = KEY_2,
1824 [3] = KEY_3,
1825 [4] = KEY_4,
1826 [5] = KEY_5,
1827 [6] = KEY_6,
1828 [7] = KEY_7,
1829 [8] = KEY_8,
1830 [9] = KEY_9,
1831 [10] = KEY_0,
1832 [11] = KEY_MINUS,
1833 [12] = KEY_EQUAL,
1834 [13] = KEY_BACKSLASH,
1835 [15] = KEY_KP0,
1836 [16] = KEY_Q,
1837 [17] = KEY_W,
1838 [18] = KEY_E,
1839 [19] = KEY_R,
1840 [20] = KEY_T,
1841 [21] = KEY_Y,
1842 [22] = KEY_U,
1843 [23] = KEY_I,
1844 [24] = KEY_O,
1845 [25] = KEY_P,
1846 [26] = KEY_LEFTBRACE,
1847 [27] = KEY_RIGHTBRACE,
1848 [29] = KEY_KP1,
1849 [30] = KEY_KP2,
1850 [31] = KEY_KP3,
1851 [32] = KEY_A,
1852 [33] = KEY_S,
1853 [34] = KEY_D,
1854 [35] = KEY_F,
1855 [36] = KEY_G,
1856 [37] = KEY_H,
1857 [38] = KEY_J,
1858 [39] = KEY_K,
1859 [40] = KEY_L,
1860 [41] = KEY_SEMICOLON,
1861 [42] = KEY_APOSTROPHE,
1862 [43] = KEY_BACKSLASH,
1863 [45] = KEY_KP4,
1864 [46] = KEY_KP5,
1865 [47] = KEY_KP6,
1866 [48] = KEY_102ND,
1867 [49] = KEY_Z,
1868 [50] = KEY_X,
1869 [51] = KEY_C,
1870 [52] = KEY_V,
1871 [53] = KEY_B,
1872 [54] = KEY_N,
1873 [55] = KEY_M,
1874 [56] = KEY_COMMA,
1875 [57] = KEY_DOT,
1876 [58] = KEY_SLASH,
1877 [60] = KEY_KPDOT,
1878 [61] = KEY_KP7,
1879 [62] = KEY_KP8,
1880 [63] = KEY_KP9,
1881 [64] = KEY_SPACE,
1882 [65] = KEY_BACKSPACE,
1883 [66] = KEY_TAB,
1884 [67] = KEY_KPENTER,
1885 [68] = KEY_ENTER,
1886 [69] = KEY_ESC,
1887 [70] = KEY_DELETE,
1888 [74] = KEY_KPMINUS,
1889 [76] = KEY_UP,
1890 [77] = KEY_DOWN,
1891 [78] = KEY_RIGHT,
1892 [79] = KEY_LEFT,
1893};
1894
1895static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1896 .rows = 8,
1897 .cols = 10,
1898 .keymap = adp5588_keymap,
1899 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1900 .repeat = 0,
1901};
1902#endif
1903
Michael Hennerich3ea57212009-03-28 22:15:07 +08001904#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1905#include <linux/mfd/adp5520.h>
1906
1907 /*
1908 * ADP5520/5501 Backlight Data
1909 */
1910
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001911static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1912 .fade_in = ADP5520_FADE_T_1200ms,
1913 .fade_out = ADP5520_FADE_T_1200ms,
1914 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1915 .en_ambl_sens = 1,
1916 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1917 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1918 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1919 .l2_office_max = ADP5520_BL_CUR_mA(7),
1920 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1921 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1922 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1923 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1924 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1925 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1926 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001927};
1928
1929 /*
1930 * ADP5520/5501 LEDs Data
1931 */
1932
Michael Hennerich3ea57212009-03-28 22:15:07 +08001933static struct led_info adp5520_leds[] = {
1934 {
1935 .name = "adp5520-led1",
1936 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001937 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001938 },
1939#ifdef ADP5520_EN_ALL_LEDS
1940 {
1941 .name = "adp5520-led2",
1942 .default_trigger = "none",
1943 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1944 },
1945 {
1946 .name = "adp5520-led3",
1947 .default_trigger = "none",
1948 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1949 },
1950#endif
1951};
1952
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001953static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001954 .num_leds = ARRAY_SIZE(adp5520_leds),
1955 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001956 .fade_in = ADP5520_FADE_T_600ms,
1957 .fade_out = ADP5520_FADE_T_600ms,
1958 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001959};
1960
1961 /*
1962 * ADP5520 GPIO Data
1963 */
1964
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001965static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001966 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001967 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1968 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001969};
1970
1971 /*
1972 * ADP5520 Keypad Data
1973 */
1974
Michael Hennerich3ea57212009-03-28 22:15:07 +08001975static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001976 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1977 [ADP5520_KEY(0, 1)] = KEY_1,
1978 [ADP5520_KEY(0, 2)] = KEY_2,
1979 [ADP5520_KEY(0, 3)] = KEY_3,
1980 [ADP5520_KEY(1, 0)] = KEY_4,
1981 [ADP5520_KEY(1, 1)] = KEY_5,
1982 [ADP5520_KEY(1, 2)] = KEY_6,
1983 [ADP5520_KEY(1, 3)] = KEY_7,
1984 [ADP5520_KEY(2, 0)] = KEY_8,
1985 [ADP5520_KEY(2, 1)] = KEY_9,
1986 [ADP5520_KEY(2, 2)] = KEY_0,
1987 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1988 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1989 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1990 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1991 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001992};
1993
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001994static struct adp5520_keys_platform_data adp5520_keys_data = {
1995 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1996 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001997 .keymap = adp5520_keymap,
1998 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1999 .repeat = 0,
2000};
2001
2002 /*
Stefan Weileef35c22010-08-06 21:11:15 +02002003 * ADP5520/5501 Multifunction Device Init Data
Michael Hennerich3ea57212009-03-28 22:15:07 +08002004 */
2005
Michael Hennerich3ea57212009-03-28 22:15:07 +08002006static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002007 .backlight = &adp5520_backlight_data,
2008 .leds = &adp5520_leds_data,
2009 .gpio = &adp5520_gpio_data,
2010 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002011};
2012
2013#endif
2014
Michael Hennerichba877d42009-08-27 04:09:32 +00002015#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
Michael Hennerich1d23dc82009-10-05 13:33:11 +00002016static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00002017 .gpio_start = 50,
2018 .pullup_dis_mask = 0,
2019};
2020#endif
2021
Michael Hennerich78756c62009-10-13 15:28:33 +00002022#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2023#include <linux/i2c/adp8870.h>
2024static struct led_info adp8870_leds[] = {
2025 {
2026 .name = "adp8870-led7",
2027 .default_trigger = "none",
2028 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2029 },
2030};
2031
2032
2033static struct adp8870_backlight_platform_data adp8870_pdata = {
2034 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2035 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2036 .pwm_assign = 0, /* 1 = Enables PWM mode */
2037
2038 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2039 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2040 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2041
2042 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2043 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2044
2045 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2046 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2047 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2048 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2049 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2050 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2051 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2052 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2053 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2054 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2055
2056 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2057 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2058 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2059 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2060 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2061 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2062 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2063 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2064
2065 .leds = adp8870_leds,
2066 .num_leds = ARRAY_SIZE(adp8870_leds),
2067 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2068 .led_fade_in = ADP8870_FADE_T_600ms,
2069 .led_fade_out = ADP8870_FADE_T_600ms,
2070 .led_on_time = ADP8870_LED_ONT_200ms,
2071};
2072#endif
2073
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002074#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2075#include <linux/i2c/adp8860.h>
2076static struct led_info adp8860_leds[] = {
2077 {
2078 .name = "adp8860-led7",
2079 .default_trigger = "none",
2080 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2081 },
2082};
2083
2084static struct adp8860_backlight_platform_data adp8860_pdata = {
2085 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2086 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2087
2088 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2089 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2090 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2091
2092 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2093 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2094
2095 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2096 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2097 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2098 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2099 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2100 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2101
2102 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2103 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2104 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2105 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2106
2107 .leds = adp8860_leds,
2108 .num_leds = ARRAY_SIZE(adp8860_leds),
2109 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2110 .led_fade_in = ADP8860_FADE_T_600ms,
2111 .led_fade_out = ADP8860_FADE_T_600ms,
2112 .led_on_time = ADP8860_LED_ONT_200ms,
2113};
2114#endif
2115
Sonic Zhangf32792d2010-02-09 02:47:09 +00002116#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2117static struct regulator_consumer_supply ad5398_consumer = {
2118 .supply = "current",
2119};
2120
2121static struct regulator_init_data ad5398_regulator_data = {
2122 .constraints = {
2123 .name = "current range",
2124 .max_uA = 120000,
2125 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2126 },
2127 .num_consumer_supplies = 1,
2128 .consumer_supplies = &ad5398_consumer,
2129};
2130
Sonic Zhangf32792d2010-02-09 02:47:09 +00002131#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2132 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2133static struct platform_device ad5398_virt_consumer_device = {
2134 .name = "reg-virt-consumer",
2135 .id = 0,
2136 .dev = {
2137 .platform_data = "current", /* Passed to driver */
2138 },
2139};
2140#endif
2141#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2142 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2143static struct regulator_bulk_data ad5398_bulk_data = {
2144 .supply = "current",
2145};
2146
2147static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2148 .name = "ad5398",
2149 .num_supplies = 1,
2150 .supplies = &ad5398_bulk_data,
2151};
2152
2153static struct platform_device ad5398_userspace_consumer_device = {
2154 .name = "reg-userspace-consumer",
2155 .id = 0,
2156 .dev = {
2157 .platform_data = &ad5398_userspace_comsumer_data,
2158 },
2159};
2160#endif
2161#endif
2162
Michael Hennerich0891bae2010-03-08 11:58:53 +00002163#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2164/* INT bound temperature alarm event. line 1 */
2165static unsigned long adt7410_platform_data[2] = {
2166 IRQ_PG4, IRQF_TRIGGER_LOW,
2167};
2168#endif
2169
2170#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2171/* INT bound temperature alarm event. line 1 */
2172static unsigned long adt7316_i2c_data[2] = {
2173 IRQF_TRIGGER_LOW, /* interrupt flags */
2174 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2175};
2176#endif
2177
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002178static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Bob Liu57084ed2012-01-16 11:18:50 +08002179#ifdef CONFIG_SND_SOC_AD193X_I2C
Barry Song92b20f72010-03-17 08:12:30 +00002180 {
2181 I2C_BOARD_INFO("ad1937", 0x04),
2182 },
2183#endif
2184
Lars-Peter Clausen080ae072011-08-30 13:33:06 -04002185#if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
Yi Lia65912c2010-04-06 05:53:16 +00002186 {
2187 I2C_BOARD_INFO("adav803", 0x10),
2188 },
2189#endif
2190
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002191#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002192 {
Barry Song427f2772009-07-17 07:04:55 +00002193 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00002194 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002195 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002196 },
2197#endif
Barry Songad6720c2010-02-03 09:15:31 +00002198
2199#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2200 {
2201 I2C_BOARD_INFO("ad7150", 0x48),
2202 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2203 },
2204#endif
2205
2206#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2207 {
2208 I2C_BOARD_INFO("ad7152", 0x48),
2209 },
2210#endif
2211
2212#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2213 {
2214 I2C_BOARD_INFO("ad774x", 0x48),
2215 },
2216#endif
2217
Michael Hennerich0891bae2010-03-08 11:58:53 +00002218#if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2219 {
2220 I2C_BOARD_INFO("ade7854", 0x38),
2221 },
2222#endif
2223
2224#if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2225 {
2226 I2C_BOARD_INFO("adt75", 0x9),
2227 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002228 },
2229#endif
2230
2231#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2232 {
2233 I2C_BOARD_INFO("adt7410", 0x48),
2234 /* CT critical temperature event. line 0 */
2235 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002236 .platform_data = (void *)&adt7410_platform_data,
2237 },
2238#endif
2239
2240#if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2241 {
2242 I2C_BOARD_INFO("ad7291", 0x20),
2243 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002244 },
2245#endif
2246
2247#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2248 {
2249 I2C_BOARD_INFO("adt7316", 0x48),
2250 .irq = IRQ_PG6,
2251 .platform_data = (void *)&adt7316_i2c_data,
Sonic Zhangef8873e2010-02-25 10:27:48 +00002252 },
2253#endif
2254
Michael Hennerichebd58332009-07-02 11:00:38 +00002255#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002256 {
2257 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002258 },
2259#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00002260#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002261 {
2262 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08002263 .irq = IRQ_PG6,
2264 },
2265#endif
2266#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2267 {
2268 I2C_BOARD_INFO("ad7879", 0x2F),
2269 .irq = IRQ_PG5,
2270 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002271 },
2272#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08002273#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2274 {
2275 I2C_BOARD_INFO("adp5588-keys", 0x34),
2276 .irq = IRQ_PG0,
2277 .platform_data = (void *)&adp5588_kpad_data,
2278 },
2279#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08002280#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2281 {
2282 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04002283 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002284 .platform_data = (void *)&adp5520_pdev_data,
2285 },
2286#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00002287#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2288 {
2289 I2C_BOARD_INFO("adxl34x", 0x53),
2290 .irq = IRQ_PG3,
2291 .platform_data = (void *)&adxl34x_info,
2292 },
2293#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00002294#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2295 {
2296 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2297 .platform_data = (void *)&adp5588_gpio_data,
2298 },
2299#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00002300#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2301 {
2302 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2303 },
2304#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002305#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2306 {
Sonic Zhang948ca1a2010-08-18 09:17:25 +00002307 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002308 },
2309#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00002310#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2311 {
2312 I2C_BOARD_INFO("adp8870", 0x2B),
2313 .platform_data = (void *)&adp8870_pdata,
2314 },
2315#endif
Cliff Caid53127f2009-10-15 02:33:04 +00002316#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2317 {
2318 I2C_BOARD_INFO("adau1371", 0x1A),
2319 },
2320#endif
Cliff Cai04267632009-10-28 06:50:36 +00002321#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2322 {
2323 I2C_BOARD_INFO("adau1761", 0x38),
2324 },
2325#endif
Cliff Caic48d7672010-02-11 09:27:18 +00002326#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2327 {
2328 I2C_BOARD_INFO("adau1361", 0x38),
2329 },
2330#endif
Lars-Peter Clausen2fba06f2011-08-30 13:12:26 -04002331#if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
2332 {
2333 I2C_BOARD_INFO("adau1701", 0x34),
2334 },
2335#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00002336#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2337 {
2338 I2C_BOARD_INFO("ad5258", 0x18),
2339 },
2340#endif
Cliff Cai29bb3bc2010-01-14 08:28:38 +00002341#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2342 {
2343 I2C_BOARD_INFO("ssm2602", 0x1b),
2344 },
2345#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002346#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2347 {
2348 I2C_BOARD_INFO("ad5398", 0xC),
Sonic Zhang27e9f0b2010-06-02 08:24:18 +00002349 .platform_data = (void *)&ad5398_regulator_data,
Sonic Zhangf32792d2010-02-09 02:47:09 +00002350 },
2351#endif
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002352#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2353 {
2354 I2C_BOARD_INFO("adp8860", 0x2A),
2355 .platform_data = (void *)&adp8860_pdata,
2356 },
2357#endif
Cliff Cai3cbcb1612010-04-22 05:55:56 +00002358#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2359 {
2360 I2C_BOARD_INFO("adau1373", 0x1A),
2361 },
2362#endif
steven miao39d3c1c2010-08-26 08:25:13 +00002363#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2364 {
2365 I2C_BOARD_INFO("ad5252", 0x2e),
2366 },
2367#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002368};
Aaron Wu8c998b22012-05-17 14:30:45 +08002369#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
2370|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2371unsigned short bfin_sport0_peripherals[] = {
2372 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2373 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
2374};
2375#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002376#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002377#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2378static struct resource bfin_sport0_uart_resources[] = {
2379 {
2380 .start = SPORT0_TCR1,
2381 .end = SPORT0_MRCS3+4,
2382 .flags = IORESOURCE_MEM,
2383 },
2384 {
2385 .start = IRQ_SPORT0_RX,
2386 .end = IRQ_SPORT0_RX+1,
2387 .flags = IORESOURCE_IRQ,
2388 },
2389 {
2390 .start = IRQ_SPORT0_ERROR,
2391 .end = IRQ_SPORT0_ERROR,
2392 .flags = IORESOURCE_IRQ,
2393 },
2394};
2395
Bryan Wu1394f032007-05-06 14:50:22 -07002396static struct platform_device bfin_sport0_uart_device = {
2397 .name = "bfin-sport-uart",
2398 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002399 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2400 .resource = bfin_sport0_uart_resources,
2401 .dev = {
2402 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2403 },
2404};
2405#endif
2406#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2407static struct resource bfin_sport1_uart_resources[] = {
2408 {
2409 .start = SPORT1_TCR1,
2410 .end = SPORT1_MRCS3+4,
2411 .flags = IORESOURCE_MEM,
2412 },
2413 {
2414 .start = IRQ_SPORT1_RX,
2415 .end = IRQ_SPORT1_RX+1,
2416 .flags = IORESOURCE_IRQ,
2417 },
2418 {
2419 .start = IRQ_SPORT1_ERROR,
2420 .end = IRQ_SPORT1_ERROR,
2421 .flags = IORESOURCE_IRQ,
2422 },
2423};
2424
Mike Frysingera8b19882010-11-24 09:23:04 +00002425static unsigned short bfin_sport1_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +00002426 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +00002427 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
Bryan Wu1394f032007-05-06 14:50:22 -07002428};
2429
2430static struct platform_device bfin_sport1_uart_device = {
2431 .name = "bfin-sport-uart",
2432 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002433 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2434 .resource = bfin_sport1_uart_resources,
2435 .dev = {
2436 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2437 },
Bryan Wu1394f032007-05-06 14:50:22 -07002438};
2439#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002440#endif
Aaron Wu8c998b22012-05-17 14:30:45 +08002441#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2442static struct resource bfin_sport0_resources[] = {
2443 {
2444 .start = SPORT0_TCR1,
2445 .end = SPORT0_MRCS3+4,
2446 .flags = IORESOURCE_MEM,
2447 },
2448 {
2449 .start = IRQ_SPORT0_RX,
2450 .end = IRQ_SPORT0_RX+1,
2451 .flags = IORESOURCE_IRQ,
2452 },
2453 {
2454 .start = IRQ_SPORT0_TX,
2455 .end = IRQ_SPORT0_TX+1,
2456 .flags = IORESOURCE_IRQ,
2457 },
2458 {
2459 .start = IRQ_SPORT0_ERROR,
2460 .end = IRQ_SPORT0_ERROR,
2461 .flags = IORESOURCE_IRQ,
2462 },
2463 {
2464 .start = CH_SPORT0_TX,
2465 .end = CH_SPORT0_TX,
2466 .flags = IORESOURCE_DMA,
2467 },
2468 {
2469 .start = CH_SPORT0_RX,
2470 .end = CH_SPORT0_RX,
2471 .flags = IORESOURCE_DMA,
2472 },
2473};
2474static struct platform_device bfin_sport0_device = {
2475 .name = "bfin_sport_raw",
2476 .id = 0,
2477 .num_resources = ARRAY_SIZE(bfin_sport0_resources),
2478 .resource = bfin_sport0_resources,
2479 .dev = {
2480 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2481 },
2482};
2483#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002484#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002485#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2486/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002487
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002488#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2489#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002490static struct pata_platform_info bfin_pata_platform_data = {
2491 .ioport_shift = 1,
Yong Zhang7832bb52011-09-07 16:10:03 +08002492 .irq_flags = IRQF_TRIGGER_HIGH,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002493};
2494
2495static struct resource bfin_pata_resources[] = {
2496 {
2497 .start = 0x20314020,
2498 .end = 0x2031403F,
2499 .flags = IORESOURCE_MEM,
2500 },
2501 {
2502 .start = 0x2031401C,
2503 .end = 0x2031401F,
2504 .flags = IORESOURCE_MEM,
2505 },
2506 {
2507 .start = PATA_INT,
2508 .end = PATA_INT,
2509 .flags = IORESOURCE_IRQ,
2510 },
2511};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002512#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2513static struct pata_platform_info bfin_pata_platform_data = {
2514 .ioport_shift = 0,
2515};
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002516/* CompactFlash Storage Card Memory Mapped Addressing
Michael Hennerich648882d2009-04-21 12:05:50 +00002517 * /REG = A11 = 1
2518 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002519static struct resource bfin_pata_resources[] = {
2520 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002521 .start = 0x20211800,
2522 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002523 .flags = IORESOURCE_MEM,
2524 },
2525 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002526 .start = 0x2021180E, /* Device Ctl */
2527 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002528 .flags = IORESOURCE_MEM,
2529 },
2530};
2531#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002532
2533static struct platform_device bfin_pata_device = {
2534 .name = "pata_platform",
2535 .id = -1,
2536 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2537 .resource = bfin_pata_resources,
2538 .dev = {
2539 .platform_data = &bfin_pata_platform_data,
2540 }
2541};
2542#endif
2543
Michael Hennerich14b03202008-05-07 11:41:26 +08002544static const unsigned int cclk_vlev_datasheet[] =
2545{
2546 VRPAIR(VLEV_085, 250000000),
2547 VRPAIR(VLEV_090, 376000000),
2548 VRPAIR(VLEV_095, 426000000),
2549 VRPAIR(VLEV_100, 426000000),
2550 VRPAIR(VLEV_105, 476000000),
2551 VRPAIR(VLEV_110, 476000000),
2552 VRPAIR(VLEV_115, 476000000),
2553 VRPAIR(VLEV_120, 500000000),
2554 VRPAIR(VLEV_125, 533000000),
2555 VRPAIR(VLEV_130, 600000000),
2556};
2557
2558static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2559 .tuple_tab = cclk_vlev_datasheet,
2560 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2561 .vr_settling_time = 25 /* us */,
2562};
2563
2564static struct platform_device bfin_dpmc = {
2565 .name = "bfin dpmc",
2566 .dev = {
2567 .platform_data = &bfin_dmpc_vreg_data,
2568 },
2569};
2570
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002571#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2572 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2573 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2574
2575#define SPORT_REQ(x) \
2576 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2577 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2578
2579static const u16 bfin_snd_pin[][7] = {
2580 SPORT_REQ(0),
2581 SPORT_REQ(1),
2582};
2583
2584static struct bfin_snd_platform_data bfin_snd_data[] = {
2585 {
2586 .pin_req = &bfin_snd_pin[0][0],
2587 },
2588 {
2589 .pin_req = &bfin_snd_pin[1][0],
2590 },
2591};
2592
2593#define BFIN_SND_RES(x) \
2594 [x] = { \
2595 { \
2596 .start = SPORT##x##_TCR1, \
2597 .end = SPORT##x##_TCR1, \
2598 .flags = IORESOURCE_MEM \
2599 }, \
2600 { \
2601 .start = CH_SPORT##x##_RX, \
2602 .end = CH_SPORT##x##_RX, \
2603 .flags = IORESOURCE_DMA, \
2604 }, \
2605 { \
2606 .start = CH_SPORT##x##_TX, \
2607 .end = CH_SPORT##x##_TX, \
2608 .flags = IORESOURCE_DMA, \
2609 }, \
2610 { \
2611 .start = IRQ_SPORT##x##_ERROR, \
2612 .end = IRQ_SPORT##x##_ERROR, \
2613 .flags = IORESOURCE_IRQ, \
2614 } \
2615 }
2616
2617static struct resource bfin_snd_resources[][4] = {
2618 BFIN_SND_RES(0),
2619 BFIN_SND_RES(1),
2620};
Scott Jiang2b6678c52011-07-05 19:27:25 -04002621#endif
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002622
Scott Jiang2b6678c52011-07-05 19:27:25 -04002623#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2624static struct platform_device bfin_i2s_pcm = {
2625 .name = "bfin-i2s-pcm-audio",
2626 .id = -1,
2627};
2628#endif
2629
2630#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2631static struct platform_device bfin_tdm_pcm = {
2632 .name = "bfin-tdm-pcm-audio",
2633 .id = -1,
2634};
2635#endif
2636
2637#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2638static struct platform_device bfin_ac97_pcm = {
2639 .name = "bfin-ac97-pcm-audio",
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002640 .id = -1,
2641};
2642#endif
2643
Scott Jiang63f49dc2012-08-10 18:06:09 -04002644#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
2645 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2646static const char * const ad1836_link[] = {
2647 "bfin-tdm.0",
2648 "spi0.4",
2649};
2650static struct platform_device bfin_ad1836_machine = {
2651 .name = "bfin-snd-ad1836",
2652 .id = -1,
2653 .dev = {
2654 .platform_data = (void *)ad1836_link,
2655 },
2656};
2657#endif
2658
Bob Liu32689682012-01-27 21:36:21 +08002659#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2660 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2661static const unsigned ad73311_gpio[] = {
2662 GPIO_PF4,
2663};
2664
2665static struct platform_device bfin_ad73311_machine = {
2666 .name = "bfin-snd-ad73311",
2667 .id = 1,
2668 .dev = {
2669 .platform_data = (void *)ad73311_gpio,
2670 },
2671};
2672#endif
2673
Scott Jiange0754d82011-08-16 19:08:42 -04002674#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002675static struct platform_device bfin_ad73311_codec_device = {
2676 .name = "ad73311",
2677 .id = -1,
2678};
2679#endif
2680
Lars-Peter Clausen080ae072011-08-30 13:33:06 -04002681#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
2682 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
2683static struct platform_device bfin_eval_adav801_device = {
2684 .name = "bfin-eval-adav801",
2685 .id = -1,
2686};
2687#endif
2688
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002689#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002690static struct platform_device bfin_i2s = {
2691 .name = "bfin-i2s",
2692 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002693 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2694 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2695 .dev = {
2696 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2697 },
Barry Song336746e2009-10-13 09:19:18 +00002698};
2699#endif
2700
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002701#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
Barry Song83124402009-08-06 21:03:02 +00002702static struct platform_device bfin_tdm = {
2703 .name = "bfin-tdm",
Barry Song336746e2009-10-13 09:19:18 +00002704 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002705 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2706 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2707 .dev = {
2708 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2709 },
Barry Song336746e2009-10-13 09:19:18 +00002710};
2711#endif
2712
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002713#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002714static struct platform_device bfin_ac97 = {
2715 .name = "bfin-ac97",
2716 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002717 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2718 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2719 .dev = {
2720 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2721 },
Barry Song83124402009-08-06 21:03:02 +00002722};
2723#endif
2724
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002725#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2726#define REGULATOR_ADP122 "adp122"
2727#define REGULATOR_ADP122_UV 2500000
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002728
2729static struct regulator_consumer_supply adp122_consumers = {
2730 .supply = REGULATOR_ADP122,
2731};
2732
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002733static struct regulator_init_data adp_switch_regulator_data = {
2734 .constraints = {
2735 .name = REGULATOR_ADP122,
2736 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2737 .min_uV = REGULATOR_ADP122_UV,
2738 .max_uV = REGULATOR_ADP122_UV,
2739 .min_uA = 0,
2740 .max_uA = 300000,
2741 },
2742 .num_consumer_supplies = 1, /* only 1 */
2743 .consumer_supplies = &adp122_consumers,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002744};
2745
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002746static struct fixed_voltage_config adp_switch_pdata = {
2747 .supply_name = REGULATOR_ADP122,
2748 .microvolts = REGULATOR_ADP122_UV,
2749 .gpio = GPIO_PF2,
2750 .enable_high = 1,
2751 .enabled_at_boot = 0,
2752 .init_data = &adp_switch_regulator_data,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002753};
2754
2755static struct platform_device adp_switch_device = {
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002756 .name = "reg-fixed-voltage",
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002757 .id = 0,
2758 .dev = {
2759 .platform_data = &adp_switch_pdata,
2760 },
2761};
2762
2763#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2764 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2765static struct regulator_bulk_data adp122_bulk_data = {
2766 .supply = REGULATOR_ADP122,
2767};
2768
2769static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2770 .name = REGULATOR_ADP122,
2771 .num_supplies = 1,
2772 .supplies = &adp122_bulk_data,
2773};
2774
2775static struct platform_device adp122_userspace_consumer_device = {
2776 .name = "reg-userspace-consumer",
2777 .id = 0,
2778 .dev = {
2779 .platform_data = &adp122_userspace_comsumer_data,
2780 },
2781};
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002782#endif
2783#endif
2784
Michael Hennerich0891bae2010-03-08 11:58:53 +00002785#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2786 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2787
2788static struct resource iio_gpio_trigger_resources[] = {
2789 [0] = {
2790 .start = IRQ_PF5,
2791 .end = IRQ_PF5,
2792 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2793 },
2794};
2795
2796static struct platform_device iio_gpio_trigger = {
2797 .name = "iio_gpio_trigger",
2798 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2799 .resource = iio_gpio_trigger_resources,
2800};
2801#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002802
Lars-Peter Clausenaf80d0d2011-08-30 14:02:50 -04002803#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2804 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2805static struct platform_device bf5xx_adau1373_device = {
2806 .name = "bfin-eval-adau1373",
2807};
2808#endif
2809
Lars-Peter Clausen2fba06f2011-08-30 13:12:26 -04002810#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
2811 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
2812static struct platform_device bf5xx_adau1701_device = {
2813 .name = "bfin-eval-adau1701",
2814};
2815#endif
2816
Bryan Wu1394f032007-05-06 14:50:22 -07002817static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08002818
2819 &bfin_dpmc,
Aaron Wu8c998b22012-05-17 14:30:45 +08002820#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2821 &bfin_sport0_device,
2822#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002823#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2824 &bfin_pcmcia_cf_device,
2825#endif
2826
2827#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2828 &rtc_device,
2829#endif
2830
2831#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2832 &sl811_hcd_device,
2833#endif
2834
2835#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2836 &isp1362_hcd_device,
2837#endif
2838
Michael Hennerich3f375692008-11-18 17:48:22 +08002839#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2840 &bfin_isp1760_device,
2841#endif
2842
Bryan Wu1394f032007-05-06 14:50:22 -07002843#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2844 &smc91x_device,
2845#endif
2846
Alex Landauf40d24d2007-07-12 12:11:48 +08002847#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2848 &dm9000_device,
2849#endif
2850
Barry Song706a01b2009-11-02 07:29:07 +00002851#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2852 &bfin_can_device,
2853#endif
2854
Bryan Wu1394f032007-05-06 14:50:22 -07002855#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08002856 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07002857 &bfin_mac_device,
2858#endif
2859
2860#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2861 &net2272_bfin_device,
2862#endif
2863
Sonic Zhang7d157fb2011-11-07 18:40:10 +08002864#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002865 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07002866#endif
2867
Cliff Cai1e9aa952009-03-28 23:28:51 +08002868#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2869 &bfin_sport_spi0_device,
2870 &bfin_sport_spi1_device,
2871#endif
2872
Bryan Wu1394f032007-05-06 14:50:22 -07002873#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2874 &bfin_fb_device,
2875#endif
2876
Michael Hennerich2043f3f2008-10-13 14:46:30 +08002877#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2878 &bfin_lq035q1_device,
2879#endif
2880
Bob Liubd5fd092012-01-05 11:08:30 +08002881#if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
2882 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
2883 &bfin_capture_device,
2884#endif
2885
Bryan Wu1394f032007-05-06 14:50:22 -07002886#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00002887#ifdef CONFIG_SERIAL_BFIN_UART0
2888 &bfin_uart0_device,
2889#endif
2890#ifdef CONFIG_SERIAL_BFIN_UART1
2891 &bfin_uart1_device,
2892#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002893#endif
2894
Graf Yang5be36d22008-04-25 03:09:15 +08002895#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08002896#ifdef CONFIG_BFIN_SIR0
2897 &bfin_sir0_device,
2898#endif
2899#ifdef CONFIG_BFIN_SIR1
2900 &bfin_sir1_device,
2901#endif
Graf Yang5be36d22008-04-25 03:09:15 +08002902#endif
2903
Bryan Wu1394f032007-05-06 14:50:22 -07002904#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2905 &i2c_bfin_twi_device,
2906#endif
2907
2908#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002909#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002910 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002911#endif
2912#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002913 &bfin_sport1_uart_device,
2914#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002915#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002916
2917#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2918 &bfin_pata_device,
2919#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08002920
2921#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2922 &bfin_device_gpiokeys,
2923#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08002924
Mike Frysingerfc689112008-06-25 11:41:42 +08002925#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2926 &bfin_async_nand_device,
2927#endif
2928
Mike Frysinger793dc272008-03-26 08:09:12 +08002929#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08002930 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08002931#endif
Barry Song83124402009-08-06 21:03:02 +00002932
Scott Jiang2b6678c52011-07-05 19:27:25 -04002933#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2934 &bfin_i2s_pcm,
2935#endif
2936
2937#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2938 &bfin_tdm_pcm,
2939#endif
2940
2941#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2942 &bfin_ac97_pcm,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002943#endif
2944
Scott Jiang63f49dc2012-08-10 18:06:09 -04002945#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
2946 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2947 &bfin_ad1836_machine,
2948#endif
2949
Bob Liu32689682012-01-27 21:36:21 +08002950#if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2951 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2952 &bfin_ad73311_machine,
2953#endif
2954
Scott Jiange0754d82011-08-16 19:08:42 -04002955#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002956 &bfin_ad73311_codec_device,
2957#endif
2958
2959#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002960 &bfin_i2s,
2961#endif
2962
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002963#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
Barry Song83124402009-08-06 21:03:02 +00002964 &bfin_tdm,
2965#endif
Barry Song336746e2009-10-13 09:19:18 +00002966
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002967#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002968 &bfin_ac97,
2969#endif
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002970
Sonic Zhangf32792d2010-02-09 02:47:09 +00002971#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2972#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2973 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2974 &ad5398_virt_consumer_device,
2975#endif
2976#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2977 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2978 &ad5398_userspace_consumer_device,
2979#endif
2980#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002981
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002982#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002983 &adp_switch_device,
2984#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2985 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2986 &adp122_userspace_consumer_device,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002987#endif
2988#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00002989
2990#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2991 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2992 &iio_gpio_trigger,
2993#endif
Lars-Peter Clausen2fba06f2011-08-30 13:12:26 -04002994
Lars-Peter Clausenaf80d0d2011-08-30 14:02:50 -04002995#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2996 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2997 &bf5xx_adau1373_device,
2998#endif
2999
Lars-Peter Clausen2fba06f2011-08-30 13:12:26 -04003000#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
3001 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
3002 &bf5xx_adau1701_device,
3003#endif
Lars-Peter Clausen080ae072011-08-30 13:33:06 -04003004
3005#if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
3006 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
3007 &bfin_eval_adav801_device,
3008#endif
Bryan Wu1394f032007-05-06 14:50:22 -07003009};
3010
Mike Frysinger9be86312011-05-04 11:20:15 -04003011static int __init net2272_init(void)
3012{
3013#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
3014 int ret;
3015
3016 ret = gpio_request(GPIO_PF6, "net2272");
3017 if (ret)
3018 return ret;
3019
3020 /* Reset the USB chip */
3021 gpio_direction_output(GPIO_PF6, 0);
3022 mdelay(2);
3023 gpio_set_value(GPIO_PF6, 1);
3024#endif
3025
3026 return 0;
3027}
3028
Bryan Wu1394f032007-05-06 14:50:22 -07003029static int __init stamp_init(void)
3030{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08003031 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08003032 bfin_plat_nand_init();
Mike Frysinger0531c462010-01-19 07:04:29 +00003033 adf702x_mac_init();
Bryan Wu1394f032007-05-06 14:50:22 -07003034 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00003035 i2c_register_board_info(0, bfin_i2c_board_info,
3036 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08003037 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08003038
Mike Frysinger9be86312011-05-04 11:20:15 -04003039 if (net2272_init())
3040 pr_warning("unable to configure net2272; it probably won't work\n");
3041
Bryan Wu1394f032007-05-06 14:50:22 -07003042 return 0;
3043}
3044
3045arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08003046
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00003047
3048static struct platform_device *stamp_early_devices[] __initdata = {
3049#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
3050#ifdef CONFIG_SERIAL_BFIN_UART0
3051 &bfin_uart0_device,
3052#endif
3053#ifdef CONFIG_SERIAL_BFIN_UART1
3054 &bfin_uart1_device,
3055#endif
3056#endif
3057
3058#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
3059#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
3060 &bfin_sport0_uart_device,
3061#endif
3062#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
3063 &bfin_sport1_uart_device,
3064#endif
3065#endif
3066};
3067
3068void __init native_machine_early_platform_add_devices(void)
3069{
3070 printk(KERN_INFO "register early platform devices\n");
3071 early_platform_add_devices(stamp_early_devices,
3072 ARRAY_SIZE(stamp_early_devices));
3073}
3074
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08003075void native_machine_restart(char *cmd)
3076{
3077 /* workaround reboot hang when booting from SPI */
3078 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08003079 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08003080}
Mike Frysinger137b1522007-11-22 16:07:03 +08003081
3082/*
3083 * Currently the MAC address is saved in Flash by U-Boot
3084 */
3085#define FLASH_MAC 0x203f0000
Danny Kukawka0eceb822012-02-16 07:09:30 +00003086int bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08003087{
3088 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
3089 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
Danny Kukawka0eceb822012-02-16 07:09:30 +00003090 return 0;
Mike Frysinger137b1522007-11-22 16:07:03 +08003091}
Mike Frysinger9862cc52007-11-15 21:21:20 +08003092EXPORT_SYMBOL(bfin_get_ether_addr);