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Shawn Guo3c77c292012-03-05 22:30:53 +08001#ifndef __IMX_AUDMUX_H
2#define __IMX_AUDMUX_H
Sascha Hauer9eedbdf2009-10-29 17:12:39 +01003
4#define MX27_AUDMUX_HPCR1_SSI0 0
5#define MX27_AUDMUX_HPCR2_SSI1 1
6#define MX27_AUDMUX_HPCR3_SSI_PINS_4 2
7#define MX27_AUDMUX_PPCR1_SSI_PINS_1 3
8#define MX27_AUDMUX_PPCR2_SSI_PINS_2 4
9#define MX27_AUDMUX_PPCR3_SSI_PINS_3 5
10
11#define MX31_AUDMUX_PORT1_SSI0 0
12#define MX31_AUDMUX_PORT2_SSI1 1
13#define MX31_AUDMUX_PORT3_SSI_PINS_3 2
14#define MX31_AUDMUX_PORT4_SSI_PINS_4 3
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
Torben Hohn409b78c2012-07-18 15:01:17 +020017#define MX31_AUDMUX_PORT7_SSI_PINS_7 6
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010018
Julien Boibessot0ff25932011-03-18 09:31:46 +010019#define MX51_AUDMUX_PORT1_SSI0 0
20#define MX51_AUDMUX_PORT2_SSI1 1
21#define MX51_AUDMUX_PORT3 2
22#define MX51_AUDMUX_PORT4 3
23#define MX51_AUDMUX_PORT5 4
24#define MX51_AUDMUX_PORT6 5
25#define MX51_AUDMUX_PORT7 6
26
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010027/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
Shawn Guoaf4872f2012-03-05 22:30:54 +080028#define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
29#define IMX_AUDMUX_V1_PCR_INMEN (1 << 8)
30#define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10)
31#define IMX_AUDMUX_V1_PCR_SYN (1 << 12)
32#define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
33#define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
34#define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
35#define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25)
36#define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
37#define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
38#define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31)
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010039
Julien Boibessot0ff25932011-03-18 09:31:46 +010040/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
Shawn Guoaf4872f2012-03-05 22:30:54 +080041#define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
42#define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
43#define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
44#define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
45#define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
46#define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
47#define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
48#define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
49#define IMX_AUDMUX_V2_PTCR_SYN (1 << 11)
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010050
Shawn Guoaf4872f2012-03-05 22:30:54 +080051#define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
52#define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
53#define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
54#define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010055
Shawn Guoaf4872f2012-03-05 22:30:54 +080056int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010057
Shawn Guoaf4872f2012-03-05 22:30:54 +080058int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
Sascha Hauer9eedbdf2009-10-29 17:12:39 +010059 unsigned int pdcr);
60
Shawn Guo3c77c292012-03-05 22:30:53 +080061#endif /* __IMX_AUDMUX_H */