blob: 2f855443555c0be674f41fe0426cf19a42f9b560 [file] [log] [blame]
Luciano Coelhof5fc0f82009-08-06 16:25:28 +03001/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
Shahar Levi00d20102010-11-08 11:20:10 +000025#ifndef __WL12XX_H__
26#define __WL12XX_H__
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030027
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
Shahar Levi00d20102010-11-08 11:20:10 +000035#include "conf.h"
36#include "ini.h"
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030037
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030038#define DRIVER_NAME "wl1271"
39#define DRIVER_PREFIX DRIVER_NAME ": "
40
41enum {
42 DEBUG_NONE = 0,
43 DEBUG_IRQ = BIT(0),
44 DEBUG_SPI = BIT(1),
45 DEBUG_BOOT = BIT(2),
46 DEBUG_MAILBOX = BIT(3),
Kalle Valoc8c90872010-02-18 13:25:53 +020047 DEBUG_TESTMODE = BIT(4),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030048 DEBUG_EVENT = BIT(5),
49 DEBUG_TX = BIT(6),
50 DEBUG_RX = BIT(7),
51 DEBUG_SCAN = BIT(8),
52 DEBUG_CRYPT = BIT(9),
53 DEBUG_PSM = BIT(10),
54 DEBUG_MAC80211 = BIT(11),
55 DEBUG_CMD = BIT(12),
56 DEBUG_ACX = BIT(13),
Teemu Paasikivia3b8ea72010-03-18 12:26:41 +020057 DEBUG_SDIO = BIT(14),
Juuso Oikarinen14b228a2010-03-18 12:26:43 +020058 DEBUG_FILTERS = BIT(15),
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +020059 DEBUG_ADHOC = BIT(16),
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030060 DEBUG_ALL = ~0,
61};
62
Eliad Peller17c17552010-12-12 12:15:35 +020063extern u32 wl12xx_debug_level;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030064
65#define DEBUG_DUMP_LIMIT 1024
66
67#define wl1271_error(fmt, arg...) \
Eliad Peller17c17552010-12-12 12:15:35 +020068 pr_err(DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030069
70#define wl1271_warning(fmt, arg...) \
Eliad Peller17c17552010-12-12 12:15:35 +020071 pr_warning(DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030072
73#define wl1271_notice(fmt, arg...) \
Eliad Peller17c17552010-12-12 12:15:35 +020074 pr_info(DRIVER_PREFIX fmt "\n", ##arg)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030075
76#define wl1271_info(fmt, arg...) \
Eliad Peller17c17552010-12-12 12:15:35 +020077 pr_info(DRIVER_PREFIX fmt "\n", ##arg)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030078
79#define wl1271_debug(level, fmt, arg...) \
80 do { \
Eliad Peller17c17552010-12-12 12:15:35 +020081 if (level & wl12xx_debug_level) \
82 pr_debug(DRIVER_PREFIX fmt "\n", ##arg); \
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030083 } while (0)
84
Eliad Peller17c17552010-12-12 12:15:35 +020085/* TODO: use pr_debug_hex_dump when it will be available */
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030086#define wl1271_dump(level, prefix, buf, len) \
87 do { \
Eliad Peller17c17552010-12-12 12:15:35 +020088 if (level & wl12xx_debug_level) \
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030089 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
90 DUMP_PREFIX_OFFSET, 16, 1, \
91 buf, \
92 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
93 0); \
94 } while (0)
95
96#define wl1271_dump_ascii(level, prefix, buf, len) \
97 do { \
Eliad Peller17c17552010-12-12 12:15:35 +020098 if (level & wl12xx_debug_level) \
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030099 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
100 DUMP_PREFIX_OFFSET, 16, 1, \
101 buf, \
102 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
103 true); \
104 } while (0)
105
Arik Nemtsovae113b52010-10-16 18:45:07 +0200106#define WL1271_DEFAULT_STA_RX_CONFIG (CFG_UNI_FILTER_EN | \
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300107 CFG_BSSID_FILTER_EN | \
108 CFG_MC_FILTER_EN)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300109
Arik Nemtsovae113b52010-10-16 18:45:07 +0200110#define WL1271_DEFAULT_STA_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300111 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
112 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
113 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
114
Arik Nemtsovae113b52010-10-16 18:45:07 +0200115#define WL1271_DEFAULT_AP_RX_CONFIG 0
116
117#define WL1271_DEFAULT_AP_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PREQ_EN | \
118 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
119 CFG_RX_CTL_EN | CFG_RX_AUTH_EN | \
120 CFG_RX_ASSOC_EN)
121
122
123
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300124#define WL1271_FW_NAME "wl1271-fw.bin"
125#define WL1271_NVS_NAME "wl1271-nvs.bin"
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200126
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200127#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
128#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
129
Juuso Oikarinen7a557242010-09-27 12:42:07 +0200130#define WL1271_CIPHER_SUITE_GEM 0x00147201
131
Juuso Oikarinen259da432010-03-26 12:53:18 +0200132#define WL1271_BUSY_WORD_CNT 1
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300133#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300134
135#define WL1271_ELP_HW_STATE_ASLEEP 0
136#define WL1271_ELP_HW_STATE_IRQ 1
137
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300138#define WL1271_DEFAULT_BEACON_INT 100
139#define WL1271_DEFAULT_DTIM_PERIOD 1
140
Arik Nemtsov98bdaab2010-10-16 18:08:58 +0200141#define WL1271_AP_GLOBAL_HLID 0
142#define WL1271_AP_BROADCAST_HLID 1
143#define WL1271_AP_STA_HLID_START 2
144
145#define WL1271_AP_BSS_INDEX 0
146#define WL1271_AP_DEF_INACTIV_SEC 300
147#define WL1271_AP_DEF_BEACON_EXP 20
148
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300149#define ACX_TX_DESCRIPTORS 32
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300150
Ido Yariv1f37cbc2010-09-30 13:28:27 +0200151#define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
152
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300153enum wl1271_state {
154 WL1271_STATE_OFF,
155 WL1271_STATE_ON,
156 WL1271_STATE_PLT,
157};
158
159enum wl1271_partition_type {
160 PART_DOWN,
161 PART_WORK,
162 PART_DRPW,
163
164 PART_TABLE_LEN
165};
166
167struct wl1271_partition {
168 u32 size;
169 u32 start;
170};
171
172struct wl1271_partition_set {
173 struct wl1271_partition mem;
174 struct wl1271_partition reg;
Juuso Oikarinen451de972009-10-12 15:08:46 +0300175 struct wl1271_partition mem2;
176 struct wl1271_partition mem3;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300177};
178
179struct wl1271;
180
181/* FIXME: I'm not sure about this structure name */
182struct wl1271_chip {
183 u32 id;
184 char fw_ver[21];
185};
186
187struct wl1271_stats {
188 struct acx_statistics *fw_stats;
189 unsigned long fw_stats_update;
190
191 unsigned int retry_count;
192 unsigned int excessive_retries;
193};
194
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300195#define NUM_TX_QUEUES 4
196#define NUM_RX_PKT_DESC 8
197
Arik Nemtsovbeb6c882010-10-16 18:53:48 +0200198#define AP_MAX_STATIONS 5
199
200/* Broadcast and Global links + links to stations */
201#define AP_MAX_LINKS (AP_MAX_STATIONS + 2)
202
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300203/* FW status registers */
204struct wl1271_fw_status {
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300205 __le32 intr;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300206 u8 fw_rx_counter;
207 u8 drv_rx_counter;
208 u8 reserved;
209 u8 tx_results_counter;
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300210 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
211 __le32 tx_released_blks[NUM_TX_QUEUES];
212 __le32 fw_localtime;
Arik Nemtsovbeb6c882010-10-16 18:53:48 +0200213
214 /* Next fields valid only in AP FW */
215
216 /*
217 * A bitmap (where each bit represents a single HLID)
218 * to indicate if the station is in PS mode.
219 */
220 __le32 link_ps_bitmap;
221
222 /* Number of freed MBs per HLID */
223 u8 tx_lnk_free_blks[AP_MAX_LINKS];
224 u8 padding_1[1];
Eric Dumazetba2d3582010-06-02 18:10:09 +0000225} __packed;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300226
227struct wl1271_rx_mem_pool_addr {
228 u32 addr;
229 u32 addr_extra;
230};
231
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300232struct wl1271_scan {
Juuso Oikarinen4fb26fa2010-05-24 11:18:20 +0300233 struct cfg80211_scan_request *req;
Luciano Coelho08688d62010-07-08 17:50:07 +0300234 bool *scanned_ch;
Juuso Oikarinen78abd322010-09-21 06:23:32 +0200235 bool failed;
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300236 u8 state;
237 u8 ssid[IW_ESSID_MAX_SIZE+1];
238 size_t ssid_len;
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300239};
240
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200241struct wl1271_if_operations {
242 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
243 bool fixed);
244 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
245 bool fixed);
246 void (*reset)(struct wl1271 *wl);
247 void (*init)(struct wl1271 *wl);
Ohad Ben-Cohen2cc78ff2010-09-16 01:22:04 +0200248 int (*power)(struct wl1271 *wl, bool enable);
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200249 struct device* (*dev)(struct wl1271 *wl);
250 void (*enable_irq)(struct wl1271 *wl);
251 void (*disable_irq)(struct wl1271 *wl);
252};
253
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300254struct wl1271 {
Teemu Paasikivi3b56dd62010-03-18 12:26:46 +0200255 struct platform_device *plat_dev;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300256 struct ieee80211_hw *hw;
257 bool mac80211_registered;
258
Teemu Paasikivi8197b712010-02-22 08:38:23 +0200259 void *if_priv;
260
261 struct wl1271_if_operations *if_ops;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300262
263 void (*set_power)(bool enable);
264 int irq;
Ohad Ben-Cohen15cea992010-09-16 01:31:51 +0200265 int ref_clock;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300266
267 spinlock_t wl_lock;
268
269 enum wl1271_state state;
270 struct mutex mutex;
271
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200272#define WL1271_FLAG_STA_RATES_CHANGED (0)
273#define WL1271_FLAG_STA_ASSOCIATED (1)
Juuso Oikarinen71449f82009-12-11 15:41:07 +0200274#define WL1271_FLAG_JOINED (2)
275#define WL1271_FLAG_GPIO_POWER (3)
276#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
Luciano Coelho08688d62010-07-08 17:50:07 +0300277#define WL1271_FLAG_IN_ELP (5)
278#define WL1271_FLAG_PSM (6)
279#define WL1271_FLAG_PSM_REQUESTED (7)
280#define WL1271_FLAG_IRQ_PENDING (8)
281#define WL1271_FLAG_IRQ_RUNNING (9)
282#define WL1271_FLAG_IDLE (10)
283#define WL1271_FLAG_IDLE_REQUESTED (11)
284#define WL1271_FLAG_PSPOLL_FAILURE (12)
Juuso Oikarinenc2c192a2010-07-27 03:30:09 +0300285#define WL1271_FLAG_STA_STATE_SENT (13)
Ido Yariva5225502010-10-12 14:49:10 +0200286#define WL1271_FLAG_FW_TX_BUSY (14)
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200287 unsigned long flags;
288
Juuso Oikarinen451de972009-10-12 15:08:46 +0300289 struct wl1271_partition_set part;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300290
291 struct wl1271_chip chip;
292
293 int cmd_box_addr;
294 int event_box_addr;
295
296 u8 *fw;
297 size_t fw_len;
Juuso Oikarinen152ee6e2010-02-18 13:25:42 +0200298 struct wl1271_nvs_file *nvs;
Juuso Oikarinen02fabb02010-08-19 04:41:15 +0200299 size_t nvs_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300300
Juuso Oikarinend717fd62010-05-07 11:38:58 +0300301 s8 hw_pg_ver;
302
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300303 u8 bssid[ETH_ALEN];
304 u8 mac_addr[ETH_ALEN];
305 u8 bss_type;
Juuso Oikarinen5da11dc2010-03-26 12:53:24 +0200306 u8 set_bss_type;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300307 u8 ssid[IW_ESSID_MAX_SIZE + 1];
308 u8 ssid_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300309 int channel;
310
311 struct wl1271_acx_mem_map *target_mem_map;
312
313 /* Accounting for allocated / available TX blocks on HW */
314 u32 tx_blocks_freed[NUM_TX_QUEUES];
315 u32 tx_blocks_available;
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200316 u32 tx_results_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300317
318 /* Transmitted TX packets counter for chipset interface */
Juuso Oikarinenffb591c2010-02-22 08:38:31 +0200319 u32 tx_packets_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300320
321 /* Time-offset between host and chipset clocks */
Juuso Oikarinenac5e1e32010-02-22 08:38:38 +0200322 s64 time_offset;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300323
324 /* Session counter for the chipset */
325 int session_counter;
326
327 /* Frames scheduled for transmission, not handled yet */
Juuso Oikarinen6742f552010-12-13 09:52:37 +0200328 struct sk_buff_head tx_queue[NUM_TX_QUEUES];
329 int tx_queue_count;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300330
331 struct work_struct tx_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300332
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300333 /* Pending TX frames */
Ido Yariv25eeb9e2010-10-12 16:20:06 +0200334 unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)];
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300335 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
Juuso Oikarinen781608c2010-05-24 11:18:17 +0300336 int tx_frames_cnt;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300337
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300338 /* Security sequence number counters */
339 u8 tx_security_last_seq;
Juuso Oikarinen04e36fc2010-02-22 08:38:40 +0200340 s64 tx_security_seq;
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300341
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300342 /* FW Rx counter */
343 u32 rx_counter;
344
345 /* Rx memory pool address */
346 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
347
Ido Yariv1f37cbc2010-09-30 13:28:27 +0200348 /* Intermediate buffer, used for packet aggregation */
349 u8 *aggr_buf;
350
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300351 /* The target interrupt mask */
352 struct work_struct irq_work;
353
Juuso Oikarinen52b0e7a2010-09-21 06:23:31 +0200354 /* Hardware recovery work */
355 struct work_struct recovery_work;
356
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300357 /* The mbox event mask */
358 u32 event_mask;
359
360 /* Mailbox pointers */
361 u32 mbox_ptr[2];
362
363 /* Are we currently scanning */
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300364 struct wl1271_scan scan;
Juuso Oikarinen78abd322010-09-21 06:23:32 +0200365 struct delayed_work scan_complete_work;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300366
Juuso Oikarinen2f6724b2010-11-24 08:16:57 +0200367 /* probe-req template for the current AP */
368 struct sk_buff *probereq;
369
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300370 /* Our association ID */
371 u16 aid;
372
Shahar Levie8b03a22010-10-13 16:09:39 +0200373 /*
374 * currently configured rate set:
375 * bits 0-15 - 802.11abg rates
376 * bits 16-23 - 802.11n MCS index mask
377 * support only 1 stream, thus only 8 bits for the MCS rates (0-7).
378 */
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200379 u32 sta_rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300380 u32 basic_rate_set;
Juuso Oikarinenebba60c2010-04-01 11:38:20 +0300381 u32 basic_rate;
Juuso Oikarinen830fb672009-12-11 15:41:06 +0200382 u32 rate_set;
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300383
Juuso Oikarinen8a5a37a2009-10-08 21:56:24 +0300384 /* The current band */
385 enum ieee80211_band band;
386
Juuso Oikarinen60e84c22010-03-26 12:53:25 +0200387 /* Beaconing interval (needed for ad-hoc) */
388 u32 beacon_int;
389
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300390 /* Default key (for WEP) */
391 u32 default_key;
392
Juuso Oikarinen14b228a2010-03-18 12:26:43 +0200393 unsigned int filters;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300394 unsigned int rx_config;
395 unsigned int rx_filter;
396
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300397 struct completion *elp_compl;
Juuso Oikarinen37b70a82009-10-08 21:56:21 +0300398 struct delayed_work elp_work;
Juuso Oikarinen90494a92010-07-08 17:50:00 +0300399 struct delayed_work pspoll_work;
400
401 /* counter for ps-poll delivery failures */
402 int ps_poll_failures;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300403
Juuso Oikarinen19ad0712009-11-02 20:22:11 +0200404 /* retry counter for PSM entries */
405 u8 psm_entry_retry;
406
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300407 /* in dBm */
408 int power_level;
409
Juuso Oikarinen00236aed2010-04-09 11:07:30 +0300410 int rssi_thold;
411 int last_rssi_event;
412
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300413 struct wl1271_stats stats;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300414
Juuso Oikarinen554d7202010-05-07 11:38:59 +0300415 __le32 buffer_32;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300416 u32 buffer_cmd;
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300417 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300418
419 struct wl1271_fw_status *fw_status;
420 struct wl1271_tx_hw_res_if *tx_res_if;
Juuso Oikarinenb771eee2009-10-08 21:56:34 +0300421
422 struct ieee80211_vif *vif;
Luciano Coelhod6e19d12009-10-12 15:08:43 +0300423
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +0300424 /* Current chipset configuration */
425 struct conf_drv_settings conf;
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300426
Juuso Oikarinen7fc3a862010-03-18 12:26:32 +0200427 bool sg_enabled;
428
Juuso Oikarinen02fabb02010-08-19 04:41:15 +0200429 bool enable_11a;
430
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300431 struct list_head list;
John W. Linvilleece550d2010-07-28 16:41:06 -0400432
433 /* Most recently reported noise in dBm */
434 s8 noise;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300435};
436
437int wl1271_plt_start(struct wl1271 *wl);
438int wl1271_plt_stop(struct wl1271 *wl);
439
440#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
441
442#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
443
444#define WL1271_DEFAULT_POWER_LEVEL 0
445
Juuso Oikarinen06f7bc72010-02-22 08:38:33 +0200446#define WL1271_TX_QUEUE_LOW_WATERMARK 10
447#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300448
Juuso Oikarinen01ac17ec2009-12-11 15:41:02 +0200449/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
450 on in case is has been shut down shortly before */
Linus Torvalds008d23e2011-01-13 10:05:56 -0800451#define WL1271_PRE_POWER_ON_SLEEP 20 /* in milliseconds */
452#define WL1271_POWER_ON_SLEEP 200 /* in milliseconds */
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300453
Shahar Levie8b03a22010-10-13 16:09:39 +0200454/* Macros to handle wl1271.sta_rate_set */
455#define HW_BG_RATES_MASK 0xffff
456#define HW_HT_RATES_OFFSET 16
457
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300458#endif