blob: 95c8d91aab8dbbbb8d9d79c74ae80466328e389f [file] [log] [blame]
Dan Williamsd044af12011-03-08 09:52:49 -08001/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55#ifndef _ISCI_PROBE_ROMS_H_
56#define _ISCI_PROBE_ROMS_H_
57
58#ifdef __KERNEL__
59#include <linux/firmware.h>
60#include <linux/pci.h>
Dave Jiangbf482c62011-05-25 05:04:35 +000061#include <linux/efi.h>
Dan Williamsce2b3262011-05-08 15:49:15 -070062#include "isci.h"
Dan Williamsd044af12011-03-08 09:52:49 -080063
Dan Williamse2f8db52011-05-10 02:28:46 -070064#define SCIC_SDS_PARM_NO_SPEED 0
65
66/* generation 1 (i.e. 1.5 Gb/s) */
67#define SCIC_SDS_PARM_GEN1_SPEED 1
68
69/* generation 2 (i.e. 3.0 Gb/s) */
70#define SCIC_SDS_PARM_GEN2_SPEED 2
71
72/* generation 3 (i.e. 6.0 Gb/s) */
73#define SCIC_SDS_PARM_GEN3_SPEED 3
74#define SCIC_SDS_PARM_MAX_SPEED SCIC_SDS_PARM_GEN3_SPEED
75
76/* parameters that can be set by module parameters */
77struct scic_sds_user_parameters {
78 struct sci_phy_user_params {
79 /**
80 * This field specifies the NOTIFY (ENABLE SPIN UP) primitive
81 * insertion frequency for this phy index.
82 */
83 u32 notify_enable_spin_up_insertion_frequency;
84
85 /**
86 * This method specifies the number of transmitted DWORDs within which
87 * to transmit a single ALIGN primitive. This value applies regardless
88 * of what type of device is attached or connection state. A value of
89 * 0 indicates that no ALIGN primitives will be inserted.
90 */
91 u16 align_insertion_frequency;
92
93 /**
94 * This method specifies the number of transmitted DWORDs within which
95 * to transmit 2 ALIGN primitives. This applies for SAS connections
96 * only. A minimum value of 3 is required for this field.
97 */
98 u16 in_connection_align_insertion_frequency;
99
100 /**
101 * This field indicates the maximum speed generation to be utilized
102 * by phys in the supplied port.
103 * - A value of 1 indicates generation 1 (i.e. 1.5 Gb/s).
104 * - A value of 2 indicates generation 2 (i.e. 3.0 Gb/s).
105 * - A value of 3 indicates generation 3 (i.e. 6.0 Gb/s).
106 */
107 u8 max_speed_generation;
108
109 } phys[SCI_MAX_PHYS];
110
111 /**
112 * This field specifies the maximum number of direct attached devices
113 * that can have power supplied to them simultaneously.
114 */
115 u8 max_number_concurrent_device_spin_up;
116
117 /**
118 * This field specifies the number of seconds to allow a phy to consume
119 * power before yielding to another phy.
120 *
121 */
122 u8 phy_spin_up_delay_interval;
123
124 /**
125 * These timer values specifies how long a link will remain open with no
126 * activity in increments of a microsecond, it can be in increments of
127 * 100 microseconds if the upper most bit is set.
128 *
129 */
130 u16 stp_inactivity_timeout;
131 u16 ssp_inactivity_timeout;
132
133 /**
134 * These timer values specifies how long a link will remain open in increments
135 * of 100 microseconds.
136 *
137 */
138 u16 stp_max_occupancy_timeout;
139 u16 ssp_max_occupancy_timeout;
140
141 /**
142 * This timer value specifies how long a link will remain open with no
143 * outbound traffic in increments of a microsecond.
144 *
145 */
146 u8 no_outbound_task_timeout;
147
148};
149
150/* XXX kill this union */
151union scic_user_parameters {
152 /**
153 * This field specifies the user parameters specific to the
154 * Storage Controller Unit (SCU) Driver Standard (SDS) version
155 * 1.
156 */
157 struct scic_sds_user_parameters sds1;
158};
159
160#define SCIC_SDS_PARM_PHY_MASK_MIN 0x0
161#define SCIC_SDS_PARM_PHY_MASK_MAX 0xF
162#define MAX_CONCURRENT_DEVICE_SPIN_UP_COUNT 4
163
164struct scic_sds_oem_params;
165int scic_oem_parameters_validate(struct scic_sds_oem_params *oem);
Dan Williamsd044af12011-03-08 09:52:49 -0800166
167union scic_oem_parameters;
Dan Williamse2f8db52011-05-10 02:28:46 -0700168void scic_oem_parameters_get(struct scic_sds_controller *scic,
169 union scic_oem_parameters *oem);
Dan Williamsd044af12011-03-08 09:52:49 -0800170
Dan Williamse2f8db52011-05-10 02:28:46 -0700171struct isci_orom;
172struct isci_orom *isci_request_oprom(struct pci_dev *pdev);
173enum sci_status isci_parse_oem_parameters(union scic_oem_parameters *oem,
174 struct isci_orom *orom, int scu_index);
Dan Williamsd044af12011-03-08 09:52:49 -0800175struct isci_orom *isci_request_firmware(struct pci_dev *pdev, const struct firmware *fw);
Dave Jiang8db37aa2011-02-23 00:02:24 -0800176struct isci_orom *isci_get_efi_var(struct pci_dev *pdev);
Dan Williams3b67c1f2011-03-08 09:53:51 -0800177
178struct isci_oem_hdr {
179 u8 sig[4];
180 u8 rev_major;
181 u8 rev_minor;
182 u16 len;
183 u8 checksum;
184 u8 reserved1;
185 u16 reserved2;
186} __attribute__ ((packed));
187
Dan Williamsd044af12011-03-08 09:52:49 -0800188#else
189#define SCI_MAX_PORTS 4
190#define SCI_MAX_PHYS 4
Dave Jiangca507b92011-02-24 13:09:39 -0700191#define SCI_MAX_CONTROLLERS 2
Dan Williamsd044af12011-03-08 09:52:49 -0800192#endif
193
194#define ISCI_FW_NAME "isci/isci_firmware.bin"
195
196#define ROMSIGNATURE 0xaa55
197
Dan Williams3b67c1f2011-03-08 09:53:51 -0800198#define ISCI_OEM_SIG "$OEM"
199#define ISCI_OEM_SIG_SIZE 4
Dan Williamsd044af12011-03-08 09:52:49 -0800200#define ISCI_ROM_SIG "ISCUOEMB"
201#define ISCI_ROM_SIG_SIZE 8
202
Dave Jiangca507b92011-02-24 13:09:39 -0700203#define ISCI_EFI_VENDOR_GUID \
204 EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, \
205 0x1a, 0x04, 0xc6)
Dave Jiang2e8320f2011-03-11 14:04:43 -0800206#define ISCI_EFI_VAR_NAME "RstScuO"
Dan Williamsd044af12011-03-08 09:52:49 -0800207
Henryk Dembkowski07373a52011-02-23 16:55:11 -0800208/* Allowed PORT configuration modes APC Automatic PORT configuration mode is
209 * defined by the OEM configuration parameters providing no PHY_MASK parameters
210 * for any PORT. i.e. There are no phys assigned to any of the ports at start.
211 * MPC Manual PORT configuration mode is defined by the OEM configuration
212 * parameters providing a PHY_MASK value for any PORT. It is assumed that any
213 * PORT with no PHY_MASK is an invalid port and not all PHYs must be assigned.
214 * A PORT_PHY mask that assigns just a single PHY to a port and no other PHYs
215 * being assigned is sufficient to declare manual PORT configuration.
216 */
Dave Jiangde728b72011-03-26 17:14:07 -0700217enum scic_port_configuration_mode {
Dan Williams4eefd252011-03-25 09:58:15 -0700218 SCIC_PORT_MANUAL_CONFIGURATION_MODE = 0,
219 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE = 1
Henryk Dembkowski07373a52011-02-23 16:55:11 -0800220};
221
Dan Williamsd044af12011-03-08 09:52:49 -0800222struct sci_bios_oem_param_block_hdr {
223 uint8_t signature[ISCI_ROM_SIG_SIZE];
224 uint16_t total_block_length;
225 uint8_t hdr_length;
226 uint8_t version;
227 uint8_t preboot_source;
228 uint8_t num_elements;
Dan Williamsf22be5d2011-04-19 15:29:25 -0700229 uint16_t element_length;
Dan Williamsd044af12011-03-08 09:52:49 -0800230 uint8_t reserved[8];
231} __attribute__ ((packed));
232
233struct scic_sds_oem_params {
234 struct {
235 uint8_t mode_type;
236 uint8_t max_concurrent_dev_spin_up;
237 uint8_t do_enable_ssc;
238 uint8_t reserved;
239 } controller;
240
241 struct {
242 uint8_t phy_mask;
243 } ports[SCI_MAX_PORTS];
244
245 struct sci_phy_oem_params {
246 struct {
247 uint32_t high;
248 uint32_t low;
249 } sas_address;
250
251 uint32_t afe_tx_amp_control0;
252 uint32_t afe_tx_amp_control1;
253 uint32_t afe_tx_amp_control2;
254 uint32_t afe_tx_amp_control3;
255 } phys[SCI_MAX_PHYS];
256} __attribute__ ((packed));
257
Dan Williamse2f8db52011-05-10 02:28:46 -0700258/* XXX kill this union */
259union scic_oem_parameters {
260 /**
261 * This field specifies the OEM parameters specific to the
262 * Storage Controller Unit (SCU) Driver Standard (SDS) version
263 * 1.
264 */
265 struct scic_sds_oem_params sds1;
266};
267
Dan Williamsd044af12011-03-08 09:52:49 -0800268struct isci_orom {
269 struct sci_bios_oem_param_block_hdr hdr;
Dave Jiangca507b92011-02-24 13:09:39 -0700270 struct scic_sds_oem_params ctrl[SCI_MAX_CONTROLLERS];
Dan Williamsd044af12011-03-08 09:52:49 -0800271} __attribute__ ((packed));
272
273#endif