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Nicolas Ferre49fe2ba2011-10-10 18:29:24 +02001/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
Nicolas Ferre21f81872012-02-11 15:41:40 +010025 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010030 tcb0 = &tcb0;
31 tcb1 = &tcb1;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020032 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
Ludovic Desrochesdcce6ce2012-04-02 20:44:20 +020039 memory {
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020040 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020056 #interrupt-cells = <3>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020057 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020059 reg = <0xfffff000 0x200>;
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080060 atmel,external-irqs = <31>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020061 };
62
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080063 ramc0: ramc@ffffe400 {
64 compatible = "atmel,at91sam9g45-ddramc";
65 reg = <0xffffe400 0x200
66 0xffffe600 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080069 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080074 rstc@fffffd00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffd00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010079 pit: timer@fffffd30 {
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020082 interrupts = <1 4 7>;
Jean-Christophe PLAGNIOL-VILLARD23fa6482012-02-27 11:19:34 +010083 };
84
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010085
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +080086 shdwc@fffffd10 {
87 compatible = "atmel,at91sam9rl-shdwc";
88 reg = <0xfffffd10 0x10>;
89 };
90
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010091 tcb0: timer@fff7c000 {
92 compatible = "atmel,at91rm9200-tcb";
93 reg = <0xfff7c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020094 interrupts = <18 4 0>;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +010095 };
96
97 tcb1: timer@fffd4000 {
98 compatible = "atmel,at91rm9200-tcb";
99 reg = <0xfffd4000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200100 interrupts = <18 4 0>;
Nicolas Ferre3a61a5d2012-01-19 10:13:40 +0100101 };
102
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200103 dma: dma-controller@ffffec00 {
104 compatible = "atmel,at91sam9g45-dma";
105 reg = <0xffffec00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200106 interrupts = <21 4 0>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200107 };
108
Nicolas Ferre21f81872012-02-11 15:41:40 +0100109 pioA: gpio@fffff200 {
110 compatible = "atmel,at91rm9200-gpio";
111 reg = <0xfffff200 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200112 interrupts = <2 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100113 #gpio-cells = <2>;
114 gpio-controller;
115 interrupt-controller;
Jean-Christophe PLAGNIOL-VILLARD51ac51a2012-09-13 12:40:26 +0200116 #interrupt-cells = <2>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100117 };
118
119 pioB: gpio@fffff400 {
120 compatible = "atmel,at91rm9200-gpio";
121 reg = <0xfffff400 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200122 interrupts = <3 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100123 #gpio-cells = <2>;
124 gpio-controller;
125 interrupt-controller;
Jean-Christophe PLAGNIOL-VILLARD51ac51a2012-09-13 12:40:26 +0200126 #interrupt-cells = <2>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100127 };
128
129 pioC: gpio@fffff600 {
130 compatible = "atmel,at91rm9200-gpio";
131 reg = <0xfffff600 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200132 interrupts = <4 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100133 #gpio-cells = <2>;
134 gpio-controller;
135 interrupt-controller;
Jean-Christophe PLAGNIOL-VILLARD51ac51a2012-09-13 12:40:26 +0200136 #interrupt-cells = <2>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100137 };
138
139 pioD: gpio@fffff800 {
140 compatible = "atmel,at91rm9200-gpio";
141 reg = <0xfffff800 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200142 interrupts = <5 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100143 #gpio-cells = <2>;
144 gpio-controller;
145 interrupt-controller;
Jean-Christophe PLAGNIOL-VILLARD51ac51a2012-09-13 12:40:26 +0200146 #interrupt-cells = <2>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100147 };
148
149 pioE: gpio@fffffa00 {
150 compatible = "atmel,at91rm9200-gpio";
151 reg = <0xfffffa00 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200152 interrupts = <5 4 1>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100153 #gpio-cells = <2>;
154 gpio-controller;
155 interrupt-controller;
Jean-Christophe PLAGNIOL-VILLARD51ac51a2012-09-13 12:40:26 +0200156 #interrupt-cells = <2>;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100157 };
158
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200159 dbgu: serial@ffffee00 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xffffee00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200162 interrupts = <1 4 7>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200163 status = "disabled";
164 };
165
166 usart0: serial@fff8c000 {
167 compatible = "atmel,at91sam9260-usart";
168 reg = <0xfff8c000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200169 interrupts = <7 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200170 atmel,use-dma-rx;
171 atmel,use-dma-tx;
172 status = "disabled";
173 };
174
175 usart1: serial@fff90000 {
176 compatible = "atmel,at91sam9260-usart";
177 reg = <0xfff90000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200178 interrupts = <8 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200179 atmel,use-dma-rx;
180 atmel,use-dma-tx;
181 status = "disabled";
182 };
183
184 usart2: serial@fff94000 {
185 compatible = "atmel,at91sam9260-usart";
186 reg = <0xfff94000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200187 interrupts = <9 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200188 atmel,use-dma-rx;
189 atmel,use-dma-tx;
190 status = "disabled";
191 };
192
193 usart3: serial@fff98000 {
194 compatible = "atmel,at91sam9260-usart";
195 reg = <0xfff98000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200196 interrupts = <10 4 5>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200197 atmel,use-dma-rx;
198 atmel,use-dma-tx;
199 status = "disabled";
200 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100201
202 macb0: ethernet@fffbc000 {
203 compatible = "cdns,at32ap7000-macb", "cdns,macb";
204 reg = <0xfffbc000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200205 interrupts = <25 4 3>;
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +0100206 status = "disabled";
207 };
Maxime Ripard93b298b2012-05-11 15:35:38 +0200208
209 adc0: adc@fffb0000 {
210 compatible = "atmel,at91sam9260-adc";
211 reg = <0xfffb0000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200212 interrupts = <20 4 0>;
Maxime Ripard93b298b2012-05-11 15:35:38 +0200213 atmel,adc-use-external-triggers;
214 atmel,adc-channels-used = <0xff>;
215 atmel,adc-vref = <3300>;
216 atmel,adc-num-channels = <8>;
217 atmel,adc-startup-time = <40>;
218 atmel,adc-channel-base = <0x30>;
219 atmel,adc-drdy-mask = <0x10000>;
220 atmel,adc-status-register = <0x1c>;
221 atmel,adc-trigger-register = <0x08>;
222
223 trigger@0 {
224 trigger-name = "external-rising";
225 trigger-value = <0x1>;
226 trigger-external;
227 };
228 trigger@1 {
229 trigger-name = "external-falling";
230 trigger-value = <0x2>;
231 trigger-external;
232 };
233
234 trigger@2 {
235 trigger-name = "external-any";
236 trigger-value = <0x3>;
237 trigger-external;
238 };
239
240 trigger@3 {
241 trigger-name = "continuous";
242 trigger-value = <0x6>;
243 };
244 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200245 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800246
247 nand0: nand@40000000 {
248 compatible = "atmel,at91rm9200-nand";
249 #address-cells = <1>;
250 #size-cells = <1>;
251 reg = <0x40000000 0x10000000
252 0xffffe200 0x200
253 >;
254 atmel,nand-addr-offset = <21>;
255 atmel,nand-cmd-offset = <22>;
256 gpios = <&pioC 8 0
257 &pioC 14 0
258 0
259 >;
260 status = "disabled";
261 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800262
263 usb0: ohci@00700000 {
264 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
265 reg = <0x00700000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200266 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800267 status = "disabled";
268 };
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800269
270 usb1: ehci@00800000 {
271 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
272 reg = <0x00800000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200273 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800274 status = "disabled";
275 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200276 };
Jean-Christophe PLAGNIOL-VILLARD8f24bda2012-02-05 18:32:37 +0800277
278 i2c@0 {
279 compatible = "i2c-gpio";
280 gpios = <&pioA 20 0 /* sda */
281 &pioA 21 0 /* scl */
282 >;
283 i2c-gpio,sda-open-drain;
284 i2c-gpio,scl-open-drain;
285 i2c-gpio,delay-us = <5>; /* ~100 kHz */
286 #address-cells = <1>;
287 #size-cells = <0>;
288 status = "disabled";
289 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200290};