| Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 1 | /dts-v1/; | 
|  | 2 |  | 
|  | 3 | /include/ "tegra20.dtsi" | 
|  | 4 |  | 
|  | 5 | / { | 
|  | 6 | model = "NVIDIA Tegra2 Whistler evaluation board"; | 
|  | 7 | compatible = "nvidia,whistler", "nvidia,tegra20"; | 
|  | 8 |  | 
|  | 9 | memory { | 
|  | 10 | reg = <0x00000000 0x20000000>; | 
|  | 11 | }; | 
|  | 12 |  | 
| Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 13 | host1x { | 
|  | 14 | hdmi { | 
|  | 15 | status = "okay"; | 
|  | 16 |  | 
|  | 17 | vdd-supply = <&hdmi_vdd_reg>; | 
|  | 18 | pll-supply = <&hdmi_pll_reg>; | 
|  | 19 |  | 
|  | 20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | 
|  | 21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | 
|  | 22 | }; | 
|  | 23 | }; | 
|  | 24 |  | 
| Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 25 | pinmux { | 
|  | 26 | pinctrl-names = "default"; | 
|  | 27 | pinctrl-0 = <&state_default>; | 
|  | 28 |  | 
|  | 29 | state_default: pinmux { | 
|  | 30 | ata { | 
|  | 31 | nvidia,pins = "ata", "atb", "ate", "gma", "gmb", | 
|  | 32 | "gmc", "gmd", "gpu"; | 
|  | 33 | nvidia,function = "gmi"; | 
|  | 34 | }; | 
|  | 35 | atc { | 
|  | 36 | nvidia,pins = "atc", "atd"; | 
|  | 37 | nvidia,function = "sdio4"; | 
|  | 38 | }; | 
|  | 39 | cdev1 { | 
|  | 40 | nvidia,pins = "cdev1"; | 
|  | 41 | nvidia,function = "plla_out"; | 
|  | 42 | }; | 
|  | 43 | cdev2 { | 
|  | 44 | nvidia,pins = "cdev2"; | 
|  | 45 | nvidia,function = "osc"; | 
|  | 46 | }; | 
|  | 47 | crtp { | 
|  | 48 | nvidia,pins = "crtp"; | 
|  | 49 | nvidia,function = "crt"; | 
|  | 50 | }; | 
|  | 51 | csus { | 
|  | 52 | nvidia,pins = "csus"; | 
|  | 53 | nvidia,function = "vi_sensor_clk"; | 
|  | 54 | }; | 
|  | 55 | dap1 { | 
|  | 56 | nvidia,pins = "dap1"; | 
|  | 57 | nvidia,function = "dap1"; | 
|  | 58 | }; | 
|  | 59 | dap2 { | 
|  | 60 | nvidia,pins = "dap2"; | 
|  | 61 | nvidia,function = "dap2"; | 
|  | 62 | }; | 
|  | 63 | dap3 { | 
|  | 64 | nvidia,pins = "dap3"; | 
|  | 65 | nvidia,function = "dap3"; | 
|  | 66 | }; | 
|  | 67 | dap4 { | 
|  | 68 | nvidia,pins = "dap4"; | 
|  | 69 | nvidia,function = "dap4"; | 
|  | 70 | }; | 
|  | 71 | ddc { | 
|  | 72 | nvidia,pins = "ddc"; | 
|  | 73 | nvidia,function = "i2c2"; | 
|  | 74 | }; | 
|  | 75 | dta { | 
|  | 76 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; | 
|  | 77 | nvidia,function = "vi"; | 
|  | 78 | }; | 
|  | 79 | dte { | 
|  | 80 | nvidia,pins = "dte"; | 
|  | 81 | nvidia,function = "rsvd1"; | 
|  | 82 | }; | 
|  | 83 | dtf { | 
|  | 84 | nvidia,pins = "dtf"; | 
|  | 85 | nvidia,function = "i2c3"; | 
|  | 86 | }; | 
|  | 87 | gme { | 
|  | 88 | nvidia,pins = "gme"; | 
|  | 89 | nvidia,function = "dap5"; | 
|  | 90 | }; | 
|  | 91 | gpu7 { | 
|  | 92 | nvidia,pins = "gpu7"; | 
|  | 93 | nvidia,function = "rtck"; | 
|  | 94 | }; | 
|  | 95 | gpv { | 
|  | 96 | nvidia,pins = "gpv"; | 
|  | 97 | nvidia,function = "pcie"; | 
|  | 98 | }; | 
|  | 99 | hdint { | 
|  | 100 | nvidia,pins = "hdint", "pta"; | 
|  | 101 | nvidia,function = "hdmi"; | 
|  | 102 | }; | 
|  | 103 | i2cp { | 
|  | 104 | nvidia,pins = "i2cp"; | 
|  | 105 | nvidia,function = "i2cp"; | 
|  | 106 | }; | 
|  | 107 | irrx { | 
|  | 108 | nvidia,pins = "irrx", "irtx"; | 
|  | 109 | nvidia,function = "uartb"; | 
|  | 110 | }; | 
|  | 111 | kbca { | 
|  | 112 | nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; | 
|  | 113 | nvidia,function = "kbc"; | 
|  | 114 | }; | 
|  | 115 | kbcb { | 
|  | 116 | nvidia,pins = "kbcb", "kbcd"; | 
|  | 117 | nvidia,function = "sdio2"; | 
|  | 118 | }; | 
|  | 119 | lcsn { | 
|  | 120 | nvidia,pins = "lcsn", "lsck", "lsda", "lsdi", | 
|  | 121 | "spia", "spib", "spic"; | 
|  | 122 | nvidia,function = "spi3"; | 
|  | 123 | }; | 
|  | 124 | ld0 { | 
|  | 125 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | 
|  | 126 | "ld5", "ld6", "ld7", "ld8", "ld9", | 
|  | 127 | "ld10", "ld11", "ld12", "ld13", "ld14", | 
|  | 128 | "ld15", "ld16", "ld17", "ldc", "ldi", | 
|  | 129 | "lhp0", "lhp1", "lhp2", "lhs", "lm0", | 
|  | 130 | "lm1", "lpp", "lpw0", "lpw1", "lpw2", | 
|  | 131 | "lsc0", "lsc1", "lspi", "lvp0", "lvp1", | 
|  | 132 | "lvs"; | 
|  | 133 | nvidia,function = "displaya"; | 
|  | 134 | }; | 
|  | 135 | owc { | 
|  | 136 | nvidia,pins = "owc", "uac"; | 
|  | 137 | nvidia,function = "owr"; | 
|  | 138 | }; | 
|  | 139 | pmc { | 
|  | 140 | nvidia,pins = "pmc"; | 
|  | 141 | nvidia,function = "pwr_on"; | 
|  | 142 | }; | 
|  | 143 | rm { | 
|  | 144 | nvidia,pins = "rm"; | 
|  | 145 | nvidia,function = "i2c1"; | 
|  | 146 | }; | 
|  | 147 | sdb { | 
|  | 148 | nvidia,pins = "sdb", "sdc", "sdd", "slxa", | 
|  | 149 | "slxc", "slxd", "slxk"; | 
|  | 150 | nvidia,function = "sdio3"; | 
|  | 151 | }; | 
|  | 152 | sdio1 { | 
|  | 153 | nvidia,pins = "sdio1"; | 
|  | 154 | nvidia,function = "sdio1"; | 
|  | 155 | }; | 
|  | 156 | spdi { | 
|  | 157 | nvidia,pins = "spdi", "spdo"; | 
|  | 158 | nvidia,function = "rsvd2"; | 
|  | 159 | }; | 
|  | 160 | spid { | 
|  | 161 | nvidia,pins = "spid", "spie", "spig", "spih"; | 
|  | 162 | nvidia,function = "spi2_alt"; | 
|  | 163 | }; | 
|  | 164 | spif { | 
|  | 165 | nvidia,pins = "spif"; | 
|  | 166 | nvidia,function = "spi2"; | 
|  | 167 | }; | 
|  | 168 | uaa { | 
|  | 169 | nvidia,pins = "uaa", "uab"; | 
|  | 170 | nvidia,function = "uarta"; | 
|  | 171 | }; | 
|  | 172 | uad { | 
|  | 173 | nvidia,pins = "uad"; | 
|  | 174 | nvidia,function = "irda"; | 
|  | 175 | }; | 
|  | 176 | uca { | 
|  | 177 | nvidia,pins = "uca", "ucb"; | 
|  | 178 | nvidia,function = "uartc"; | 
|  | 179 | }; | 
|  | 180 | uda { | 
|  | 181 | nvidia,pins = "uda"; | 
|  | 182 | nvidia,function = "spi1"; | 
|  | 183 | }; | 
|  | 184 | conf_ata { | 
|  | 185 | nvidia,pins = "ata", "atb", "atc", "ddc", "gma", | 
|  | 186 | "gmb", "gmc", "gmd", "irrx", "irtx", | 
|  | 187 | "kbca", "kbcb", "kbcc", "kbcd", "kbce", | 
|  | 188 | "kbcf", "sdc", "sdd", "spie", "spig", | 
|  | 189 | "spih", "uaa", "uab", "uad", "uca", | 
|  | 190 | "ucb"; | 
|  | 191 | nvidia,pull = <2>; | 
|  | 192 | nvidia,tristate = <0>; | 
|  | 193 | }; | 
|  | 194 | conf_atd { | 
|  | 195 | nvidia,pins = "atd", "ate", "cdev1", "csus", | 
|  | 196 | "dap1", "dap2", "dap3", "dap4", "dte", | 
|  | 197 | "dtf", "gpu", "gpu7", "gpv", "i2cp", | 
|  | 198 | "rm", "sdio1", "slxa", "slxc", "slxd", | 
|  | 199 | "slxk", "spdi", "spdo", "uac", "uda"; | 
|  | 200 | nvidia,pull = <0>; | 
|  | 201 | nvidia,tristate = <0>; | 
|  | 202 | }; | 
|  | 203 | conf_cdev2 { | 
|  | 204 | nvidia,pins = "cdev2", "spia", "spib"; | 
|  | 205 | nvidia,pull = <1>; | 
|  | 206 | nvidia,tristate = <1>; | 
|  | 207 | }; | 
|  | 208 | conf_ck32 { | 
|  | 209 | nvidia,pins = "ck32", "ddrc", "lc", "pmca", | 
|  | 210 | "pmcb", "pmcc", "pmcd", "xm2c", | 
|  | 211 | "xm2d"; | 
|  | 212 | nvidia,pull = <0>; | 
|  | 213 | }; | 
|  | 214 | conf_crtp { | 
|  | 215 | nvidia,pins = "crtp"; | 
|  | 216 | nvidia,pull = <0>; | 
|  | 217 | nvidia,tristate = <1>; | 
|  | 218 | }; | 
|  | 219 | conf_dta { | 
|  | 220 | nvidia,pins = "dta", "dtb", "dtc", "dtd", | 
|  | 221 | "spid", "spif"; | 
|  | 222 | nvidia,pull = <1>; | 
|  | 223 | nvidia,tristate = <0>; | 
|  | 224 | }; | 
|  | 225 | conf_gme { | 
|  | 226 | nvidia,pins = "gme", "owc", "pta", "spic"; | 
|  | 227 | nvidia,pull = <2>; | 
|  | 228 | nvidia,tristate = <1>; | 
|  | 229 | }; | 
|  | 230 | conf_ld17_0 { | 
|  | 231 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | 
|  | 232 | "ld23_22"; | 
|  | 233 | nvidia,pull = <1>; | 
|  | 234 | }; | 
|  | 235 | conf_ls { | 
|  | 236 | nvidia,pins = "ls", "pmce"; | 
|  | 237 | nvidia,pull = <2>; | 
|  | 238 | }; | 
|  | 239 | drive_dap1 { | 
|  | 240 | nvidia,pins = "drive_dap1"; | 
|  | 241 | nvidia,high-speed-mode = <0>; | 
|  | 242 | nvidia,schmitt = <1>; | 
|  | 243 | nvidia,low-power-mode = <0>; | 
|  | 244 | nvidia,pull-down-strength = <0>; | 
|  | 245 | nvidia,pull-up-strength = <0>; | 
|  | 246 | nvidia,slew-rate-rising = <0>; | 
|  | 247 | nvidia,slew-rate-falling = <0>; | 
|  | 248 | }; | 
|  | 249 | }; | 
|  | 250 | }; | 
|  | 251 |  | 
|  | 252 | i2s@70002800 { | 
|  | 253 | status = "okay"; | 
|  | 254 | }; | 
|  | 255 |  | 
|  | 256 | serial@70006000 { | 
|  | 257 | status = "okay"; | 
|  | 258 | clock-frequency = <216000000>; | 
|  | 259 | }; | 
|  | 260 |  | 
| Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 261 | hdmi_ddc: i2c@7000c400 { | 
|  | 262 | status = "okay"; | 
|  | 263 | clock-frequency = <100000>; | 
|  | 264 | }; | 
|  | 265 |  | 
| Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 266 | i2c@7000d000 { | 
|  | 267 | status = "okay"; | 
|  | 268 | clock-frequency = <100000>; | 
|  | 269 |  | 
|  | 270 | codec: codec@1a { | 
|  | 271 | compatible = "wlf,wm8753"; | 
|  | 272 | reg = <0x1a>; | 
|  | 273 | }; | 
|  | 274 |  | 
|  | 275 | tca6416: gpio@20 { | 
|  | 276 | compatible = "ti,tca6416"; | 
|  | 277 | reg = <0x20>; | 
|  | 278 | gpio-controller; | 
|  | 279 | #gpio-cells = <2>; | 
|  | 280 | }; | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 281 |  | 
|  | 282 | max8907@3c { | 
|  | 283 | compatible = "maxim,max8907"; | 
|  | 284 | reg = <0x3c>; | 
|  | 285 | interrupts = <0 86 0x4>; | 
|  | 286 |  | 
| Stephen Warren | b37ed4a | 2012-09-11 13:13:05 -0600 | [diff] [blame] | 287 | maxim,system-power-controller; | 
|  | 288 |  | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 289 | mbatt-supply = <&usb0_vbus_reg>; | 
|  | 290 | in-v1-supply = <&mbatt_reg>; | 
|  | 291 | in-v2-supply = <&mbatt_reg>; | 
|  | 292 | in-v3-supply = <&mbatt_reg>; | 
|  | 293 | in1-supply = <&mbatt_reg>; | 
|  | 294 | in2-supply = <&nvvdd_sv3_reg>; | 
|  | 295 | in3-supply = <&mbatt_reg>; | 
|  | 296 | in4-supply = <&mbatt_reg>; | 
|  | 297 | in5-supply = <&mbatt_reg>; | 
|  | 298 | in6-supply = <&mbatt_reg>; | 
|  | 299 | in7-supply = <&mbatt_reg>; | 
|  | 300 | in8-supply = <&mbatt_reg>; | 
|  | 301 | in9-supply = <&mbatt_reg>; | 
|  | 302 | in10-supply = <&mbatt_reg>; | 
|  | 303 | in11-supply = <&mbatt_reg>; | 
|  | 304 | in12-supply = <&mbatt_reg>; | 
|  | 305 | in13-supply = <&mbatt_reg>; | 
|  | 306 | in14-supply = <&mbatt_reg>; | 
|  | 307 | in15-supply = <&mbatt_reg>; | 
|  | 308 | in16-supply = <&mbatt_reg>; | 
|  | 309 | in17-supply = <&nvvdd_sv3_reg>; | 
|  | 310 | in18-supply = <&nvvdd_sv3_reg>; | 
|  | 311 | in19-supply = <&mbatt_reg>; | 
|  | 312 | in20-supply = <&mbatt_reg>; | 
|  | 313 |  | 
|  | 314 | regulators { | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 315 | mbatt_reg: mbatt { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 316 | regulator-name = "vbat_pmu"; | 
|  | 317 | regulator-always-on; | 
|  | 318 | }; | 
|  | 319 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 320 | sd1 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 321 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; | 
|  | 322 | regulator-min-microvolt = <1000000>; | 
|  | 323 | regulator-max-microvolt = <1000000>; | 
|  | 324 | regulator-always-on; | 
|  | 325 | }; | 
|  | 326 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 327 | sd2 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 328 | regulator-name = "nvvdd_sv2,vdd_core"; | 
|  | 329 | regulator-min-microvolt = <1200000>; | 
|  | 330 | regulator-max-microvolt = <1200000>; | 
|  | 331 | regulator-always-on; | 
|  | 332 | }; | 
|  | 333 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 334 | nvvdd_sv3_reg: sd3 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 335 | regulator-name = "nvvdd_sv3"; | 
|  | 336 | regulator-min-microvolt = <1800000>; | 
|  | 337 | regulator-max-microvolt = <1800000>; | 
|  | 338 | regulator-always-on; | 
|  | 339 | }; | 
|  | 340 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 341 | ldo1 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 342 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; | 
|  | 343 | regulator-min-microvolt = <3300000>; | 
|  | 344 | regulator-max-microvolt = <3300000>; | 
|  | 345 | regulator-always-on; | 
|  | 346 | }; | 
|  | 347 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 348 | ldo2 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 349 | regulator-name = "nvvdd_ldo2,avdd_pll*"; | 
|  | 350 | regulator-min-microvolt = <1100000>; | 
|  | 351 | regulator-max-microvolt = <1100000>; | 
|  | 352 | regulator-always-on; | 
|  | 353 | }; | 
|  | 354 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 355 | ldo3 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 356 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; | 
|  | 357 | regulator-min-microvolt = <1800000>; | 
|  | 358 | regulator-max-microvolt = <1800000>; | 
|  | 359 | regulator-always-on; | 
|  | 360 | }; | 
|  | 361 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 362 | ldo4 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 363 | regulator-name = "nvvdd_ldo4,avdd_usb*"; | 
|  | 364 | regulator-min-microvolt = <3300000>; | 
|  | 365 | regulator-max-microvolt = <3300000>; | 
|  | 366 | regulator-always-on; | 
|  | 367 | }; | 
|  | 368 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 369 | ldo5 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 370 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; | 
|  | 371 | regulator-min-microvolt = <2800000>; | 
|  | 372 | regulator-max-microvolt = <2800000>; | 
|  | 373 | regulator-always-on; | 
|  | 374 | }; | 
|  | 375 |  | 
| Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 376 | hdmi_pll_reg: ldo6 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 377 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; | 
|  | 378 | regulator-min-microvolt = <1800000>; | 
|  | 379 | regulator-max-microvolt = <1800000>; | 
|  | 380 | }; | 
|  | 381 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 382 | ldo7 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 383 | regulator-name = "nvvdd_ldo7,avddio_audio"; | 
|  | 384 | regulator-min-microvolt = <2800000>; | 
|  | 385 | regulator-max-microvolt = <2800000>; | 
|  | 386 | regulator-always-on; | 
|  | 387 | }; | 
|  | 388 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 389 | ldo8 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 390 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; | 
|  | 391 | regulator-min-microvolt = <3000000>; | 
|  | 392 | regulator-max-microvolt = <3000000>; | 
|  | 393 | }; | 
|  | 394 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 395 | ldo9 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 396 | regulator-name = "nvvdd_ldo9,avdd_cam*"; | 
|  | 397 | regulator-min-microvolt = <2800000>; | 
|  | 398 | regulator-max-microvolt = <2800000>; | 
|  | 399 | }; | 
|  | 400 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 401 | ldo10 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 402 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; | 
|  | 403 | regulator-min-microvolt = <3000000>; | 
|  | 404 | regulator-max-microvolt = <3000000>; | 
|  | 405 | regulator-always-on; | 
|  | 406 | }; | 
|  | 407 |  | 
| Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 408 | hdmi_vdd_reg: ldo11 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 409 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; | 
|  | 410 | regulator-min-microvolt = <3300000>; | 
|  | 411 | regulator-max-microvolt = <3300000>; | 
|  | 412 | }; | 
|  | 413 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 414 | ldo12 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 415 | regulator-name = "nvvdd_ldo12,vddio_sdio"; | 
|  | 416 | regulator-min-microvolt = <2800000>; | 
|  | 417 | regulator-max-microvolt = <2800000>; | 
|  | 418 | regulator-always-on; | 
|  | 419 | }; | 
|  | 420 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 421 | ldo13 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 422 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; | 
|  | 423 | regulator-min-microvolt = <2800000>; | 
|  | 424 | regulator-max-microvolt = <2800000>; | 
|  | 425 | }; | 
|  | 426 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 427 | ldo14 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 428 | regulator-name = "nvvdd_ldo14,avdd_vdac"; | 
|  | 429 | regulator-min-microvolt = <2800000>; | 
|  | 430 | regulator-max-microvolt = <2800000>; | 
|  | 431 | }; | 
|  | 432 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 433 | ldo15 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 434 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; | 
|  | 435 | regulator-min-microvolt = <3300000>; | 
|  | 436 | regulator-max-microvolt = <3300000>; | 
|  | 437 | }; | 
|  | 438 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 439 | ldo16 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 440 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; | 
|  | 441 | regulator-min-microvolt = <1300000>; | 
|  | 442 | regulator-max-microvolt = <1300000>; | 
|  | 443 | }; | 
|  | 444 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 445 | ldo17 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 446 | regulator-name = "nvvdd_ldo17,vddio_mipi"; | 
|  | 447 | regulator-min-microvolt = <1200000>; | 
|  | 448 | regulator-max-microvolt = <1200000>; | 
|  | 449 | }; | 
|  | 450 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 451 | ldo18 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 452 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; | 
|  | 453 | regulator-min-microvolt = <1800000>; | 
|  | 454 | regulator-max-microvolt = <1800000>; | 
|  | 455 | }; | 
|  | 456 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 457 | ldo19 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 458 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; | 
|  | 459 | regulator-min-microvolt = <2800000>; | 
|  | 460 | regulator-max-microvolt = <2800000>; | 
|  | 461 | }; | 
|  | 462 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 463 | ldo20 { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 464 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; | 
|  | 465 | regulator-min-microvolt = <1200000>; | 
|  | 466 | regulator-max-microvolt = <1200000>; | 
|  | 467 | regulator-always-on; | 
|  | 468 | }; | 
|  | 469 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 470 | out5v { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 471 | regulator-name = "usb0_vbus_reg"; | 
|  | 472 | }; | 
|  | 473 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 474 | out33v { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 475 | regulator-name = "pmu_out3v3"; | 
|  | 476 | }; | 
|  | 477 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 478 | bbat { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 479 | regulator-name = "pmu_bbat"; | 
|  | 480 | regulator-min-microvolt = <2400000>; | 
|  | 481 | regulator-max-microvolt = <2400000>; | 
|  | 482 | regulator-always-on; | 
|  | 483 | }; | 
|  | 484 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 485 | sdby { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 486 | regulator-name = "vdd_aon"; | 
|  | 487 | regulator-always-on; | 
|  | 488 | }; | 
|  | 489 |  | 
| Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 490 | vrtc { | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 491 | regulator-name = "vrtc,pmu_vccadc"; | 
|  | 492 | regulator-always-on; | 
|  | 493 | }; | 
|  | 494 | }; | 
|  | 495 | }; | 
|  | 496 | }; | 
|  | 497 |  | 
|  | 498 | pmc { | 
|  | 499 | nvidia,invert-interrupt; | 
| Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 500 | }; | 
|  | 501 |  | 
|  | 502 | usb@c5000000 { | 
|  | 503 | status = "okay"; | 
|  | 504 | nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */ | 
|  | 505 | }; | 
|  | 506 |  | 
|  | 507 | usb@c5008000 { | 
|  | 508 | status = "okay"; | 
|  | 509 | nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */ | 
|  | 510 | }; | 
|  | 511 |  | 
|  | 512 | sdhci@c8000400 { | 
|  | 513 | status = "okay"; | 
|  | 514 | wp-gpios = <&gpio 173 0>; /* gpio PV5 */ | 
|  | 515 | bus-width = <8>; | 
|  | 516 | }; | 
|  | 517 |  | 
|  | 518 | sdhci@c8000600 { | 
|  | 519 | status = "okay"; | 
|  | 520 | bus-width = <8>; | 
|  | 521 | }; | 
|  | 522 |  | 
| Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 523 | regulators { | 
|  | 524 | compatible = "simple-bus"; | 
|  | 525 | #address-cells = <1>; | 
|  | 526 | #size-cells = <0>; | 
|  | 527 |  | 
|  | 528 | usb0_vbus_reg: regulator { | 
|  | 529 | compatible = "regulator-fixed"; | 
|  | 530 | reg = <0>; | 
|  | 531 | regulator-name = "usb0_vbus"; | 
|  | 532 | regulator-min-microvolt = <5000000>; | 
|  | 533 | regulator-max-microvolt = <5000000>; | 
|  | 534 | regulator-always-on; | 
|  | 535 | }; | 
|  | 536 | }; | 
|  | 537 |  | 
| Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 538 | sound { | 
|  | 539 | compatible = "nvidia,tegra-audio-wm8753-whistler", | 
|  | 540 | "nvidia,tegra-audio-wm8753"; | 
|  | 541 | nvidia,model = "NVIDIA Tegra Whistler"; | 
|  | 542 |  | 
|  | 543 | nvidia,audio-routing = | 
|  | 544 | "Headphone Jack", "LOUT1", | 
|  | 545 | "Headphone Jack", "ROUT1", | 
|  | 546 | "MIC2", "Mic Jack", | 
|  | 547 | "MIC2N", "Mic Jack"; | 
|  | 548 |  | 
|  | 549 | nvidia,i2s-controller = <&tegra_i2s1>; | 
|  | 550 | nvidia,audio-codec = <&codec>; | 
|  | 551 | }; | 
|  | 552 | }; |