| Russell King | 080fc66 | 2012-08-13 11:44:13 +0100 | [diff] [blame] | 1 | /* | 
 | 2 |  *  linux/arch/arm/lib/io-writesw-armv3.S | 
 | 3 |  * | 
 | 4 |  *  Copyright (C) 1995-2000 Russell King | 
 | 5 |  * | 
 | 6 |  * This program is free software; you can redistribute it and/or modify | 
 | 7 |  * it under the terms of the GNU General Public License version 2 as | 
 | 8 |  * published by the Free Software Foundation. | 
 | 9 |  */ | 
 | 10 | #include <linux/linkage.h> | 
 | 11 | #include <asm/assembler.h> | 
 | 12 |  | 
 | 13 | .Loutsw_bad_alignment: | 
 | 14 | 		adr	r0, .Loutsw_bad_align_msg | 
 | 15 | 		mov	r2, lr | 
 | 16 | 		b	panic | 
 | 17 | .Loutsw_bad_align_msg: | 
 | 18 | 		.asciz	"outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n" | 
 | 19 | 		.align | 
 | 20 |  | 
 | 21 | .Loutsw_align:	tst	r1, #1 | 
 | 22 | 		bne	.Loutsw_bad_alignment | 
 | 23 |  | 
 | 24 | 		add	r1, r1, #2 | 
 | 25 |  | 
 | 26 | 		ldr	r3, [r1, #-4] | 
 | 27 | 		mov	r3, r3, lsr #16 | 
 | 28 | 		orr	r3, r3, r3, lsl #16 | 
 | 29 | 		str	r3, [r0] | 
 | 30 | 		subs	r2, r2, #1 | 
 | 31 | 		moveq	pc, lr | 
 | 32 |  | 
 | 33 | ENTRY(__raw_writesw) | 
 | 34 | 		teq	r2, #0		@ do we have to check for the zero len? | 
 | 35 | 		moveq	pc, lr | 
 | 36 | 		tst	r1, #3 | 
 | 37 | 		bne	.Loutsw_align | 
 | 38 |  | 
 | 39 | 		stmfd	sp!, {r4, r5, r6, lr} | 
 | 40 |  | 
 | 41 | 		subs	r2, r2, #8 | 
 | 42 | 		bmi	.Lno_outsw_8 | 
 | 43 |  | 
 | 44 | .Loutsw_8_lp:	ldmia	r1!, {r3, r4, r5, r6} | 
 | 45 |  | 
 | 46 | 		mov	ip, r3, lsl #16 | 
 | 47 | 		orr	ip, ip, ip, lsr #16 | 
 | 48 | 		str	ip, [r0] | 
 | 49 |  | 
 | 50 | 		mov	ip, r3, lsr #16 | 
 | 51 | 		orr	ip, ip, ip, lsl #16 | 
 | 52 | 		str	ip, [r0] | 
 | 53 |  | 
 | 54 | 		mov	ip, r4, lsl #16 | 
 | 55 | 		orr	ip, ip, ip, lsr #16 | 
 | 56 | 		str	ip, [r0] | 
 | 57 |  | 
 | 58 | 		mov	ip, r4, lsr #16 | 
 | 59 | 		orr	ip, ip, ip, lsl #16 | 
 | 60 | 		str	ip, [r0] | 
 | 61 |  | 
 | 62 | 		mov	ip, r5, lsl #16 | 
 | 63 | 		orr	ip, ip, ip, lsr #16 | 
 | 64 | 		str	ip, [r0] | 
 | 65 |  | 
 | 66 | 		mov	ip, r5, lsr #16 | 
 | 67 | 		orr	ip, ip, ip, lsl #16 | 
 | 68 | 		str	ip, [r0] | 
 | 69 |  | 
 | 70 | 		mov	ip, r6, lsl #16 | 
 | 71 | 		orr	ip, ip, ip, lsr #16 | 
 | 72 | 		str	ip, [r0] | 
 | 73 |  | 
 | 74 | 		mov	ip, r6, lsr #16 | 
 | 75 | 		orr	ip, ip, ip, lsl #16 | 
 | 76 | 		str	ip, [r0] | 
 | 77 |  | 
 | 78 | 		subs	r2, r2, #8 | 
 | 79 | 		bpl	.Loutsw_8_lp | 
 | 80 |  | 
 | 81 | 		tst	r2, #7 | 
 | 82 | 		ldmeqfd	sp!, {r4, r5, r6, pc} | 
 | 83 |  | 
 | 84 | .Lno_outsw_8:	tst	r2, #4 | 
 | 85 | 		beq	.Lno_outsw_4 | 
 | 86 |  | 
 | 87 | 		ldmia	r1!, {r3, r4} | 
 | 88 |  | 
 | 89 | 		mov	ip, r3, lsl #16 | 
 | 90 | 		orr	ip, ip, ip, lsr #16 | 
 | 91 | 		str	ip, [r0] | 
 | 92 |  | 
 | 93 | 		mov	ip, r3, lsr #16 | 
 | 94 | 		orr	ip, ip, ip, lsl #16 | 
 | 95 | 		str	ip, [r0] | 
 | 96 |  | 
 | 97 | 		mov	ip, r4, lsl #16 | 
 | 98 | 		orr	ip, ip, ip, lsr #16 | 
 | 99 | 		str	ip, [r0] | 
 | 100 |  | 
 | 101 | 		mov	ip, r4, lsr #16 | 
 | 102 | 		orr	ip, ip, ip, lsl #16 | 
 | 103 | 		str	ip, [r0] | 
 | 104 |  | 
 | 105 | .Lno_outsw_4:	tst	r2, #2 | 
 | 106 | 		beq	.Lno_outsw_2 | 
 | 107 |  | 
 | 108 | 		ldr	r3, [r1], #4 | 
 | 109 |  | 
 | 110 | 		mov	ip, r3, lsl #16 | 
 | 111 | 		orr	ip, ip, ip, lsr #16 | 
 | 112 | 		str	ip, [r0] | 
 | 113 |  | 
 | 114 | 		mov	ip, r3, lsr #16 | 
 | 115 | 		orr	ip, ip, ip, lsl #16 | 
 | 116 | 		str	ip, [r0] | 
 | 117 |  | 
 | 118 | .Lno_outsw_2:	tst	r2, #1 | 
 | 119 |  | 
 | 120 | 		ldrne	r3, [r1] | 
 | 121 |  | 
 | 122 | 		movne	ip, r3, lsl #16 | 
 | 123 | 		orrne	ip, ip, ip, lsr #16 | 
 | 124 | 		strne	ip, [r0] | 
 | 125 |  | 
 | 126 | 		ldmfd	sp!, {r4, r5, r6, pc} |