Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Atheros 724x PCI support |
| 3 | * |
| 4 | * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/pci.h> |
Gabor Juhos | 659243c | 2012-03-14 10:29:23 +0100 | [diff] [blame] | 12 | #include <asm/mach-ath79/pci.h> |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 13 | |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 14 | #define AR724X_PCI_CFG_BASE 0x14000000 |
| 15 | #define AR724X_PCI_CFG_SIZE 0x1000 |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 16 | #define AR724X_PCI_MEM_BASE 0x10000000 |
| 17 | #define AR724X_PCI_MEM_SIZE 0x08000000 |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 18 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 19 | static DEFINE_SPINLOCK(ar724x_pci_lock); |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 20 | static void __iomem *ar724x_pci_devcfg_base; |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 21 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 22 | static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 23 | int size, uint32_t *value) |
| 24 | { |
| 25 | unsigned long flags, addr, tval, mask; |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 26 | void __iomem *base; |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 27 | |
| 28 | if (devfn) |
| 29 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 30 | |
| 31 | if (where & (size - 1)) |
| 32 | return PCIBIOS_BAD_REGISTER_NUMBER; |
| 33 | |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 34 | base = ar724x_pci_devcfg_base; |
| 35 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 36 | spin_lock_irqsave(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 37 | |
| 38 | switch (size) { |
| 39 | case 1: |
| 40 | addr = where & ~3; |
| 41 | mask = 0xff000000 >> ((where % 4) * 8); |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 42 | tval = __raw_readl(base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 43 | tval = tval & ~mask; |
| 44 | *value = (tval >> ((4 - (where % 4))*8)); |
| 45 | break; |
| 46 | case 2: |
| 47 | addr = where & ~3; |
| 48 | mask = 0xffff0000 >> ((where % 4)*8); |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 49 | tval = __raw_readl(base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 50 | tval = tval & ~mask; |
| 51 | *value = (tval >> ((4 - (where % 4))*8)); |
| 52 | break; |
| 53 | case 4: |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 54 | *value = __raw_readl(base + where); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 55 | break; |
| 56 | default: |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 57 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 58 | |
| 59 | return PCIBIOS_BAD_REGISTER_NUMBER; |
| 60 | } |
| 61 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 62 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 63 | |
| 64 | return PCIBIOS_SUCCESSFUL; |
| 65 | } |
| 66 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 67 | static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 68 | int size, uint32_t value) |
| 69 | { |
| 70 | unsigned long flags, tval, addr, mask; |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 71 | void __iomem *base; |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 72 | |
| 73 | if (devfn) |
| 74 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 75 | |
| 76 | if (where & (size - 1)) |
| 77 | return PCIBIOS_BAD_REGISTER_NUMBER; |
| 78 | |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 79 | base = ar724x_pci_devcfg_base; |
| 80 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 81 | spin_lock_irqsave(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 82 | |
| 83 | switch (size) { |
| 84 | case 1: |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 85 | addr = where & ~3; |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 86 | mask = 0xff000000 >> ((where % 4)*8); |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 87 | tval = __raw_readl(base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 88 | tval = tval & ~mask; |
| 89 | tval |= (value << ((4 - (where % 4))*8)) & mask; |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 90 | __raw_writel(tval, base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 91 | break; |
| 92 | case 2: |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 93 | addr = where & ~3; |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 94 | mask = 0xffff0000 >> ((where % 4)*8); |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 95 | tval = __raw_readl(base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 96 | tval = tval & ~mask; |
| 97 | tval |= (value << ((4 - (where % 4))*8)) & mask; |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 98 | __raw_writel(tval, base + addr); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 99 | break; |
| 100 | case 4: |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 101 | __raw_writel(value, (base + where)); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 102 | break; |
| 103 | default: |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 104 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 105 | |
| 106 | return PCIBIOS_BAD_REGISTER_NUMBER; |
| 107 | } |
| 108 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 109 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 110 | |
| 111 | return PCIBIOS_SUCCESSFUL; |
| 112 | } |
| 113 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 114 | static struct pci_ops ar724x_pci_ops = { |
| 115 | .read = ar724x_pci_read, |
| 116 | .write = ar724x_pci_write, |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 117 | }; |
| 118 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 119 | static struct resource ar724x_io_resource = { |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 120 | .name = "PCI IO space", |
| 121 | .start = 0, |
| 122 | .end = 0, |
| 123 | .flags = IORESOURCE_IO, |
| 124 | }; |
| 125 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 126 | static struct resource ar724x_mem_resource = { |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 127 | .name = "PCI memory space", |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 128 | .start = AR724X_PCI_MEM_BASE, |
| 129 | .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1, |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 130 | .flags = IORESOURCE_MEM, |
| 131 | }; |
| 132 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 133 | static struct pci_controller ar724x_pci_controller = { |
| 134 | .pci_ops = &ar724x_pci_ops, |
| 135 | .io_resource = &ar724x_io_resource, |
| 136 | .mem_resource = &ar724x_mem_resource, |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 137 | }; |
| 138 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 139 | int __init ar724x_pcibios_init(void) |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 140 | { |
Gabor Juhos | c198441 | 2012-03-14 10:29:27 +0100 | [diff] [blame^] | 141 | ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, |
| 142 | AR724X_PCI_CFG_SIZE); |
| 143 | if (ar724x_pci_devcfg_base == NULL) |
| 144 | return -ENOMEM; |
| 145 | |
Gabor Juhos | d624bd3 | 2012-03-14 10:29:26 +0100 | [diff] [blame] | 146 | register_pci_controller(&ar724x_pci_controller); |
Rene Bolldorf | 4ff40d5 | 2011-11-17 14:25:09 +0000 | [diff] [blame] | 147 | |
| 148 | return PCIBIOS_SUCCESSFUL; |
| 149 | } |