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review.evervolv.com / android_kernel_oneplus_msm8996 / c259ae52e204d42f8b2d484c85517a4c367030e1 / . / arch / sh / drivers / pci / fixups-r7780rp.c
blob: 3e321df65d22a9a7723f630496405bdca854e17b [file] [log] [blame]
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]1/*
2 * arch/sh/drivers/pci/fixups-r7780rp.c
3 *
4 * Highlander R7780RP-1 PCI fixups
5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc.
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]7 * Copyright (C) 2004 - 2006 Paul Mundt
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]13#include <linux/pci.h>
14#include "pci-sh4.h"
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]15#include <asm/io.h>
16
17int pci_fixup_pcic(void)
18{
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]19 pci_write_reg(0x000043ff, SH4_PCIINTM);
20 pci_write_reg(0x0000380f, SH4_PCIAINTM);
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]21
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]22 pci_write_reg(0xfbb00047, SH7780_PCICMD);
23 pci_write_reg(0x00000000, SH7780_PCIIBAR);
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]24
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]25 pci_write_reg(0x00011912, SH7780_PCISVID);
26 pci_write_reg(0x08000000, SH7780_PCICSCR0);
27 pci_write_reg(0x0000001b, SH7780_PCICSAR0);
28 pci_write_reg(0xfd000000, SH7780_PCICSCR1);
29 pci_write_reg(0x0000000f, SH7780_PCICSAR1);
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]30
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]31 pci_write_reg(0xfd000000, SH7780_PCIMBR0);
32 pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
33
34#ifdef CONFIG_32BIT
35 pci_write_reg(0xc0000000, SH7780_PCIMBR2);
36 pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
37#endif
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]38
39 /* Set IOBR for windows containing area specified in pci.h */
Paul Mundt959f85f2006-09-27 16:43:28 +0900[diff] [blame]40 pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
41 SH7780_PCIIOBR);
42 pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR);
Paul Mundt5283ecb2006-09-27 15:59:17 +0900[diff] [blame]43
44 return 0;
45}