blob: 1cadcd6b7da6daee8e14785ccf4abfa9a467c910 [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
5** BY : Erich Chen
6** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080012** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070013**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070059#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070060#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080061#include <linux/aer.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
64#include <asm/system.h>
65#include <asm/uaccess.h>
66#include <scsi/scsi_host.h>
67#include <scsi/scsi.h>
68#include <scsi/scsi_cmnd.h>
69#include <scsi/scsi_tcq.h>
70#include <scsi/scsi_device.h>
71#include <scsi/scsi_transport.h>
72#include <scsi/scsicam.h>
73#include "arcmsr.h"
Nick Chengae52e7f2010-06-18 15:39:12 +080074MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
Nick Chengcdd3cb12010-07-13 20:03:04 +080075MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
Erich Chen1c57e862006-07-12 08:59:32 -070076MODULE_LICENSE("Dual BSD/GPL");
77MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Nick Chengcdd3cb12010-07-13 20:03:04 +080078static int sleeptime = 10;
79static int retrycount = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +080080wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080081static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
82 struct scsi_cmnd *cmd);
83static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070084static int arcmsr_abort(struct scsi_cmnd *);
85static int arcmsr_bus_reset(struct scsi_cmnd *);
86static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080087 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050088static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070089static int arcmsr_probe(struct pci_dev *pdev,
90 const struct pci_device_id *id);
91static void arcmsr_remove(struct pci_dev *pdev);
92static void arcmsr_shutdown(struct pci_dev *pdev);
93static void arcmsr_iop_init(struct AdapterControlBlock *acb);
94static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080095static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070096static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080097static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
98static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +080099static void arcmsr_request_device_map(unsigned long pacb);
100static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
101static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800102static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800103static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f2010-06-18 15:39:12 +0800104static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800105static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800106static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
107static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700108static const char *arcmsr_info(struct Scsi_Host *);
109static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800110static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
Mike Christiee881a172009-10-15 17:46:39 -0700111 int queue_depth, int reason)
Erich Chen1c57e862006-07-12 08:59:32 -0700112{
Mike Christiee881a172009-10-15 17:46:39 -0700113 if (reason != SCSI_QDEPTH_DEFAULT)
114 return -EOPNOTSUPP;
115
Erich Chen1c57e862006-07-12 08:59:32 -0700116 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
117 queue_depth = ARCMSR_MAX_CMD_PERLUN;
118 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
119 return queue_depth;
120}
121
122static struct scsi_host_template arcmsr_scsi_host_template = {
123 .module = THIS_MODULE,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800124 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
125 ARCMSR_DRIVER_VERSION,
Erich Chen1c57e862006-07-12 08:59:32 -0700126 .info = arcmsr_info,
127 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800128 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700129 .eh_bus_reset_handler = arcmsr_bus_reset,
130 .bios_param = arcmsr_bios_param,
131 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Nick Chengae52e7f2010-06-18 15:39:12 +0800132 .can_queue = ARCMSR_MAX_FREECCB_NUM,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800133 .this_id = ARCMSR_SCSI_INITIATOR_ID,
134 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
135 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700136 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
137 .use_clustering = ENABLE_CLUSTERING,
138 .shost_attrs = arcmsr_host_attrs,
139};
Erich Chen1c57e862006-07-12 08:59:32 -0700140static struct pci_device_id arcmsr_device_id_table[] = {
141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
Nick Cheng1a4f5502007-09-13 17:26:40 +0800146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
Erich Chen1c57e862006-07-12 08:59:32 -0700149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
Nick Chengae52e7f2010-06-18 15:39:12 +0800159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
Erich Chen1c57e862006-07-12 08:59:32 -0700160 {0, 0}, /* Terminating entry */
161};
162MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
163static struct pci_driver arcmsr_pci_driver = {
164 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800165 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700166 .probe = arcmsr_probe,
167 .remove = arcmsr_remove,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800168 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700169};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800170/*
171****************************************************************************
172****************************************************************************
173*/
174int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd)
175{
176 struct Scsi_Host *shost = NULL;
177 int i, isleep;
178 shost = cmd->device->host;
179 isleep = sleeptime / 10;
180 if (isleep > 0) {
181 for (i = 0; i < isleep; i++) {
182 msleep(10000);
183 }
184 }
Erich Chen1c57e862006-07-12 08:59:32 -0700185
Nick Chengcdd3cb12010-07-13 20:03:04 +0800186 isleep = sleeptime % 10;
187 if (isleep > 0) {
188 msleep(isleep*1000);
189 }
190 printk(KERN_NOTICE "wake-up\n");
191 return 0;
192}
193
194static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800195{
196 switch (acb->adapter_type) {
197 case ACB_ADAPTER_TYPE_A:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800198 case ACB_ADAPTER_TYPE_C:
Nick Chengae52e7f2010-06-18 15:39:12 +0800199 break;
200 case ACB_ADAPTER_TYPE_B:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800201 dma_free_coherent(&acb->pdev->dev,
202 sizeof(struct MessageUnit_B),
203 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
Nick Chengae52e7f2010-06-18 15:39:12 +0800204 }
205 }
206}
207
208static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
209{
210 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800211 switch (acb->adapter_type){
Nick Chengae52e7f2010-06-18 15:39:12 +0800212 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800213 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f2010-06-18 15:39:12 +0800214 if (!acb->pmuA) {
215 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
216 return false;
217 }
218 break;
219 }
220 case ACB_ADAPTER_TYPE_B:{
221 void __iomem *mem_base0, *mem_base1;
222 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
223 if (!mem_base0) {
224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
225 return false;
226 }
227 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
228 if (!mem_base1) {
229 iounmap(mem_base0);
230 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
231 return false;
232 }
233 acb->mem_base0 = mem_base0;
234 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800235 break;
236 }
237 case ACB_ADAPTER_TYPE_C:{
238 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
239 if (!acb->pmuC) {
240 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
241 return false;
242 }
243 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
244 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
245 return true;
246 }
247 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800248 }
249 }
250 return true;
251}
252
253static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
254{
255 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800256 case ACB_ADAPTER_TYPE_A:{
257 iounmap(acb->pmuA);
258 }
259 break;
260 case ACB_ADAPTER_TYPE_B:{
261 iounmap(acb->mem_base0);
262 iounmap(acb->mem_base1);
263 }
264
265 break;
266 case ACB_ADAPTER_TYPE_C:{
267 iounmap(acb->pmuC);
268 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800269 }
270}
271
David Howells7d12e782006-10-05 14:55:46 +0100272static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700273{
274 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800275 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700276
Erich Chen1c57e862006-07-12 08:59:32 -0700277 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700278 return handle_state;
279}
280
281static int arcmsr_bios_param(struct scsi_device *sdev,
282 struct block_device *bdev, sector_t capacity, int *geom)
283{
284 int ret, heads, sectors, cylinders, total_capacity;
285 unsigned char *buffer;/* return copy of block device's partition table */
286
287 buffer = scsi_bios_ptable(bdev);
288 if (buffer) {
289 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
290 kfree(buffer);
291 if (ret != -1)
292 return ret;
293 }
294 total_capacity = capacity;
295 heads = 64;
296 sectors = 32;
297 cylinders = total_capacity / (heads * sectors);
298 if (cylinders > 1024) {
299 heads = 255;
300 sectors = 63;
301 cylinders = total_capacity / (heads * sectors);
302 }
303 geom[0] = heads;
304 geom[1] = sectors;
305 geom[2] = cylinders;
306 return 0;
307}
308
Nick Cheng1a4f5502007-09-13 17:26:40 +0800309static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -0700310{
311 struct pci_dev *pdev = acb->pdev;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800312 u16 dev_id;
313 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
Nick Chengae52e7f2010-06-18 15:39:12 +0800314 acb->dev_id = dev_id;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800315 switch (dev_id) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800316 case 0x1880: {
317 acb->adapter_type = ACB_ADAPTER_TYPE_C;
318 }
319 break;
320 case 0x1201: {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800321 acb->adapter_type = ACB_ADAPTER_TYPE_B;
322 }
323 break;
Erich Chen1c57e862006-07-12 08:59:32 -0700324
Nick Chengcdd3cb12010-07-13 20:03:04 +0800325 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800326 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800327}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800328
Nick Chengae52e7f2010-06-18 15:39:12 +0800329static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800330{
Nick Chengae52e7f2010-06-18 15:39:12 +0800331 struct MessageUnit_A __iomem *reg = acb->pmuA;
332 uint32_t Index;
333 uint8_t Retries = 0x00;
Nick Chengae52e7f2010-06-18 15:39:12 +0800334 do {
335 for (Index = 0; Index < 100; Index++) {
336 if (readl(&reg->outbound_intstatus) &
337 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
338 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
339 &reg->outbound_intstatus);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800340 return true;
Nick Chengae52e7f2010-06-18 15:39:12 +0800341 }
342 msleep(10);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800343 }/*max 1 seconds*/
Nick Chengae52e7f2010-06-18 15:39:12 +0800344
345 } while (Retries++ < 20);/*max 20 sec*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800346 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800347}
348
349static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
350{
351 struct MessageUnit_B *reg = acb->pmuB;
352 uint32_t Index;
353 uint8_t Retries = 0x00;
Nick Chengae52e7f2010-06-18 15:39:12 +0800354 do {
355 for (Index = 0; Index < 100; Index++) {
356 if (readl(reg->iop2drv_doorbell)
357 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
358 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
359 , reg->iop2drv_doorbell);
360 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800361 return true;
Nick Chengae52e7f2010-06-18 15:39:12 +0800362 }
363 msleep(10);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800364 }/*max 1 seconds*/
Nick Chengae52e7f2010-06-18 15:39:12 +0800365
366 } while (Retries++ < 20);/*max 20 sec*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800367 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800368}
369
Nick Chengcdd3cb12010-07-13 20:03:04 +0800370static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
371{
372 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
373 unsigned char Retries = 0x00;
374 uint32_t Index;
375 do {
376 for (Index = 0; Index < 100; Index++) {
377 if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
378 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/
379 return true;
380 }
381 /* one us delay */
382 msleep(10);
383 } /*max 1 seconds*/
384 } while (Retries++ < 20); /*max 20 sec*/
385 return false;
386}
Nick Chengae52e7f2010-06-18 15:39:12 +0800387static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
388{
389 struct MessageUnit_A __iomem *reg = acb->pmuA;
390 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800391 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
392 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800393 if (arcmsr_hba_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800394 break;
395 else {
396 retry_count--;
397 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
398 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
399 }
400 } while (retry_count != 0);
401}
402
403static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
404{
405 struct MessageUnit_B *reg = acb->pmuB;
406 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800407 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
408 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800409 if (arcmsr_hbb_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800410 break;
411 else {
412 retry_count--;
413 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
414 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
415 }
416 } while (retry_count != 0);
417}
418
Nick Chengcdd3cb12010-07-13 20:03:04 +0800419static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
420{
421 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
422 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
423 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
424 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
425 do {
426 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
427 break;
428 } else {
429 retry_count--;
430 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
431 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
432 }
433 } while (retry_count != 0);
434 return;
435}
Nick Chengae52e7f2010-06-18 15:39:12 +0800436static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
437{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800438 switch (acb->adapter_type) {
439
440 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800441 arcmsr_flush_hba_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800442 }
443 break;
444
445 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800446 arcmsr_flush_hbb_cache(acb);
447 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800448 break;
449 case ACB_ADAPTER_TYPE_C: {
450 arcmsr_flush_hbc_cache(acb);
451 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800452 }
453}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800454
Nick Chengae52e7f2010-06-18 15:39:12 +0800455static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
456{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800457 struct pci_dev *pdev = acb->pdev;
458 void *dma_coherent;
459 dma_addr_t dma_coherent_handle;
460 struct CommandControlBlock *ccb_tmp;
461 int i = 0, j = 0;
462 dma_addr_t cdb_phyaddr;
463 unsigned long roundup_ccbsize = 0, offset;
464 unsigned long max_xfer_len;
465 unsigned long max_sg_entrys;
466 uint32_t firm_config_version;
467 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
468 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
469 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800470
Nick Chengcdd3cb12010-07-13 20:03:04 +0800471 max_xfer_len = ARCMSR_MAX_XFER_LEN;
472 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
473 firm_config_version = acb->firm_cfg_version;
474 if((firm_config_version & 0xFF) >= 3){
475 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
476 max_sg_entrys = (max_xfer_len/4096);
477 }
478 acb->host->max_sectors = max_xfer_len/512;
479 acb->host->sg_tablesize = max_sg_entrys;
480 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
481 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32;
482 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
483 if(!dma_coherent){
484 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no);
485 return -ENOMEM;
486 }
487 acb->dma_coherent = dma_coherent;
488 acb->dma_coherent_handle = dma_coherent_handle;
489 memset(dma_coherent, 0, acb->uncache_size);
490 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent;
491 dma_coherent_handle = dma_coherent_handle + offset;
492 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset;
493 ccb_tmp = dma_coherent;
494 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
495 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
496 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
497 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
498 acb->pccb_pool[i] = ccb_tmp;
499 ccb_tmp->acb = acb;
500 INIT_LIST_HEAD(&ccb_tmp->list);
501 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
502 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
503 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700504 }
Erich Chen1c57e862006-07-12 08:59:32 -0700505 return 0;
506}
Nick Cheng36b83de2010-05-17 11:22:42 +0800507
Nick Chengcdd3cb12010-07-13 20:03:04 +0800508static void arcmsr_message_isr_bh_fn(struct work_struct *work)
509{
510 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +0800511 switch (acb->adapter_type) {
512 case ACB_ADAPTER_TYPE_A: {
513
514 struct MessageUnit_A __iomem *reg = acb->pmuA;
515 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800516 uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
517 char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800518 int target, lun;
519 struct scsi_device *psdev;
520 char diff;
521
522 atomic_inc(&acb->rq_map_token);
523 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800524 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800525 diff = (*acb_dev_map)^readb(devicemap);
526 if (diff != 0) {
527 char temp;
528 *acb_dev_map = readb(devicemap);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800529 temp =*acb_dev_map;
530 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
531 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800532 scsi_add_device(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800533 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800534 psdev = scsi_device_lookup(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800535 if (psdev != NULL ) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800536 scsi_remove_device(psdev);
537 scsi_device_put(psdev);
538 }
539 }
540 temp >>= 1;
541 diff >>= 1;
542 }
543 }
544 devicemap++;
545 acb_dev_map++;
546 }
547 }
548 break;
549 }
550
551 case ACB_ADAPTER_TYPE_B: {
552 struct MessageUnit_B *reg = acb->pmuB;
553 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800554 uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
555 char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
556 int target, lun;
557 struct scsi_device *psdev;
558 char diff;
559
560 atomic_inc(&acb->rq_map_token);
561 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
562 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
563 diff = (*acb_dev_map)^readb(devicemap);
564 if (diff != 0) {
565 char temp;
566 *acb_dev_map = readb(devicemap);
567 temp =*acb_dev_map;
568 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
569 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
570 scsi_add_device(acb->host, 0, target, lun);
571 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
572 psdev = scsi_device_lookup(acb->host, 0, target, lun);
573 if (psdev != NULL ) {
574 scsi_remove_device(psdev);
575 scsi_device_put(psdev);
576 }
577 }
578 temp >>= 1;
579 diff >>= 1;
580 }
581 }
582 devicemap++;
583 acb_dev_map++;
584 }
585 }
586 }
587 break;
588 case ACB_ADAPTER_TYPE_C: {
589 struct MessageUnit_C *reg = acb->pmuC;
590 char *acb_dev_map = (char *)acb->device_map;
591 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
592 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800593 int target, lun;
594 struct scsi_device *psdev;
595 char diff;
596
597 atomic_inc(&acb->rq_map_token);
598 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
599 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
600 diff = (*acb_dev_map)^readb(devicemap);
601 if (diff != 0) {
602 char temp;
603 *acb_dev_map = readb(devicemap);
604 temp = *acb_dev_map;
605 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
606 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
607 scsi_add_device(acb->host, 0, target, lun);
608 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
609 psdev = scsi_device_lookup(acb->host, 0, target, lun);
610 if (psdev != NULL) {
611 scsi_remove_device(psdev);
612 scsi_device_put(psdev);
613 }
614 }
615 temp >>= 1;
616 diff >>= 1;
617 }
618 }
619 devicemap++;
620 acb_dev_map++;
621 }
622 }
623 }
624 }
625}
Erich Chen1c57e862006-07-12 08:59:32 -0700626
Nick Chengae52e7f2010-06-18 15:39:12 +0800627static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700628{
629 struct Scsi_Host *host;
630 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800631 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700632 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700633 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800634 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800635 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700636 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800637 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800638 if(!host){
639 goto pci_disable_dev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800640 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700641 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800642 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700643 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800644 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700645 printk(KERN_WARNING
646 "scsi%d: No suitable DMA mask available\n",
647 host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +0800648 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700649 }
650 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800651 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700652 bus = pdev->bus->number;
653 dev_fun = pdev->devfn;
Nick Chengae52e7f2010-06-18 15:39:12 +0800654 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800655 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700656 acb->pdev = pdev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800657 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700658 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800659 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
660 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
661 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
662 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700663 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
664 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f2010-06-18 15:39:12 +0800665 pci_set_drvdata(pdev, host);
666 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700667 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800668 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800669 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700670 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800671 spin_lock_init(&acb->eh_lock);
672 spin_lock_init(&acb->ccblist_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700673 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800674 ACB_F_MESSAGE_RQBUFFER_CLEARED |
675 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700676 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
677 INIT_LIST_HEAD(&acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800678 arcmsr_define_adapter_type(acb);
679 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800680 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800681 goto pci_release_regs;
682 }
683 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800684 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800685 goto unmap_pci_region;
686 }
Erich Chen1c57e862006-07-12 08:59:32 -0700687 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800688 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800689 goto free_hbb_mu;
690 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800691 arcmsr_iop_init(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700692 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800693 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800694 goto RAID_controller_stop;
695 }
696 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800697 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800698 goto scsi_host_remove;
699 }
700 host->irq = pdev->irq;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800701 scsi_scan_host(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800702 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800703 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +0800704 atomic_set(&acb->ante_token_value, 16);
705 acb->fw_flag = FW_NORMAL;
Nick Cheng36b83de2010-05-17 11:22:42 +0800706 init_timer(&acb->eternal_timer);
Nick Chengae52e7f2010-06-18 15:39:12 +0800707 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800708 acb->eternal_timer.data = (unsigned long) acb;
709 acb->eternal_timer.function = &arcmsr_request_device_map;
710 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800711 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800712 goto out_free_sysfs;
Erich Chen1c57e862006-07-12 08:59:32 -0700713 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800714out_free_sysfs:
Nick Chengae52e7f2010-06-18 15:39:12 +0800715scsi_host_remove:
716 scsi_remove_host(host);
717RAID_controller_stop:
718 arcmsr_stop_adapter_bgrb(acb);
719 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700720 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800721free_hbb_mu:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800722 arcmsr_free_hbb_mu(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800723unmap_pci_region:
724 arcmsr_unmap_pciregion(acb);
725pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700726 pci_release_regions(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800727scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700728 scsi_host_put(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800729pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700730 pci_disable_device(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800731 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800732}
733
Nick Cheng36b83de2010-05-17 11:22:42 +0800734static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800735{
Al Viro80da1ad2007-10-29 05:08:28 +0000736 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700737 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800738 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700739 printk(KERN_NOTICE
740 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
741 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800742 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800743 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800744 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700745}
746
Nick Cheng36b83de2010-05-17 11:22:42 +0800747static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800748{
Al Viro80da1ad2007-10-29 05:08:28 +0000749 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800750
Nick Chengae52e7f2010-06-18 15:39:12 +0800751 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800752 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800753 printk(KERN_NOTICE
754 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
755 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800756 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800757 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800758 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800759}
Nick Chengcdd3cb12010-07-13 20:03:04 +0800760static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
761{
762 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
763 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
764 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
765 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
766 printk(KERN_NOTICE
767 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
768 , pACB->host->host_no);
769 return false;
770 }
771 return true;
772}
Nick Cheng36b83de2010-05-17 11:22:42 +0800773static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800774{
Nick Cheng36b83de2010-05-17 11:22:42 +0800775 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800776 switch (acb->adapter_type) {
777 case ACB_ADAPTER_TYPE_A: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800778 rtnval = arcmsr_abort_hba_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800779 }
780 break;
781
782 case ACB_ADAPTER_TYPE_B: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800783 rtnval = arcmsr_abort_hbb_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800784 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800785 break;
786
787 case ACB_ADAPTER_TYPE_C: {
788 rtnval = arcmsr_abort_hbc_allcmd(acb);
789 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800790 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800791 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800792}
793
Nick Chengae52e7f2010-06-18 15:39:12 +0800794static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
795{
796 struct MessageUnit_B *reg = pacb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800797 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800798 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800799 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
800 return false;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800801 }
802 return true;
Nick Chengae52e7f2010-06-18 15:39:12 +0800803}
804
Erich Chen1c57e862006-07-12 08:59:32 -0700805static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
806{
Erich Chen1c57e862006-07-12 08:59:32 -0700807 struct scsi_cmnd *pcmd = ccb->pcmd;
808
FUJITA Tomonorideff2622007-05-14 19:25:56 +0900809 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800810}
Erich Chen1c57e862006-07-12 08:59:32 -0700811
Nick Chengae52e7f2010-06-18 15:39:12 +0800812static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -0700813{
814 struct AdapterControlBlock *acb = ccb->acb;
815 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f2010-06-18 15:39:12 +0800816 unsigned long flags;
Nick Chengae52e7f2010-06-18 15:39:12 +0800817 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -0700818 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -0700819 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800820 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700821 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800822 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700823 pcmd->scsi_done(pcmd);
824}
825
Nick Cheng1a4f5502007-09-13 17:26:40 +0800826static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
827{
828
829 struct scsi_cmnd *pcmd = ccb->pcmd;
830 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800831 pcmd->result = DID_OK << 16;
832 if (sensebuffer) {
833 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +0900834 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
835 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
836 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800837 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
838 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
839 sensebuffer->Valid = 1;
840 }
841}
842
843static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
844{
845 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800846 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800847 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +0000848 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800849 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800850 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
851 &reg->outbound_intmask);
852 }
853 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800854 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +0000855 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800856 orig_mask = readl(reg->iop2drv_doorbell_mask);
857 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800858 }
859 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800860 case ACB_ADAPTER_TYPE_C:{
861 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
862 /* disable all outbound interrupt */
863 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
864 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
865 }
866 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800867 }
868 return orig_mask;
869}
870
Nick Chengcdd3cb12010-07-13 20:03:04 +0800871static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
872 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800873{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800874 uint8_t id, lun;
875 id = ccb->pcmd->device->id;
876 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800877 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800878 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
879 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +0200880 ccb->pcmd->result = DID_OK << 16;
881 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800882 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800883 switch (ccb->arcmsr_cdb.DeviceStatus) {
884 case ARCMSR_DEV_SELECT_TIMEOUT: {
885 acb->devstate[id][lun] = ARECA_RAID_GONE;
886 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800887 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800888 }
889 break;
890
891 case ARCMSR_DEV_ABORTED:
892
893 case ARCMSR_DEV_INIT_FAIL: {
894 acb->devstate[id][lun] = ARECA_RAID_GONE;
895 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800896 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800897 }
898 break;
899
900 case ARCMSR_DEV_CHECK_CONDITION: {
901 acb->devstate[id][lun] = ARECA_RAID_GOOD;
902 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800903 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800904 }
905 break;
906
907 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800908 printk(KERN_NOTICE
909 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
910 but got unknown DeviceStatus = 0x%x \n"
911 , acb->host->host_no
912 , id
913 , lun
914 , ccb->arcmsr_cdb.DeviceStatus);
915 acb->devstate[id][lun] = ARECA_RAID_GONE;
916 ccb->pcmd->result = DID_NO_CONNECT << 16;
917 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800918 break;
919 }
920 }
921}
922
Nick Chengcdd3cb12010-07-13 20:03:04 +0800923static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800924
925{
Nick Chengae52e7f2010-06-18 15:39:12 +0800926 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800927 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
928 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
929 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800930 if (abortcmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800931 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800932 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800933 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800934 arcmsr_ccb_complete(pCCB);
935 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
936 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800937 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800938 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800939 }
940 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
941 done acb = '0x%p'"
942 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
943 " ccboutstandingcount = %d \n"
944 , acb->host->host_no
945 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +0800946 , pCCB
947 , pCCB->acb
948 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +0800949 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800950 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800951 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800952 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800953}
954
955static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
956{
957 int i = 0;
958 uint32_t flag_ccb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800959 struct ARCMSR_CDB *pARCMSR_CDB;
960 bool error;
961 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800962 switch (acb->adapter_type) {
963
964 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +0000965 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800966 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +0000967 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +0800968 acb->outbound_int_enable;
969 /*clear and abort all outbound posted Q*/
970 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800971 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800972 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800973 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
974 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
975 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
976 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800977 }
978 }
979 break;
980
981 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +0000982 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800983 /*clear all outbound posted Q*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800984 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, &reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +0800985 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
986 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
987 writel(0, &reg->done_qbuffer[i]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800988 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
989 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
990 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
991 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800992 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800993 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800994 }
995 reg->doneq_index = 0;
996 reg->postq_index = 0;
997 }
998 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800999 case ACB_ADAPTER_TYPE_C: {
1000 struct MessageUnit_C *reg = acb->pmuC;
1001 struct ARCMSR_CDB *pARCMSR_CDB;
1002 uint32_t flag_ccb, ccb_cdb_phy;
1003 bool error;
1004 struct CommandControlBlock *pCCB;
1005 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1006 /*need to do*/
1007 flag_ccb = readl(&reg->outbound_queueport_low);
1008 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1009 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1010 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1011 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1012 arcmsr_drain_donequeue(acb, pCCB, error);
1013 }
1014 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001015 }
1016}
Erich Chen1c57e862006-07-12 08:59:32 -07001017static void arcmsr_remove(struct pci_dev *pdev)
1018{
1019 struct Scsi_Host *host = pci_get_drvdata(pdev);
1020 struct AdapterControlBlock *acb =
1021 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001022 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001023 arcmsr_free_sysfs_attr(acb);
1024 scsi_remove_host(host);
Nick Cheng36b83de2010-05-17 11:22:42 +08001025 flush_scheduled_work();
1026 del_timer_sync(&acb->eternal_timer);
1027 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001028 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001029 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001030 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1031 acb->acb_flags &= ~ACB_F_IOP_INITED;
1032
Nick Chengcdd3cb12010-07-13 20:03:04 +08001033 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001034 if (!atomic_read(&acb->ccboutstandingcount))
1035 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001036 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001037 msleep(25);
1038 }
1039
1040 if (atomic_read(&acb->ccboutstandingcount)) {
1041 int i;
1042
1043 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001044 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001045 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1046 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1047 if (ccb->startdone == ARCMSR_CCB_START) {
1048 ccb->startdone = ARCMSR_CCB_ABORTED;
1049 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001050 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001051 }
1052 }
1053 }
Erich Chen1c57e862006-07-12 08:59:32 -07001054 free_irq(pdev->irq, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001055 arcmsr_free_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001056 arcmsr_free_hbb_mu(acb);
1057 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001058 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001059 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001060 pci_disable_device(pdev);
1061 pci_set_drvdata(pdev, NULL);
1062}
1063
1064static void arcmsr_shutdown(struct pci_dev *pdev)
1065{
1066 struct Scsi_Host *host = pci_get_drvdata(pdev);
1067 struct AdapterControlBlock *acb =
1068 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001069 del_timer_sync(&acb->eternal_timer);
1070 arcmsr_disable_outbound_ints(acb);
1071 flush_scheduled_work();
Erich Chen1c57e862006-07-12 08:59:32 -07001072 arcmsr_stop_adapter_bgrb(acb);
1073 arcmsr_flush_adapter_cache(acb);
1074}
1075
1076static int arcmsr_module_init(void)
1077{
1078 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001079 error = pci_register_driver(&arcmsr_pci_driver);
1080 return error;
1081}
1082
1083static void arcmsr_module_exit(void)
1084{
1085 pci_unregister_driver(&arcmsr_pci_driver);
1086}
1087module_init(arcmsr_module_init);
1088module_exit(arcmsr_module_exit);
1089
Nick Cheng36b83de2010-05-17 11:22:42 +08001090static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001091 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001092{
Erich Chen1c57e862006-07-12 08:59:32 -07001093 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001094 switch (acb->adapter_type) {
1095
Nick Chengcdd3cb12010-07-13 20:03:04 +08001096 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001097 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001098 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001099 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1100 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001101 writel(mask, &reg->outbound_intmask);
1102 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1103 }
1104 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001105
Nick Chengcdd3cb12010-07-13 20:03:04 +08001106 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001107 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001108 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1109 ARCMSR_IOP2DRV_DATA_READ_OK |
1110 ARCMSR_IOP2DRV_CDB_DONE |
1111 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f2010-06-18 15:39:12 +08001112 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001113 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1114 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001115 break;
1116 case ACB_ADAPTER_TYPE_C: {
1117 struct MessageUnit_C *reg = acb->pmuC;
1118 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1119 writel(intmask_org & mask, &reg->host_int_mask);
1120 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1121 }
Erich Chen1c57e862006-07-12 08:59:32 -07001122 }
1123}
1124
Nick Cheng76d78302008-02-04 23:53:24 -08001125static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001126 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1127{
1128 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1129 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001130 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001131 int arccdbsize = 0x30;
Nick Chengae52e7f2010-06-18 15:39:12 +08001132 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001133 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +08001134 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001135 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001136 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001137 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001138 arcmsr_cdb->TargetID = pcmd->device->id;
1139 arcmsr_cdb->LUN = pcmd->device->lun;
1140 arcmsr_cdb->Function = 1;
Nick Chengae52e7f2010-06-18 15:39:12 +08001141 arcmsr_cdb->Context = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001142 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001143
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001144 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001145 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001146 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001147 scsi_for_each_sg(pcmd, sg, nseg, i) {
1148 /* Get the physical address of the current data pointer */
1149 length = cpu_to_le32(sg_dma_len(sg));
1150 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1151 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1152 if (address_hi == 0) {
1153 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001154
Nick Chengcdd3cb12010-07-13 20:03:04 +08001155 pdma_sg->address = address_lo;
1156 pdma_sg->length = length;
1157 psge += sizeof (struct SG32ENTRY);
1158 arccdbsize += sizeof (struct SG32ENTRY);
1159 } else {
1160 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001161
Nick Chengcdd3cb12010-07-13 20:03:04 +08001162 pdma_sg->addresshigh = address_hi;
1163 pdma_sg->address = address_lo;
1164 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1165 psge += sizeof (struct SG64ENTRY);
1166 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001167 }
Erich Chen1c57e862006-07-12 08:59:32 -07001168 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001169 arcmsr_cdb->sgcount = (uint8_t)nseg;
1170 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1171 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1172 if ( arccdbsize > 256)
1173 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001174 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001175 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001176 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001177 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001178}
1179
1180static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1181{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001182 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
Erich Chen1c57e862006-07-12 08:59:32 -07001183 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001184 atomic_inc(&acb->ccboutstandingcount);
1185 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001186 switch (acb->adapter_type) {
1187 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001188 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001189
1190 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001191 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001192 &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001193 else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001194 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001195 }
1196 }
1197 break;
1198
1199 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001200 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001201 uint32_t ending_index, index = reg->postq_index;
1202
1203 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1204 writel(0, &reg->post_qbuffer[ending_index]);
1205 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001206 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
Nick Cheng1a4f5502007-09-13 17:26:40 +08001207 &reg->post_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001208 } else {
1209 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001210 }
1211 index++;
1212 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1213 reg->postq_index = index;
Nick Chengae52e7f2010-06-18 15:39:12 +08001214 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001215 }
1216 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001217 case ACB_ADAPTER_TYPE_C: {
1218 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1219 uint32_t ccb_post_stamp, arc_cdb_size;
1220
1221 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1222 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1223 if (acb->cdb_phyaddr_hi32) {
1224 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1225 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1226 } else {
1227 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1228 }
1229 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001230 }
Erich Chen1c57e862006-07-12 08:59:32 -07001231}
1232
Nick Cheng1a4f5502007-09-13 17:26:40 +08001233static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001234{
Al Viro80da1ad2007-10-29 05:08:28 +00001235 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001236 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1237 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001238 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001239 printk(KERN_NOTICE
1240 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1241 , acb->host->host_no);
1242 }
1243}
1244
1245static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1246{
Al Viro80da1ad2007-10-29 05:08:28 +00001247 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001248 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001249 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001250
Nick Chengcdd3cb12010-07-13 20:03:04 +08001251 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001252 printk(KERN_NOTICE
1253 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1254 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001255 }
1256}
1257
Nick Chengcdd3cb12010-07-13 20:03:04 +08001258static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1259{
1260 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1261 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1262 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1263 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1264 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1265 printk(KERN_NOTICE
1266 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1267 , pACB->host->host_no);
1268 }
1269 return;
1270}
Erich Chen1c57e862006-07-12 08:59:32 -07001271static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1272{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001273 switch (acb->adapter_type) {
1274 case ACB_ADAPTER_TYPE_A: {
1275 arcmsr_stop_hba_bgrb(acb);
1276 }
1277 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001278
Nick Cheng1a4f5502007-09-13 17:26:40 +08001279 case ACB_ADAPTER_TYPE_B: {
1280 arcmsr_stop_hbb_bgrb(acb);
1281 }
1282 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001283 case ACB_ADAPTER_TYPE_C: {
1284 arcmsr_stop_hbc_bgrb(acb);
1285 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001286 }
Erich Chen1c57e862006-07-12 08:59:32 -07001287}
1288
1289static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1290{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001291 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001292}
1293
Nick Cheng1a4f5502007-09-13 17:26:40 +08001294void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001295{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001296 switch (acb->adapter_type) {
1297 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001298 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001299 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1300 }
1301 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001302
Nick Cheng1a4f5502007-09-13 17:26:40 +08001303 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001304 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001305 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001306 }
1307 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001308 case ACB_ADAPTER_TYPE_C: {
1309 struct MessageUnit_C __iomem *reg = acb->pmuC;
1310 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1311 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001312 }
1313}
1314
1315static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1316{
1317 switch (acb->adapter_type) {
1318 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001319 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001320 /*
1321 ** push inbound doorbell tell iop, driver data write ok
1322 ** and wait reply on next hwinterrupt for next Qbuffer post
1323 */
1324 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1325 }
1326 break;
1327
1328 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001329 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001330 /*
1331 ** push inbound doorbell tell iop, driver data write ok
1332 ** and wait reply on next hwinterrupt for next Qbuffer post
1333 */
Nick Chengae52e7f2010-06-18 15:39:12 +08001334 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001335 }
1336 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001337 case ACB_ADAPTER_TYPE_C: {
1338 struct MessageUnit_C __iomem *reg = acb->pmuC;
1339 /*
1340 ** push inbound doorbell tell iop, driver data write ok
1341 ** and wait reply on next hwinterrupt for next Qbuffer post
1342 */
1343 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1344 }
1345 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001346 }
1347}
1348
Al Viro80da1ad2007-10-29 05:08:28 +00001349struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001350{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001351 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001352 switch (acb->adapter_type) {
1353
1354 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001355 struct MessageUnit_A __iomem *reg = acb->pmuA;
1356 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001357 }
1358 break;
1359
1360 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001361 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001362 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001363 }
1364 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001365 case ACB_ADAPTER_TYPE_C: {
1366 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1367 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1368 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001369 }
1370 return qbuffer;
1371}
1372
Al Viro80da1ad2007-10-29 05:08:28 +00001373static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001374{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001375 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001376 switch (acb->adapter_type) {
1377
1378 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001379 struct MessageUnit_A __iomem *reg = acb->pmuA;
1380 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001381 }
1382 break;
1383
1384 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001385 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001386 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001387 }
1388 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001389 case ACB_ADAPTER_TYPE_C: {
1390 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1391 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1392 }
1393
Nick Cheng1a4f5502007-09-13 17:26:40 +08001394 }
1395 return pqbuffer;
1396}
1397
1398static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1399{
Al Viro80da1ad2007-10-29 05:08:28 +00001400 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001401 struct QBUFFER *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001402 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001403 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001404 rqbuf_lastindex = acb->rqbuf_lastindex;
1405 rqbuf_firstindex = acb->rqbuf_firstindex;
1406 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001407 iop_data = (uint8_t __iomem *)prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001408 iop_len = prbuffer->data_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001409 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001410
1411 if (my_empty_len >= iop_len)
1412 {
1413 while (iop_len > 0) {
1414 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
Nick Chengcdd3cb12010-07-13 20:03:04 +08001415 memcpy(pQbuffer, iop_data, 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001416 rqbuf_lastindex++;
1417 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1418 iop_data++;
1419 iop_len--;
1420 }
1421 acb->rqbuf_lastindex = rqbuf_lastindex;
1422 arcmsr_iop_message_read(acb);
1423 }
1424
1425 else {
1426 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1427 }
1428}
1429
1430static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1431{
1432 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1433 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1434 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001435 struct QBUFFER __iomem *pwbuffer;
1436 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001437 int32_t allxfer_len = 0;
1438
1439 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1440 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1441 iop_data = (uint8_t __iomem *)pwbuffer->data;
1442
1443 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1444 (allxfer_len < 124)) {
1445 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1446 memcpy(iop_data, pQbuffer, 1);
1447 acb->wqbuf_firstindex++;
1448 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1449 iop_data++;
1450 allxfer_len++;
1451 }
1452 pwbuffer->data_len = allxfer_len;
1453
1454 arcmsr_iop_message_wrote(acb);
1455 }
1456
1457 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1458 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1459 }
1460}
1461
1462static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1463{
1464 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001465 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001466 outbound_doorbell = readl(&reg->outbound_doorbell);
1467 writel(outbound_doorbell, &reg->outbound_doorbell);
1468 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1469 arcmsr_iop2drv_data_wrote_handle(acb);
1470 }
1471
Nick Chengcdd3cb12010-07-13 20:03:04 +08001472 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001473 arcmsr_iop2drv_data_read_handle(acb);
1474 }
1475}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001476static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1477{
1478 uint32_t outbound_doorbell;
1479 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1480 /*
1481 *******************************************************************
1482 ** Maybe here we need to check wrqbuffer_lock is lock or not
1483 ** DOORBELL: din! don!
1484 ** check if there are any mail need to pack from firmware
1485 *******************************************************************
1486 */
1487 outbound_doorbell = readl(&reg->outbound_doorbell);
1488 writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
1489 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1490 arcmsr_iop2drv_data_wrote_handle(pACB);
1491 }
1492 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1493 arcmsr_iop2drv_data_read_handle(pACB);
1494 }
1495 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1496 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
1497 }
1498 return;
1499}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001500static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1501{
1502 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001503 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001504 struct ARCMSR_CDB *pARCMSR_CDB;
1505 struct CommandControlBlock *pCCB;
1506 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001507 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001508 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1509 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1510 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1511 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001512 }
1513}
1514
1515static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1516{
1517 uint32_t index;
1518 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001519 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001520 struct ARCMSR_CDB *pARCMSR_CDB;
1521 struct CommandControlBlock *pCCB;
1522 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001523 index = reg->doneq_index;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001524 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1525 writel(0, &reg->done_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001526 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1527 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1528 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1529 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001530 index++;
1531 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1532 reg->doneq_index = index;
1533 }
1534}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001535
1536static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1537{
1538 struct MessageUnit_C *phbcmu;
1539 struct ARCMSR_CDB *arcmsr_cdb;
1540 struct CommandControlBlock *ccb;
1541 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1542 int error;
1543
1544 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1545 /* areca cdb command done */
1546 /* Use correct offset and size for syncing */
1547
1548 while (readl(&phbcmu->host_int_status) &
1549 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1550 /* check if command done with no error*/
1551 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1552 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
1553 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1554 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1555 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1556 /* check if command done with no error */
1557 arcmsr_drain_donequeue(acb, ccb, error);
1558 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1559 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1560 break;
1561 }
1562 throttling++;
1563 }
1564}
Nick Cheng36b83de2010-05-17 11:22:42 +08001565/*
1566**********************************************************************************
1567** Handle a message interrupt
1568**
Nick Chengcdd3cb12010-07-13 20:03:04 +08001569** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08001570** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1571**********************************************************************************
1572*/
1573static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1574{
1575 struct MessageUnit_A *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001576 /*clear interrupt and message state*/
1577 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1578 schedule_work(&acb->arcmsr_do_message_isr_bh);
1579}
1580static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1581{
1582 struct MessageUnit_B *reg = acb->pmuB;
1583
1584 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001585 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001586 schedule_work(&acb->arcmsr_do_message_isr_bh);
1587}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001588/*
1589**********************************************************************************
1590** Handle a message interrupt
1591**
1592** The only message interrupt we expect is in response to a query for the
1593** current adapter config.
1594** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1595**********************************************************************************
1596*/
1597static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1598{
1599 struct MessageUnit_C *reg = acb->pmuC;
1600 /*clear interrupt and message state*/
1601 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1602 schedule_work(&acb->arcmsr_do_message_isr_bh);
1603}
1604
Nick Cheng1a4f5502007-09-13 17:26:40 +08001605static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1606{
1607 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001608 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001609 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001610 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001611 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1612 return 1;
1613 }
Erich Chen1c57e862006-07-12 08:59:32 -07001614 writel(outbound_intstatus, &reg->outbound_intstatus);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001615 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1616 arcmsr_hba_doorbell_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001617 }
1618 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001619 arcmsr_hba_postqueue_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001620 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001621 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001622 /* messenger of "driver to iop commands" */
1623 arcmsr_hba_message_isr(acb);
1624 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001625 return 0;
1626}
1627
1628static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1629{
1630 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001631 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001632 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001633 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001634 if (!outbound_doorbell)
1635 return 1;
1636
Nick Chengae52e7f2010-06-18 15:39:12 +08001637 writel(~outbound_doorbell, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001638 /*in case the last action of doorbell interrupt clearance is cached,
1639 this action can push HW to write down the clear bit*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001640 readl(reg->iop2drv_doorbell);
1641 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001642 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001643 arcmsr_iop2drv_data_wrote_handle(acb);
1644 }
1645 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1646 arcmsr_iop2drv_data_read_handle(acb);
1647 }
1648 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1649 arcmsr_hbb_postqueue_isr(acb);
1650 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001651 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001652 /* messenger of "driver to iop commands" */
1653 arcmsr_hbb_message_isr(acb);
1654 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001655 return 0;
1656}
1657
Nick Chengcdd3cb12010-07-13 20:03:04 +08001658static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1659{
1660 uint32_t host_interrupt_status;
1661 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1662 /*
1663 *********************************************
1664 ** check outbound intstatus
1665 *********************************************
1666 */
1667 host_interrupt_status = readl(&phbcmu->host_int_status);
1668 if (!host_interrupt_status) {
1669 /*it must be share irq*/
1670 return 1;
1671 }
1672 /* MU ioctl transfer doorbell interrupts*/
1673 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1674 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
1675 }
1676 /* MU post queue interrupts*/
1677 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1678 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
1679 }
1680 return 0;
1681}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001682static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1683{
1684 switch (acb->adapter_type) {
1685 case ACB_ADAPTER_TYPE_A: {
1686 if (arcmsr_handle_hba_isr(acb)) {
1687 return IRQ_NONE;
1688 }
1689 }
1690 break;
1691
1692 case ACB_ADAPTER_TYPE_B: {
1693 if (arcmsr_handle_hbb_isr(acb)) {
1694 return IRQ_NONE;
1695 }
1696 }
1697 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001698 case ACB_ADAPTER_TYPE_C: {
1699 if (arcmsr_handle_hbc_isr(acb)) {
1700 return IRQ_NONE;
1701 }
1702 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001703 }
Erich Chen1c57e862006-07-12 08:59:32 -07001704 return IRQ_HANDLED;
1705}
1706
1707static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1708{
1709 if (acb) {
1710 /* stop adapter background rebuild */
1711 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001712 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07001713 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001714 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001715 arcmsr_stop_adapter_bgrb(acb);
1716 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001717 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07001718 }
1719 }
1720}
1721
Nick Cheng1a4f5502007-09-13 17:26:40 +08001722void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001723{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001724 int32_t wqbuf_firstindex, wqbuf_lastindex;
1725 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001726 struct QBUFFER __iomem *pwbuffer;
1727 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001728 int32_t allxfer_len = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001729 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1730 iop_data = (uint8_t __iomem *)pwbuffer->data;
1731 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1732 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1733 wqbuf_firstindex = acb->wqbuf_firstindex;
1734 wqbuf_lastindex = acb->wqbuf_lastindex;
1735 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1736 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1737 memcpy(iop_data, pQbuffer, 1);
1738 wqbuf_firstindex++;
1739 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1740 iop_data++;
1741 allxfer_len++;
1742 }
1743 acb->wqbuf_firstindex = wqbuf_firstindex;
1744 pwbuffer->data_len = allxfer_len;
1745 arcmsr_iop_message_wrote(acb);
1746 }
1747}
1748
Nick Cheng36b83de2010-05-17 11:22:42 +08001749static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001750 struct scsi_cmnd *cmd)
1751{
Erich Chen1c57e862006-07-12 08:59:32 -07001752 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1753 int retvalue = 0, transfer_len = 0;
1754 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001755 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07001756 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1757 (uint32_t ) cmd->cmnd[6] << 16 |
1758 (uint32_t ) cmd->cmnd[7] << 8 |
1759 (uint32_t ) cmd->cmnd[8];
Nick Cheng1a4f5502007-09-13 17:26:40 +08001760 /* 4 bytes: Areca io control code */
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001761 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02001762 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001763 if (scsi_sg_count(cmd) > 1) {
1764 retvalue = ARCMSR_MESSAGE_FAIL;
1765 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07001766 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001767 transfer_len += sg->length;
1768
Erich Chen1c57e862006-07-12 08:59:32 -07001769 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1770 retvalue = ARCMSR_MESSAGE_FAIL;
1771 goto message_out;
1772 }
1773 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1774 switch(controlcode) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001775
Erich Chen1c57e862006-07-12 08:59:32 -07001776 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001777 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001778 uint8_t *pQbuffer, *ptmpQbuffer;
1779 int32_t allxfer_len = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001780
Daniel Drake69e562c2008-02-20 13:29:05 +00001781 ver_addr = kmalloc(1032, GFP_ATOMIC);
1782 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001783 retvalue = ARCMSR_MESSAGE_FAIL;
1784 goto message_out;
1785 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001786
Daniel Drake69e562c2008-02-20 13:29:05 +00001787 ptmpQbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001788 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1789 && (allxfer_len < 1031)) {
1790 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1791 memcpy(ptmpQbuffer, pQbuffer, 1);
1792 acb->rqbuf_firstindex++;
1793 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1794 ptmpQbuffer++;
1795 allxfer_len++;
1796 }
1797 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Erich Chen1c57e862006-07-12 08:59:32 -07001798
Al Viro80da1ad2007-10-29 05:08:28 +00001799 struct QBUFFER __iomem *prbuffer;
1800 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001801 int32_t iop_len;
1802
1803 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1804 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001805 iop_data = prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001806 iop_len = readl(&prbuffer->data_len);
1807 while (iop_len > 0) {
1808 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1809 acb->rqbuf_lastindex++;
1810 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1811 iop_data++;
1812 iop_len--;
Erich Chen1c57e862006-07-12 08:59:32 -07001813 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001814 arcmsr_iop_message_read(acb);
1815 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001816 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001817 pcmdmessagefld->cmdmessage.Length = allxfer_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001818 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001819 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001820 }else{
1821 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Chengae52e7f2010-06-18 15:39:12 +08001822 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001823 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001824 }
1825 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001826
Nick Cheng1a4f5502007-09-13 17:26:40 +08001827 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001828 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001829 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1830 uint8_t *pQbuffer, *ptmpuserbuffer;
1831
Daniel Drake69e562c2008-02-20 13:29:05 +00001832 ver_addr = kmalloc(1032, GFP_ATOMIC);
1833 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001834 retvalue = ARCMSR_MESSAGE_FAIL;
1835 goto message_out;
1836 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001837 if(acb->fw_flag == FW_DEADLOCK) {
1838 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Cheng36b83de2010-05-17 11:22:42 +08001839 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001840 }else{
1841 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Chengae52e7f2010-06-18 15:39:12 +08001842 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001843 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001844 ptmpuserbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001845 user_len = pcmdmessagefld->cmdmessage.Length;
1846 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1847 wqbuf_lastindex = acb->wqbuf_lastindex;
1848 wqbuf_firstindex = acb->wqbuf_firstindex;
1849 if (wqbuf_lastindex != wqbuf_firstindex) {
1850 struct SENSE_DATA *sensebuffer =
1851 (struct SENSE_DATA *)cmd->sense_buffer;
1852 arcmsr_post_ioctldata2iop(acb);
1853 /* has error report sensedata */
1854 sensebuffer->ErrorCode = 0x70;
1855 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1856 sensebuffer->AdditionalSenseLength = 0x0A;
1857 sensebuffer->AdditionalSenseCode = 0x20;
1858 sensebuffer->Valid = 1;
1859 retvalue = ARCMSR_MESSAGE_FAIL;
1860 } else {
1861 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1862 &(ARCMSR_MAX_QBUFFER - 1);
1863 if (my_empty_len >= user_len) {
1864 while (user_len > 0) {
1865 pQbuffer =
1866 &acb->wqbuffer[acb->wqbuf_lastindex];
1867 memcpy(pQbuffer, ptmpuserbuffer, 1);
1868 acb->wqbuf_lastindex++;
1869 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1870 ptmpuserbuffer++;
1871 user_len--;
1872 }
1873 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1874 acb->acb_flags &=
1875 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1876 arcmsr_post_ioctldata2iop(acb);
1877 }
1878 } else {
1879 /* has error report sensedata */
Erich Chen1c57e862006-07-12 08:59:32 -07001880 struct SENSE_DATA *sensebuffer =
1881 (struct SENSE_DATA *)cmd->sense_buffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001882 sensebuffer->ErrorCode = 0x70;
1883 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1884 sensebuffer->AdditionalSenseLength = 0x0A;
1885 sensebuffer->AdditionalSenseCode = 0x20;
1886 sensebuffer->Valid = 1;
1887 retvalue = ARCMSR_MESSAGE_FAIL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001888 }
Erich Chen1c57e862006-07-12 08:59:32 -07001889 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001890 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001891 }
1892 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001893
Erich Chen1c57e862006-07-12 08:59:32 -07001894 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001895 uint8_t *pQbuffer = acb->rqbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001896 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1897 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1898 arcmsr_iop_message_read(acb);
1899 }
1900 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1901 acb->rqbuf_firstindex = 0;
1902 acb->rqbuf_lastindex = 0;
1903 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001904 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001905 pcmdmessagefld->cmdmessage.ReturnCode =
1906 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001907 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001908 pcmdmessagefld->cmdmessage.ReturnCode =
1909 ARCMSR_MESSAGE_RETURNCODE_OK;
1910 }
Erich Chen1c57e862006-07-12 08:59:32 -07001911 }
1912 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001913
Erich Chen1c57e862006-07-12 08:59:32 -07001914 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001915 uint8_t *pQbuffer = acb->wqbuffer;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001916 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001917 pcmdmessagefld->cmdmessage.ReturnCode =
1918 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001919 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001920 pcmdmessagefld->cmdmessage.ReturnCode =
1921 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001922 }
Erich Chen1c57e862006-07-12 08:59:32 -07001923
Nick Cheng1a4f5502007-09-13 17:26:40 +08001924 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1925 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1926 arcmsr_iop_message_read(acb);
1927 }
1928 acb->acb_flags |=
1929 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1930 ACB_F_MESSAGE_WQBUFFER_READED);
1931 acb->wqbuf_firstindex = 0;
1932 acb->wqbuf_lastindex = 0;
1933 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Erich Chen1c57e862006-07-12 08:59:32 -07001934 }
1935 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001936
Erich Chen1c57e862006-07-12 08:59:32 -07001937 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001938 uint8_t *pQbuffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001939
Nick Cheng1a4f5502007-09-13 17:26:40 +08001940 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1941 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1942 arcmsr_iop_message_read(acb);
1943 }
1944 acb->acb_flags |=
1945 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1946 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1947 | ACB_F_MESSAGE_WQBUFFER_READED);
1948 acb->rqbuf_firstindex = 0;
1949 acb->rqbuf_lastindex = 0;
1950 acb->wqbuf_firstindex = 0;
1951 acb->wqbuf_lastindex = 0;
1952 pQbuffer = acb->rqbuffer;
1953 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1954 pQbuffer = acb->wqbuffer;
1955 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001956 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001957 pcmdmessagefld->cmdmessage.ReturnCode =
1958 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001959 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001960 pcmdmessagefld->cmdmessage.ReturnCode =
1961 ARCMSR_MESSAGE_RETURNCODE_OK;
1962 }
Erich Chen1c57e862006-07-12 08:59:32 -07001963 }
1964 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001965
Erich Chen1c57e862006-07-12 08:59:32 -07001966 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001967 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001968 pcmdmessagefld->cmdmessage.ReturnCode =
1969 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001970 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001971 pcmdmessagefld->cmdmessage.ReturnCode =
1972 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07001973 }
1974 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08001975 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001976 case ARCMSR_MESSAGE_SAY_HELLO: {
1977 int8_t *hello_string = "Hello! I am ARCMSR";
Nick Chengcdd3cb12010-07-13 20:03:04 +08001978 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001979 pcmdmessagefld->cmdmessage.ReturnCode =
1980 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001981 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001982 pcmdmessagefld->cmdmessage.ReturnCode =
1983 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001984 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001985 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1986 , (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07001987 }
1988 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001989
Erich Chen1c57e862006-07-12 08:59:32 -07001990 case ARCMSR_MESSAGE_SAY_GOODBYE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001991 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001992 pcmdmessagefld->cmdmessage.ReturnCode =
1993 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001994 }
Erich Chen1c57e862006-07-12 08:59:32 -07001995 arcmsr_iop_parking(acb);
1996 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001997
Erich Chen1c57e862006-07-12 08:59:32 -07001998 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001999 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002000 pcmdmessagefld->cmdmessage.ReturnCode =
2001 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08002002 }
Erich Chen1c57e862006-07-12 08:59:32 -07002003 arcmsr_flush_adapter_cache(acb);
2004 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002005
Erich Chen1c57e862006-07-12 08:59:32 -07002006 default:
2007 retvalue = ARCMSR_MESSAGE_FAIL;
2008 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002009 message_out:
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002010 sg = scsi_sglist(cmd);
2011 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07002012 return retvalue;
2013}
2014
2015static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2016{
2017 struct list_head *head = &acb->ccb_free_list;
2018 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f2010-06-18 15:39:12 +08002019 unsigned long flags;
2020 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002021 if (!list_empty(head)) {
2022 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f2010-06-18 15:39:12 +08002023 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002024 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002025 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2026 return 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002027 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002028 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002029 return ccb;
2030}
2031
2032static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2033 struct scsi_cmnd *cmd)
2034{
2035 switch (cmd->cmnd[0]) {
2036 case INQUIRY: {
2037 unsigned char inqdata[36];
2038 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002039 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002040
2041 if (cmd->device->lun) {
2042 cmd->result = (DID_TIME_OUT << 16);
2043 cmd->scsi_done(cmd);
2044 return;
2045 }
2046 inqdata[0] = TYPE_PROCESSOR;
2047 /* Periph Qualifier & Periph Dev Type */
2048 inqdata[1] = 0;
2049 /* rem media bit & Dev Type Modifier */
2050 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002051 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002052 inqdata[4] = 31;
2053 /* length of additional data */
2054 strncpy(&inqdata[8], "Areca ", 8);
2055 /* Vendor Identification */
2056 strncpy(&inqdata[16], "RAID controller ", 16);
2057 /* Product Identification */
2058 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002059
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002060 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02002061 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002062
Erich Chen1c57e862006-07-12 08:59:32 -07002063 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002064 sg = scsi_sglist(cmd);
2065 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07002066
Erich Chen1c57e862006-07-12 08:59:32 -07002067 cmd->scsi_done(cmd);
2068 }
2069 break;
2070 case WRITE_BUFFER:
2071 case READ_BUFFER: {
2072 if (arcmsr_iop_message_xfer(acb, cmd))
2073 cmd->result = (DID_ERROR << 16);
2074 cmd->scsi_done(cmd);
2075 }
2076 break;
2077 default:
2078 cmd->scsi_done(cmd);
2079 }
2080}
2081
Jeff Garzikf2812332010-11-16 02:10:29 -05002082static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002083 void (* done)(struct scsi_cmnd *))
2084{
2085 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002086 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002087 struct CommandControlBlock *ccb;
2088 int target = cmd->device->id;
2089 int lun = cmd->device->lun;
Nick Cheng36b83de2010-05-17 11:22:42 +08002090 uint8_t scsicmd = cmd->cmnd[0];
Erich Chen1c57e862006-07-12 08:59:32 -07002091 cmd->scsi_done = done;
2092 cmd->host_scribble = NULL;
2093 cmd->result = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002094 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2095 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2096 cmd->result = (DID_NO_CONNECT << 16);
Nick Cheng36b83de2010-05-17 11:22:42 +08002097 }
2098 cmd->scsi_done(cmd);
2099 return 0;
2100 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002101 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002102 /* virtual device for iop message transfer */
2103 arcmsr_handle_virtual_command(acb, cmd);
2104 return 0;
2105 }
Erich Chen1c57e862006-07-12 08:59:32 -07002106 if (atomic_read(&acb->ccboutstandingcount) >=
2107 ARCMSR_MAX_OUTSTANDING_CMD)
2108 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002109 if ((scsicmd == SCSI_CMD_ARECA_SPECIFIC)) {
2110 printk(KERN_NOTICE "Receiveing SCSI_CMD_ARECA_SPECIFIC command..\n");
2111 return 0;
2112 }
Erich Chen1c57e862006-07-12 08:59:32 -07002113 ccb = arcmsr_get_freeccb(acb);
2114 if (!ccb)
2115 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002116 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002117 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2118 cmd->scsi_done(cmd);
2119 return 0;
2120 }
Erich Chen1c57e862006-07-12 08:59:32 -07002121 arcmsr_post_ccb(acb, ccb);
2122 return 0;
2123}
2124
Jeff Garzikf2812332010-11-16 02:10:29 -05002125static DEF_SCSI_QCMD(arcmsr_queue_command)
2126
Nick Chengae52e7f2010-06-18 15:39:12 +08002127static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002128{
Al Viro80da1ad2007-10-29 05:08:28 +00002129 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002130 char *acb_firm_model = acb->firm_model;
2131 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002132 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002133 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2134 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002135 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002136 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002137 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002138 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002139 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2140 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002141 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002142 }
Erich Chen1c57e862006-07-12 08:59:32 -07002143 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002144 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002145 *acb_firm_model = readb(iop_firm_model);
2146 acb_firm_model++;
2147 iop_firm_model++;
2148 count--;
2149 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002150
Erich Chen1c57e862006-07-12 08:59:32 -07002151 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002152 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002153 *acb_firm_version = readb(iop_firm_version);
2154 acb_firm_version++;
2155 iop_firm_version++;
2156 count--;
2157 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002158
Nick Chengcdd3cb12010-07-13 20:03:04 +08002159 count=16;
2160 while(count){
2161 *acb_device_map = readb(iop_device_map);
2162 acb_device_map++;
2163 iop_device_map++;
2164 count--;
2165 }
2166 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengae52e7f2010-06-18 15:39:12 +08002167 acb->host->host_no,
2168 acb->firm_version,
2169 acb->firm_model);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002170 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002171 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2172 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2173 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2174 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002175 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2176 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002177}
Nick Chengae52e7f2010-06-18 15:39:12 +08002178static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002179{
Al Viro80da1ad2007-10-29 05:08:28 +00002180 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002181 struct pci_dev *pdev = acb->pdev;
2182 void *dma_coherent;
2183 dma_addr_t dma_coherent_handle;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002184 char *acb_firm_model = acb->firm_model;
2185 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002186 char *acb_device_map = acb->device_map;
Nick Chengae52e7f2010-06-18 15:39:12 +08002187 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002188 /*firm_model,15,60-67*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002189 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002190 /*firm_version,17,68-83*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002191 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002192 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002193 int count;
Nick Chengae52e7f2010-06-18 15:39:12 +08002194 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002195 if (!dma_coherent){
Nick Chengae52e7f2010-06-18 15:39:12 +08002196 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2197 return false;
2198 }
2199 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2200 reg = (struct MessageUnit_B *)dma_coherent;
2201 acb->pmuB = reg;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002202 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
Nick Chengae52e7f2010-06-18 15:39:12 +08002203 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2204 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2205 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2206 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2207 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2208 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2209 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2210 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2211 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002212
Nick Chengae52e7f2010-06-18 15:39:12 +08002213 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002214 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002215 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2216 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002217 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002218 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002219 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002220 while (count){
2221 *acb_firm_model = readb(iop_firm_model);
2222 acb_firm_model++;
2223 iop_firm_model++;
2224 count--;
2225 }
2226 count = 16;
2227 while (count){
2228 *acb_firm_version = readb(iop_firm_version);
2229 acb_firm_version++;
2230 iop_firm_version++;
2231 count--;
2232 }
2233
2234 count = 16;
2235 while(count){
2236 *acb_device_map = readb(iop_device_map);
2237 acb_device_map++;
2238 iop_device_map++;
2239 count--;
2240 }
2241
2242 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2243 acb->host->host_no,
2244 acb->firm_version,
2245 acb->firm_model);
2246
2247 acb->signature = readl(&reg->message_rwbuffer[1]);
2248 /*firm_signature,1,00-03*/
2249 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2250 /*firm_request_len,1,04-07*/
2251 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2252 /*firm_numbers_queue,2,08-11*/
2253 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2254 /*firm_sdram_size,3,12-15*/
2255 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2256 /*firm_ide_channels,4,16-19*/
2257 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2258 /*firm_ide_channels,4,16-19*/
2259 return true;
2260}
2261
2262static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2263{
2264 uint32_t intmask_org, Index, firmware_state = 0;
2265 struct MessageUnit_C *reg = pACB->pmuC;
2266 char *acb_firm_model = pACB->firm_model;
2267 char *acb_firm_version = pACB->firm_version;
2268 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2269 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2270 int count;
2271 /* disable all outbound interrupt */
2272 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2273 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2274 /* wait firmware ready */
2275 do {
2276 firmware_state = readl(&reg->outbound_msgaddr1);
2277 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2278 /* post "get config" instruction */
2279 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2280 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2281 /* wait message ready */
2282 for (Index = 0; Index < 2000; Index++) {
2283 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2284 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2285 break;
2286 }
2287 udelay(10);
2288 } /*max 1 seconds*/
2289 if (Index >= 2000) {
2290 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2291 miscellaneous data' timeout \n", pACB->host->host_no);
2292 return false;
2293 }
2294 count = 8;
Nick Chengae52e7f2010-06-18 15:39:12 +08002295 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002296 *acb_firm_model = readb(iop_firm_model);
2297 acb_firm_model++;
2298 iop_firm_model++;
2299 count--;
2300 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002301 count = 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002302 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002303 *acb_firm_version = readb(iop_firm_version);
2304 acb_firm_version++;
2305 iop_firm_version++;
2306 count--;
2307 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002308 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002309 pACB->host->host_no,
2310 pACB->firm_version,
2311 pACB->firm_model);
2312 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2313 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2314 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2315 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2316 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2317 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002318 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002319}
Nick Chengae52e7f2010-06-18 15:39:12 +08002320static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002321{
Nick Chengae52e7f2010-06-18 15:39:12 +08002322 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2323 return arcmsr_get_hba_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002324 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
Nick Chengae52e7f2010-06-18 15:39:12 +08002325 return arcmsr_get_hbb_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002326 else
2327 return arcmsr_get_hbc_config(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002328}
2329
Nick Chengae52e7f2010-06-18 15:39:12 +08002330static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002331 struct CommandControlBlock *poll_ccb)
2332{
Al Viro80da1ad2007-10-29 05:08:28 +00002333 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002334 struct CommandControlBlock *ccb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002335 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002336 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002337 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002338 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002339 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002340 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002341 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002342 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2343 while (1) {
2344 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002345 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002346 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002347 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002348 }else {
2349 msleep(25);
2350 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002351 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002352 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002353 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002354 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002355 }
2356 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002357 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2358 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002359 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2360 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2361 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2362 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002363 " poll command abort successfully \n"
2364 , acb->host->host_no
2365 , ccb->pcmd->device->id
2366 , ccb->pcmd->device->lun
2367 , ccb);
2368 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002369 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002370 continue;
2371 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002372 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2373 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002374 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002375 , acb->host->host_no
2376 , ccb
2377 , atomic_read(&acb->ccboutstandingcount));
2378 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002379 }
2380 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2381 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002382 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002383 return rtn;
2384}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002385
Nick Chengae52e7f2010-06-18 15:39:12 +08002386static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002387 struct CommandControlBlock *poll_ccb)
2388{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002389 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002390 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002391 struct CommandControlBlock *ccb;
2392 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002393 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002394 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002395 polling_hbb_ccb_retry:
Nick Chengcdd3cb12010-07-13 20:03:04 +08002396 poll_count++;
2397 /* clear doorbell interrupt */
Nick Chengae52e7f2010-06-18 15:39:12 +08002398 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002399 while(1){
2400 index = reg->doneq_index;
2401 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2402 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002403 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002404 break;
2405 }else {
2406 msleep(25);
2407 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002408 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002409 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002410 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002411 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002412 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002413 }
2414 writel(0, &reg->done_qbuffer[index]);
2415 index++;
2416 /*if last index number set it to 0 */
2417 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2418 reg->doneq_index = index;
2419 /* check if command done with no error*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002420 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2421 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002422 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2423 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2424 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002425 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2426 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08002427 ,acb->host->host_no
2428 ,ccb->pcmd->device->id
2429 ,ccb->pcmd->device->lun
2430 ,ccb);
2431 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002432 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002433 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002434 }
2435 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2436 " command done ccb = '0x%p'"
2437 "ccboutstandingcount = %d \n"
2438 , acb->host->host_no
2439 , ccb
2440 , atomic_read(&acb->ccboutstandingcount));
2441 continue;
2442 }
2443 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2444 arcmsr_report_ccb_state(acb, ccb, error);
2445 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002446 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002447}
2448
Nick Chengcdd3cb12010-07-13 20:03:04 +08002449static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2450{
2451 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2452 uint32_t flag_ccb, ccb_cdb_phy;
2453 struct ARCMSR_CDB *arcmsr_cdb;
2454 bool error;
2455 struct CommandControlBlock *pCCB;
2456 uint32_t poll_ccb_done = 0, poll_count = 0;
2457 int rtn;
2458polling_hbc_ccb_retry:
2459 poll_count++;
2460 while (1) {
2461 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2462 if (poll_ccb_done) {
2463 rtn = SUCCESS;
2464 break;
2465 } else {
2466 msleep(25);
2467 if (poll_count > 100) {
2468 rtn = FAILED;
2469 break;
2470 }
2471 goto polling_hbc_ccb_retry;
2472 }
2473 }
2474 flag_ccb = readl(&reg->outbound_queueport_low);
2475 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2476 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2477 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2478 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2479 /* check ifcommand done with no error*/
2480 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2481 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2482 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2483 " poll command abort successfully \n"
2484 , acb->host->host_no
2485 , pCCB->pcmd->device->id
2486 , pCCB->pcmd->device->lun
2487 , pCCB);
2488 pCCB->pcmd->result = DID_ABORT << 16;
2489 arcmsr_ccb_complete(pCCB);
2490 continue;
2491 }
2492 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2493 " command done ccb = '0x%p'"
2494 "ccboutstandingcount = %d \n"
2495 , acb->host->host_no
2496 , pCCB
2497 , atomic_read(&acb->ccboutstandingcount));
2498 continue;
2499 }
2500 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2501 arcmsr_report_ccb_state(acb, pCCB, error);
2502 }
2503 return rtn;
2504}
Nick Chengae52e7f2010-06-18 15:39:12 +08002505static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002506 struct CommandControlBlock *poll_ccb)
2507{
Nick Chengae52e7f2010-06-18 15:39:12 +08002508 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002509 switch (acb->adapter_type) {
2510
2511 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002512 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002513 }
2514 break;
2515
2516 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002517 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002518 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002519 break;
2520 case ACB_ADAPTER_TYPE_C: {
2521 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2522 }
Erich Chen1c57e862006-07-12 08:59:32 -07002523 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002524 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07002525}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002526
2527static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002528{
Nick Chengae52e7f2010-06-18 15:39:12 +08002529 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002530 dma_addr_t dma_coherent_handle;
2531 /*
2532 ********************************************************************
2533 ** here we need to tell iop 331 our freeccb.HighPart
2534 ** if freeccb.HighPart is not zero
2535 ********************************************************************
2536 */
2537 dma_coherent_handle = acb->dma_coherent_handle;
2538 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
Nick Chengae52e7f2010-06-18 15:39:12 +08002539 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002540 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002541 /*
2542 ***********************************************************************
2543 ** if adapter type B, set window of "post command Q"
2544 ***********************************************************************
2545 */
2546 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002547
Nick Cheng1a4f5502007-09-13 17:26:40 +08002548 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002549 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00002550 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002551 uint32_t intmask_org;
2552 intmask_org = arcmsr_disable_outbound_ints(acb);
2553 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2554 &reg->message_rwbuffer[0]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002555 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002556 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2557 &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002558 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002559 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2560 part physical address timeout\n",
2561 acb->host->host_no);
2562 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002563 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002564 arcmsr_enable_outbound_ints(acb, intmask_org);
2565 }
2566 }
2567 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002568
Nick Cheng1a4f5502007-09-13 17:26:40 +08002569 case ACB_ADAPTER_TYPE_B: {
2570 unsigned long post_queue_phyaddr;
Al Viro80da1ad2007-10-29 05:08:28 +00002571 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002572
Al Viro80da1ad2007-10-29 05:08:28 +00002573 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002574 uint32_t intmask_org;
2575 intmask_org = arcmsr_disable_outbound_ints(acb);
2576 reg->postq_index = 0;
2577 reg->doneq_index = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002578 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002579 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002580 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2581 acb->host->host_no);
2582 return 1;
2583 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002584 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2585 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002586 /* driver "set config" signature */
2587 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2588 /* normal should be zero */
Nick Chengae52e7f2010-06-18 15:39:12 +08002589 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002590 /* postQ size (256 + 8)*4 */
2591 writel(post_queue_phyaddr, rwbuffer++);
2592 /* doneQ size (256 + 8)*4 */
2593 writel(post_queue_phyaddr + 1056, rwbuffer++);
2594 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2595 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002596
Nick Chengae52e7f2010-06-18 15:39:12 +08002597 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002598 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002599 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2600 timeout \n",acb->host->host_no);
2601 return 1;
2602 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002603 arcmsr_hbb_enable_driver_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002604 arcmsr_enable_outbound_ints(acb, intmask_org);
2605 }
2606 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002607 case ACB_ADAPTER_TYPE_C: {
2608 if (cdb_phyaddr_hi32 != 0) {
2609 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2610
2611 if (cdb_phyaddr_hi32 != 0) {
2612 unsigned char Retries = 0x00;
2613 do {
2614 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32);
2615 } while (Retries++ < 100);
2616 }
2617 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2618 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2619 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2620 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2621 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2622 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2623 timeout \n", acb->host->host_no);
2624 return 1;
2625 }
2626 }
2627 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002628 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002629 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002630}
2631
Nick Cheng1a4f5502007-09-13 17:26:40 +08002632static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2633{
2634 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002635 switch (acb->adapter_type) {
2636
2637 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002638 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002639 do {
2640 firmware_state = readl(&reg->outbound_msgaddr1);
2641 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2642 }
2643 break;
2644
2645 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002646 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002647 do {
Nick Chengae52e7f2010-06-18 15:39:12 +08002648 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002649 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f2010-06-18 15:39:12 +08002650 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002651 }
2652 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002653 case ACB_ADAPTER_TYPE_C: {
2654 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2655 do {
2656 firmware_state = readl(&reg->outbound_msgaddr1);
2657 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2658 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002659 }
2660}
2661
Nick Cheng36b83de2010-05-17 11:22:42 +08002662static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2663{
2664 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002665 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2666 return;
2667 } else {
2668 acb->fw_flag = FW_NORMAL;
2669 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2670 atomic_set(&acb->rq_map_token, 16);
2671 }
2672 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2673 if (atomic_dec_and_test(&acb->rq_map_token))
2674 return;
2675 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2676 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2677 }
2678 return;
2679}
2680
2681static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2682{
2683 struct MessageUnit_B __iomem *reg = acb->pmuB;
2684 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2685 return;
2686 } else {
2687 acb->fw_flag = FW_NORMAL;
2688 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2689 atomic_set(&acb->rq_map_token,16);
2690 }
2691 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2692 if(atomic_dec_and_test(&acb->rq_map_token))
2693 return;
2694 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2695 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2696 }
2697 return;
2698}
2699
2700static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2701{
2702 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f2010-06-18 15:39:12 +08002703 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
2704 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002705 } else {
Nick Chengae52e7f2010-06-18 15:39:12 +08002706 acb->fw_flag = FW_NORMAL;
2707 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002708 atomic_set(&acb->rq_map_token, 16);
2709 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002710 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2711 if (atomic_dec_and_test(&acb->rq_map_token))
2712 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002713 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002714 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2715 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08002716 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002717 return;
2718}
2719
2720static void arcmsr_request_device_map(unsigned long pacb)
2721{
2722 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
Nick Cheng36b83de2010-05-17 11:22:42 +08002723 switch (acb->adapter_type) {
2724 case ACB_ADAPTER_TYPE_A: {
2725 arcmsr_request_hba_device_map(acb);
2726 }
2727 break;
2728 case ACB_ADAPTER_TYPE_B: {
2729 arcmsr_request_hbb_device_map(acb);
2730 }
2731 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002732 case ACB_ADAPTER_TYPE_C: {
2733 arcmsr_request_hbc_device_map(acb);
2734 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002735 }
2736}
2737
Nick Cheng1a4f5502007-09-13 17:26:40 +08002738static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2739{
Al Viro80da1ad2007-10-29 05:08:28 +00002740 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002741 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2742 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002743 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002744 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2745 rebulid' timeout \n", acb->host->host_no);
2746 }
2747}
2748
2749static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2750{
Al Viro80da1ad2007-10-29 05:08:28 +00002751 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002752 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002753 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002754 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002755 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2756 rebulid' timeout \n",acb->host->host_no);
2757 }
2758}
2759
Nick Chengcdd3cb12010-07-13 20:03:04 +08002760static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2761{
2762 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2763 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2764 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2765 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2766 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2767 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2768 rebulid' timeout \n", pACB->host->host_no);
2769 }
2770 return;
2771}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002772static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2773{
2774 switch (acb->adapter_type) {
2775 case ACB_ADAPTER_TYPE_A:
2776 arcmsr_start_hba_bgrb(acb);
2777 break;
2778 case ACB_ADAPTER_TYPE_B:
2779 arcmsr_start_hbb_bgrb(acb);
2780 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002781 case ACB_ADAPTER_TYPE_C:
2782 arcmsr_start_hbc_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002783 }
2784}
2785
2786static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2787{
2788 switch (acb->adapter_type) {
2789 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002790 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002791 uint32_t outbound_doorbell;
2792 /* empty doorbell Qbuffer if door bell ringed */
2793 outbound_doorbell = readl(&reg->outbound_doorbell);
2794 /*clear doorbell interrupt */
2795 writel(outbound_doorbell, &reg->outbound_doorbell);
2796 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2797 }
2798 break;
2799
2800 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002801 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002802 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002803 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2804 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002805 /* let IOP know data has been read */
2806 }
2807 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002808 case ACB_ADAPTER_TYPE_C: {
2809 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2810 uint32_t outbound_doorbell;
2811 /* empty doorbell Qbuffer if door bell ringed */
2812 outbound_doorbell = readl(&reg->outbound_doorbell);
2813 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2814 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2815 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002816 }
2817}
Erich Chen1c57e862006-07-12 08:59:32 -07002818
Nick Cheng76d78302008-02-04 23:53:24 -08002819static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2820{
2821 switch (acb->adapter_type) {
2822 case ACB_ADAPTER_TYPE_A:
2823 return;
2824 case ACB_ADAPTER_TYPE_B:
2825 {
2826 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002827 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002828 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08002829 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2830 return;
2831 }
2832 }
2833 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002834 case ACB_ADAPTER_TYPE_C:
2835 return;
Nick Cheng76d78302008-02-04 23:53:24 -08002836 }
2837 return;
2838}
2839
Nick Cheng36b83de2010-05-17 11:22:42 +08002840static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2841{
2842 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08002843 int i, count = 0;
2844 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2845 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
2846 u32 temp = 0;
Nick Cheng36b83de2010-05-17 11:22:42 +08002847 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08002848 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08002849 for (i = 0; i < 64; i++) {
2850 pci_read_config_byte(acb->pdev, i, &value[i]);
2851 }
2852 /* hardware reset signal */
Nick Chengae52e7f2010-06-18 15:39:12 +08002853 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002854 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2855 } else if ((acb->dev_id == 0x1880)) {
2856 do {
2857 count++;
2858 writel(0xF, &pmuC->write_sequence);
2859 writel(0x4, &pmuC->write_sequence);
2860 writel(0xB, &pmuC->write_sequence);
2861 writel(0x2, &pmuC->write_sequence);
2862 writel(0x7, &pmuC->write_sequence);
2863 writel(0xD, &pmuC->write_sequence);
2864 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
2865 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Nick Chengae52e7f2010-06-18 15:39:12 +08002866 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002867 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f2010-06-18 15:39:12 +08002868 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002869 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08002870 /* write back pci config data */
2871 for (i = 0; i < 64; i++) {
2872 pci_write_config_byte(acb->pdev, i, value[i]);
2873 }
2874 msleep(1000);
2875 return;
2876}
Erich Chen1c57e862006-07-12 08:59:32 -07002877static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2878{
Nick Cheng1a4f5502007-09-13 17:26:40 +08002879 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002880 /* disable all outbound interrupt */
2881 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002882 arcmsr_wait_firmware_ready(acb);
2883 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002884 /*start background rebuild*/
2885 arcmsr_start_adapter_bgrb(acb);
2886 /* empty doorbell Qbuffer if door bell ringed */
2887 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002888 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002889 /* enable outbound Post Queue,outbound doorbell Interrupt */
2890 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002891 acb->acb_flags |= ACB_F_IOP_INITED;
2892}
2893
Nick Cheng36b83de2010-05-17 11:22:42 +08002894static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002895{
Erich Chen1c57e862006-07-12 08:59:32 -07002896 struct CommandControlBlock *ccb;
2897 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08002898 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07002899 int i = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002900 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07002901 /* disable all outbound interrupt */
2902 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08002903 /* talk to iop 331 outstanding command aborted */
2904 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002905 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08002906 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002907 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2908 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002909 if (ccb->startdone == ARCMSR_CCB_START) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002910 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002911 }
2912 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002913 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07002914 /* enable all outbound interrupt */
2915 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08002916 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002917 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002918 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002919}
2920
2921static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2922{
2923 struct AdapterControlBlock *acb =
2924 (struct AdapterControlBlock *)cmd->device->host->hostdata;
Nick Chengae52e7f2010-06-18 15:39:12 +08002925 uint32_t intmask_org, outbound_doorbell;
2926 int retry_count = 0;
2927 int rtn = FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08002928 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002929 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08002930 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08002931
Nick Chengcdd3cb12010-07-13 20:03:04 +08002932 switch(acb->adapter_type){
2933 case ACB_ADAPTER_TYPE_A:{
2934 if (acb->acb_flags & ACB_F_BUS_RESET){
Nick Chengae52e7f2010-06-18 15:39:12 +08002935 long timeout;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002936 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2937 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
Nick Chengae52e7f2010-06-18 15:39:12 +08002938 if (timeout) {
2939 return SUCCESS;
2940 }
2941 }
2942 acb->acb_flags |= ACB_F_BUS_RESET;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002943 if (!arcmsr_iop_reset(acb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002944 struct MessageUnit_A __iomem *reg;
2945 reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002946 arcmsr_hardware_reset(acb);
2947 acb->acb_flags &= ~ACB_F_IOP_INITED;
Nick Cheng36b83de2010-05-17 11:22:42 +08002948sleep_again:
Nick Chengcdd3cb12010-07-13 20:03:04 +08002949 arcmsr_sleep_for_bus_reset(cmd);
Nick Chengae52e7f2010-06-18 15:39:12 +08002950 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002951 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
2952 if (retry_count > retrycount) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002953 acb->fw_flag = FW_DEADLOCK;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002954 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002955 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002956 }
2957 retry_count++;
2958 goto sleep_again;
2959 }
2960 acb->acb_flags |= ACB_F_IOP_INITED;
2961 /* disable all outbound interrupt */
2962 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +08002963 arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002964 arcmsr_start_adapter_bgrb(acb);
2965 /* clear Qbuffer if door bell ringed */
2966 outbound_doorbell = readl(&reg->outbound_doorbell);
2967 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
2968 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2969 /* enable outbound Post Queue,outbound doorbell Interrupt */
2970 arcmsr_enable_outbound_ints(acb, intmask_org);
2971 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +08002972 atomic_set(&acb->ante_token_value, 16);
2973 acb->fw_flag = FW_NORMAL;
2974 init_timer(&acb->eternal_timer);
2975 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
2976 acb->eternal_timer.data = (unsigned long) acb;
2977 acb->eternal_timer.function = &arcmsr_request_device_map;
2978 add_timer(&acb->eternal_timer);
2979 acb->acb_flags &= ~ACB_F_BUS_RESET;
2980 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002981 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
Nick Chengae52e7f2010-06-18 15:39:12 +08002982 } else {
2983 acb->acb_flags &= ~ACB_F_BUS_RESET;
2984 if (atomic_read(&acb->rq_map_token) == 0) {
2985 atomic_set(&acb->rq_map_token, 16);
2986 atomic_set(&acb->ante_token_value, 16);
2987 acb->fw_flag = FW_NORMAL;
Nick Chengae52e7f2010-06-18 15:39:12 +08002988 init_timer(&acb->eternal_timer);
2989 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
2990 acb->eternal_timer.data = (unsigned long) acb;
2991 acb->eternal_timer.function = &arcmsr_request_device_map;
2992 add_timer(&acb->eternal_timer);
2993 } else {
2994 atomic_set(&acb->rq_map_token, 16);
2995 atomic_set(&acb->ante_token_value, 16);
2996 acb->fw_flag = FW_NORMAL;
2997 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2998 }
2999 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08003000 }
3001 break;
3002 }
3003 case ACB_ADAPTER_TYPE_B:{
3004 acb->acb_flags |= ACB_F_BUS_RESET;
3005 if (!arcmsr_iop_reset(acb)) {
3006 acb->acb_flags &= ~ACB_F_BUS_RESET;
3007 rtn = FAILED;
3008 } else {
3009 acb->acb_flags &= ~ACB_F_BUS_RESET;
3010 if (atomic_read(&acb->rq_map_token) == 0) {
3011 atomic_set(&acb->rq_map_token, 16);
3012 atomic_set(&acb->ante_token_value, 16);
3013 acb->fw_flag = FW_NORMAL;
3014 init_timer(&acb->eternal_timer);
3015 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
3016 acb->eternal_timer.data = (unsigned long) acb;
3017 acb->eternal_timer.function = &arcmsr_request_device_map;
3018 add_timer(&acb->eternal_timer);
3019 } else {
3020 atomic_set(&acb->rq_map_token, 16);
3021 atomic_set(&acb->ante_token_value, 16);
3022 acb->fw_flag = FW_NORMAL;
3023 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3024 }
3025 rtn = SUCCESS;
3026 }
3027 break;
3028 }
3029 case ACB_ADAPTER_TYPE_C:{
3030 if (acb->acb_flags & ACB_F_BUS_RESET) {
3031 long timeout;
3032 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
3033 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
3034 if (timeout) {
3035 return SUCCESS;
3036 }
3037 }
3038 acb->acb_flags |= ACB_F_BUS_RESET;
3039 if (!arcmsr_iop_reset(acb)) {
3040 struct MessageUnit_C __iomem *reg;
3041 reg = acb->pmuC;
3042 arcmsr_hardware_reset(acb);
3043 acb->acb_flags &= ~ACB_F_IOP_INITED;
3044sleep:
3045 arcmsr_sleep_for_bus_reset(cmd);
3046 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
3047 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
3048 if (retry_count > retrycount) {
3049 acb->fw_flag = FW_DEADLOCK;
3050 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
3051 return FAILED;
3052 }
3053 retry_count++;
3054 goto sleep;
3055 }
3056 acb->acb_flags |= ACB_F_IOP_INITED;
3057 /* disable all outbound interrupt */
3058 intmask_org = arcmsr_disable_outbound_ints(acb);
3059 arcmsr_get_firmware_spec(acb);
3060 arcmsr_start_adapter_bgrb(acb);
3061 /* clear Qbuffer if door bell ringed */
3062 outbound_doorbell = readl(&reg->outbound_doorbell);
3063 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3064 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3065 /* enable outbound Post Queue,outbound doorbell Interrupt */
3066 arcmsr_enable_outbound_ints(acb, intmask_org);
3067 atomic_set(&acb->rq_map_token, 16);
3068 atomic_set(&acb->ante_token_value, 16);
3069 acb->fw_flag = FW_NORMAL;
3070 init_timer(&acb->eternal_timer);
3071 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
3072 acb->eternal_timer.data = (unsigned long) acb;
3073 acb->eternal_timer.function = &arcmsr_request_device_map;
3074 add_timer(&acb->eternal_timer);
3075 acb->acb_flags &= ~ACB_F_BUS_RESET;
3076 rtn = SUCCESS;
3077 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3078 } else {
3079 acb->acb_flags &= ~ACB_F_BUS_RESET;
3080 if (atomic_read(&acb->rq_map_token) == 0) {
3081 atomic_set(&acb->rq_map_token, 16);
3082 atomic_set(&acb->ante_token_value, 16);
3083 acb->fw_flag = FW_NORMAL;
3084 init_timer(&acb->eternal_timer);
3085 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ);
3086 acb->eternal_timer.data = (unsigned long) acb;
3087 acb->eternal_timer.function = &arcmsr_request_device_map;
3088 add_timer(&acb->eternal_timer);
3089 } else {
3090 atomic_set(&acb->rq_map_token, 16);
3091 atomic_set(&acb->ante_token_value, 16);
3092 acb->fw_flag = FW_NORMAL;
3093 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3094 }
3095 rtn = SUCCESS;
3096 }
3097 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08003098 }
3099 }
3100 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003101}
3102
Nick Chengae52e7f2010-06-18 15:39:12 +08003103static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003104 struct CommandControlBlock *ccb)
3105{
Nick Chengae52e7f2010-06-18 15:39:12 +08003106 int rtn;
Nick Chengae52e7f2010-06-18 15:39:12 +08003107 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003108 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003109}
3110
3111static int arcmsr_abort(struct scsi_cmnd *cmd)
3112{
3113 struct AdapterControlBlock *acb =
3114 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3115 int i = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003116 int rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07003117 printk(KERN_NOTICE
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003118 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
Erich Chen1c57e862006-07-12 08:59:32 -07003119 acb->host->host_no, cmd->device->id, cmd->device->lun);
Nick Chengae52e7f2010-06-18 15:39:12 +08003120 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003121 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003122 /*
3123 ************************************************
3124 ** the all interrupt service routine is locked
3125 ** we need to handle it as soon as possible and exit
3126 ************************************************
3127 */
3128 if (!atomic_read(&acb->ccboutstandingcount))
Nick Chengae52e7f2010-06-18 15:39:12 +08003129 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003130
3131 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3132 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3133 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003134 ccb->startdone = ARCMSR_CCB_ABORTED;
3135 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003136 break;
3137 }
3138 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003139 acb->acb_flags &= ~ACB_F_ABORT;
3140 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003141}
3142
3143static const char *arcmsr_info(struct Scsi_Host *host)
3144{
3145 struct AdapterControlBlock *acb =
3146 (struct AdapterControlBlock *) host->hostdata;
3147 static char buf[256];
3148 char *type;
3149 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003150 switch (acb->pdev->device) {
3151 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003152 case PCI_DEVICE_ID_ARECA_1200:
3153 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003154 case PCI_DEVICE_ID_ARECA_1210:
3155 raid6 = 0;
3156 /*FALLTHRU*/
3157 case PCI_DEVICE_ID_ARECA_1120:
3158 case PCI_DEVICE_ID_ARECA_1130:
3159 case PCI_DEVICE_ID_ARECA_1160:
3160 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003161 case PCI_DEVICE_ID_ARECA_1201:
Erich Chen1c57e862006-07-12 08:59:32 -07003162 case PCI_DEVICE_ID_ARECA_1220:
3163 case PCI_DEVICE_ID_ARECA_1230:
3164 case PCI_DEVICE_ID_ARECA_1260:
3165 case PCI_DEVICE_ID_ARECA_1270:
3166 case PCI_DEVICE_ID_ARECA_1280:
3167 type = "SATA";
3168 break;
3169 case PCI_DEVICE_ID_ARECA_1380:
3170 case PCI_DEVICE_ID_ARECA_1381:
3171 case PCI_DEVICE_ID_ARECA_1680:
3172 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003173 case PCI_DEVICE_ID_ARECA_1880:
Erich Chen1c57e862006-07-12 08:59:32 -07003174 type = "SAS";
3175 break;
3176 default:
3177 type = "X-TYPE";
3178 break;
3179 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003180 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
Erich Chen1c57e862006-07-12 08:59:32 -07003181 type, raid6 ? "( RAID6 capable)" : "",
3182 ARCMSR_DRIVER_VERSION);
3183 return buf;
3184}