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review.evervolv.com / android_kernel_oneplus_msm8996 / c57ff58d12209e96fd9beeb6efa0e40ad27b80dd / . / arch / arm / boot / dts / da850.dtsi
blob: 7c84822d33a102a76824fd2a8b9e96b749a7e7b7 [file] [log] [blame]
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]1/*
2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10/include/ "skeleton.dtsi"
11
12/ {
13 arm {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 ranges;
17 intc: interrupt-controller {
18 compatible = "ti,cp-intc";
19 interrupt-controller;
20 #interrupt-cells = <1>;
21 ti,intc-size = <100>;
22 reg = <0xfffee000 0x2000>;
23 };
24 };
25 soc {
26 compatible = "simple-bus";
27 model = "da850";
28 #address-cells = <1>;
29 #size-cells = <1>;
30 ranges = <0x0 0x01c00000 0x400000>;
Lad, Prabhakarc57ff582013-01-25 16:48:44 +0530[diff] [blame^]31 interrupt-parent = <&intc>;
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]32
Kumar, Anil1faaba32013-01-16 14:37:39 +0530[diff] [blame]33 pmx_core: pinmux@1c14120 {
34 compatible = "pinctrl-single";
35 reg = <0x14120 0x50>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38 pinctrl-single,bit-per-mux;
39 pinctrl-single,register-width = <32>;
40 pinctrl-single,function-mask = <0xffffffff>;
41 status = "disabled";
Kumar, Anil99b88002013-01-16 14:37:41 +0530[diff] [blame]42
43 nand_cs3_pins: pinmux_nand_pins {
44 pinctrl-single,bits = <
45 /* EMA_OE, EMA_WE */
46 0x1c 0x00110000 0x00ff0000
47 /* EMA_CS[4],EMA_CS[3]*/
48 0x1c 0x00000110 0x00000ff0
49 /*
50 * EMA_D[0], EMA_D[1], EMA_D[2],
51 * EMA_D[3], EMA_D[4], EMA_D[5],
52 * EMA_D[6], EMA_D[7]
53 */
54 0x24 0x11111111 0xffffffff
55 /* EMA_A[1], EMA_A[2] */
56 0x30 0x01100000 0x0ff00000
57 >;
58 };
Kumar, Anil1faaba32013-01-16 14:37:39 +0530[diff] [blame]59 };
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]60 serial0: serial@1c42000 {
61 compatible = "ns16550a";
62 reg = <0x42000 0x100>;
63 clock-frequency = <150000000>;
64 reg-shift = <2>;
65 interrupts = <25>;
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]66 status = "disabled";
67 };
68 serial1: serial@1d0c000 {
69 compatible = "ns16550a";
70 reg = <0x10c000 0x100>;
71 clock-frequency = <150000000>;
72 reg-shift = <2>;
73 interrupts = <53>;
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]74 status = "disabled";
75 };
76 serial2: serial@1d0d000 {
77 compatible = "ns16550a";
78 reg = <0x10d000 0x100>;
79 clock-frequency = <150000000>;
80 reg-shift = <2>;
81 interrupts = <61>;
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]82 status = "disabled";
83 };
84 };
Kumar, Anil99b88002013-01-16 14:37:41 +0530[diff] [blame]85 nand_cs3@62000000 {
86 compatible = "ti,davinci-nand";
87 reg = <0x62000000 0x807ff
88 0x68000000 0x8000>;
89 ti,davinci-chipselect = <1>;
90 ti,davinci-mask-ale = <0>;
91 ti,davinci-mask-cle = <0>;
92 ti,davinci-mask-chipsel = <0>;
93 ti,davinci-ecc-mode = "hw";
94 ti,davinci-ecc-bits = <4>;
95 ti,davinci-nand-use-bbt;
96 status = "disabled";
97 };
Heiko Schocher33085b32012-08-30 14:21:04 +0530[diff] [blame]98};