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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090024#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/pwm_backlight.h>
26#include <linux/dm9000.h>
27#include <linux/gpio_keys.h>
28#include <linux/basic_mmio_gpio.h>
29#include <linux/spi/spi.h>
30
31#include <linux/i2c/pca953x.h>
32
33#include <video/platform_lcd.h>
34
35#include <linux/mfd/wm831x/core.h>
36#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090037#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090038#include <linux/mfd/wm831x/gpio.h>
39
Mark Brown8504a3c2011-12-02 14:29:07 +090040#include <sound/wm1250-ev1.h>
41
Mark Browne1a3c742011-05-06 09:45:13 +090042#include <asm/mach/arch.h>
43#include <asm/mach-types.h>
44
45#include <mach/hardware.h>
46#include <mach/map.h>
47
Mark Browne1a3c742011-05-06 09:45:13 +090048#include <mach/regs-sys.h>
49#include <mach/regs-gpio.h>
50#include <mach/regs-modem.h>
Mark Brownd0f0b432011-08-19 22:40:07 +090051#include <mach/crag6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090052
Mark Browne1a3c742011-05-06 09:45:13 +090053#include <mach/regs-gpio-memport.h>
54
Kukjin Kim3cd7b622011-09-10 10:09:21 +090055#include <plat/s3c6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090056#include <plat/regs-serial.h>
57#include <plat/regs-fb-v4.h>
58#include <plat/fb.h>
59#include <plat/sdhci.h>
60#include <plat/gpio-cfg.h>
61#include <plat/s3c64xx-spi.h>
62
63#include <plat/keypad.h>
64#include <plat/clock.h>
65#include <plat/devs.h>
66#include <plat/cpu.h>
67#include <plat/adc.h>
68#include <plat/iic.h>
69#include <plat/pm.h>
70
Mark Browne1a3c742011-05-06 09:45:13 +090071/* serial port setup */
72
73#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
74#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
75#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
76
77static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
78 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090079 .hwport = 0,
80 .flags = 0,
81 .ucon = UCON,
82 .ulcon = ULCON,
83 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090084 },
85 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090086 .hwport = 1,
87 .flags = 0,
88 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090091 },
92 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090093 .hwport = 2,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090098 },
99 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900100 .hwport = 3,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900105 },
106};
107
108static struct platform_pwm_backlight_data crag6410_backlight_data = {
109 .pwm_id = 0,
110 .max_brightness = 1000,
111 .dft_brightness = 600,
112 .pwm_period_ns = 100000, /* about 1kHz */
113};
114
115static struct platform_device crag6410_backlight_device = {
116 .name = "pwm-backlight",
117 .id = -1,
118 .dev = {
119 .parent = &s3c_device_timer[0].dev,
120 .platform_data = &crag6410_backlight_data,
121 },
122};
123
124static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
125{
126 pr_debug("%s: setting power %d\n", __func__, power);
127
128 if (power) {
129 gpio_set_value(S3C64XX_GPB(0), 1);
130 msleep(1);
131 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
132 } else {
133 gpio_direction_output(S3C64XX_GPF(14), 0);
134 gpio_set_value(S3C64XX_GPB(0), 0);
135 }
136}
137
138static struct platform_device crag6410_lcd_powerdev = {
139 .name = "platform-lcd",
140 .id = -1,
141 .dev.parent = &s3c_device_fb.dev,
142 .dev.platform_data = &(struct plat_lcd_data) {
143 .set_power = crag6410_lcd_power_set,
144 },
145};
146
147/* 640x480 URT */
148static struct s3c_fb_pd_win crag6410_fb_win0 = {
149 /* this is to ensure we use win0 */
150 .win_mode = {
151 .left_margin = 150,
152 .right_margin = 80,
153 .upper_margin = 40,
154 .lower_margin = 5,
155 .hsync_len = 40,
156 .vsync_len = 5,
157 .xres = 640,
158 .yres = 480,
159 },
160 .max_bpp = 32,
161 .default_bpp = 16,
162 .virtual_y = 480 * 2,
163 .virtual_x = 640,
164};
165
166/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
167static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
168 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
169 .win[0] = &crag6410_fb_win0,
170 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
171 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
172};
173
174/* 2x6 keypad */
175
176static uint32_t crag6410_keymap[] __initdata = {
177 /* KEY(row, col, keycode) */
178 KEY(0, 0, KEY_VOLUMEUP),
179 KEY(0, 1, KEY_HOME),
180 KEY(0, 2, KEY_VOLUMEDOWN),
181 KEY(0, 3, KEY_HELP),
182 KEY(0, 4, KEY_MENU),
183 KEY(0, 5, KEY_MEDIA),
184 KEY(1, 0, 232),
185 KEY(1, 1, KEY_DOWN),
186 KEY(1, 2, KEY_LEFT),
187 KEY(1, 3, KEY_UP),
188 KEY(1, 4, KEY_RIGHT),
189 KEY(1, 5, KEY_CAMERA),
190};
191
192static struct matrix_keymap_data crag6410_keymap_data __initdata = {
193 .keymap = crag6410_keymap,
194 .keymap_size = ARRAY_SIZE(crag6410_keymap),
195};
196
197static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
198 .keymap_data = &crag6410_keymap_data,
199 .rows = 2,
200 .cols = 6,
201};
202
203static struct gpio_keys_button crag6410_gpio_keys[] = {
204 [0] = {
205 .code = KEY_SUSPEND,
206 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900207 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900208 .wakeup = 1,
209 .active_low = 1,
210 },
Mark Brownae24c262011-06-22 13:08:13 +0900211 [1] = {
212 .code = SW_FRONT_PROXIMITY,
213 .gpio = S3C64XX_GPN(11), /* EINT 11 */
214 .type = EV_SW,
215 },
Mark Browne1a3c742011-05-06 09:45:13 +0900216};
217
218static struct gpio_keys_platform_data crag6410_gpio_keydata = {
219 .buttons = crag6410_gpio_keys,
220 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
221};
222
223static struct platform_device crag6410_gpio_keydev = {
224 .name = "gpio-keys",
225 .id = 0,
226 .dev.platform_data = &crag6410_gpio_keydata,
227};
228
229static struct resource crag6410_dm9k_resource[] = {
230 [0] = {
231 .start = S3C64XX_PA_XM0CSN5,
232 .end = S3C64XX_PA_XM0CSN5 + 1,
233 .flags = IORESOURCE_MEM,
234 },
235 [1] = {
236 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
237 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
238 .flags = IORESOURCE_MEM,
239 },
240 [2] = {
241 .start = S3C_EINT(17),
242 .end = S3C_EINT(17),
243 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
244 },
245};
246
247static struct dm9000_plat_data mini6410_dm9k_pdata = {
248 .flags = DM9000_PLATF_16BITONLY,
249};
250
251static struct platform_device crag6410_dm9k_device = {
252 .name = "dm9000",
253 .id = -1,
254 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
255 .resource = crag6410_dm9k_resource,
256 .dev.platform_data = &mini6410_dm9k_pdata,
257};
258
259static struct resource crag6410_mmgpio_resource[] = {
260 [0] = {
261 .start = S3C64XX_PA_XM0CSN4 + 1,
262 .end = S3C64XX_PA_XM0CSN4 + 1,
263 .flags = IORESOURCE_MEM,
264 },
265};
266
267static struct platform_device crag6410_mmgpio = {
268 .name = "basic-mmio-gpio",
269 .id = -1,
270 .resource = crag6410_mmgpio_resource,
271 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
272 .dev.platform_data = &(struct bgpio_pdata) {
273 .base = -1,
274 },
275};
276
Mark Brownae24c262011-06-22 13:08:13 +0900277static struct platform_device speyside_device = {
278 .name = "speyside",
279 .id = -1,
280};
281
Mark Brown8c051ab2011-09-05 14:50:02 +0900282static struct platform_device lowland_device = {
283 .name = "lowland",
284 .id = -1,
285};
286
Mark Brownae24c262011-06-22 13:08:13 +0900287static struct platform_device speyside_wm8962_device = {
288 .name = "speyside-wm8962",
289 .id = -1,
290};
291
Mark Brownc5c32c92011-12-02 14:32:32 +0900292static struct platform_device littlemill_device = {
293 .name = "littlemill",
294 .id = -1,
295};
296
Mark Brownae24c262011-06-22 13:08:13 +0900297static struct regulator_consumer_supply wallvdd_consumers[] = {
298 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
299 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900300 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
301 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900302};
303
304static struct regulator_init_data wallvdd_data = {
305 .constraints = {
306 .always_on = 1,
307 },
308 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
309 .consumer_supplies = wallvdd_consumers,
310};
311
312static struct fixed_voltage_config wallvdd_pdata = {
313 .supply_name = "WALLVDD",
314 .microvolts = 5000000,
315 .init_data = &wallvdd_data,
316 .gpio = -EINVAL,
317};
318
319static struct platform_device wallvdd_device = {
320 .name = "reg-fixed-voltage",
321 .id = -1,
322 .dev = {
323 .platform_data = &wallvdd_pdata,
324 },
325};
326
Mark Browne1a3c742011-05-06 09:45:13 +0900327static struct platform_device *crag6410_devices[] __initdata = {
328 &s3c_device_hsmmc0,
329 &s3c_device_hsmmc1,
330 &s3c_device_hsmmc2,
331 &s3c_device_i2c0,
332 &s3c_device_i2c1,
333 &s3c_device_fb,
334 &s3c_device_ohci,
335 &s3c_device_usb_hsotg,
Mark Browne1a3c742011-05-06 09:45:13 +0900336 &s3c_device_timer[0],
337 &s3c64xx_device_iis0,
338 &s3c64xx_device_iis1,
339 &samsung_asoc_dma,
340 &samsung_device_keypad,
341 &crag6410_gpio_keydev,
342 &crag6410_dm9k_device,
343 &s3c64xx_device_spi0,
344 &crag6410_mmgpio,
345 &crag6410_lcd_powerdev,
346 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900347 &speyside_device,
348 &speyside_wm8962_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900349 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900350 &lowland_device,
Mark Brownae24c262011-06-22 13:08:13 +0900351 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900352};
353
354static struct pca953x_platform_data crag6410_pca_data = {
355 .gpio_base = PCA935X_GPIO_BASE,
356 .irq_base = 0,
357};
358
Mark Brown986afc92011-08-12 18:08:17 +0900359/* VDDARM is controlled by DVS1 connected to GPK(0) */
360static struct wm831x_buckv_pdata vddarm_pdata = {
361 .dvs_control_src = 1,
362 .dvs_gpio = S3C64XX_GPK(0),
363};
364
Mark Browne1a3c742011-05-06 09:45:13 +0900365static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
366 REGULATOR_SUPPLY("vddarm", NULL),
367};
368
369static struct regulator_init_data vddarm __initdata = {
370 .constraints = {
371 .name = "VDDARM",
372 .min_uV = 1000000,
373 .max_uV = 1300000,
374 .always_on = 1,
375 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
376 },
377 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
378 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900379 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900380 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900381};
382
383static struct regulator_init_data vddint __initdata = {
384 .constraints = {
385 .name = "VDDINT",
386 .min_uV = 1000000,
387 .max_uV = 1200000,
388 .always_on = 1,
389 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
390 },
391};
392
393static struct regulator_init_data vddmem __initdata = {
394 .constraints = {
395 .name = "VDDMEM",
396 .always_on = 1,
397 },
398};
399
400static struct regulator_init_data vddsys __initdata = {
401 .constraints = {
402 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
403 .always_on = 1,
404 },
405};
406
407static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
408 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
409 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
410 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
411};
412
413static struct regulator_init_data vddmmc __initdata = {
414 .constraints = {
415 .name = "VDDMMC,UH",
416 .always_on = 1,
417 },
418 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
419 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900420 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900421};
422
423static struct regulator_init_data vddotgi __initdata = {
424 .constraints = {
425 .name = "VDDOTGi",
426 .always_on = 1,
427 },
Mark Brown35127292011-06-22 13:08:17 +0900428 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900429};
430
431static struct regulator_init_data vddotg __initdata = {
432 .constraints = {
433 .name = "VDDOTG",
434 .always_on = 1,
435 },
Mark Brown35127292011-06-22 13:08:17 +0900436 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900437};
438
439static struct regulator_init_data vddhi __initdata = {
440 .constraints = {
441 .name = "VDDHI",
442 .always_on = 1,
443 },
Mark Brown35127292011-06-22 13:08:17 +0900444 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900445};
446
447static struct regulator_init_data vddadc __initdata = {
448 .constraints = {
449 .name = "VDDADC,VDDDAC",
450 .always_on = 1,
451 },
Mark Brown35127292011-06-22 13:08:17 +0900452 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900453};
454
455static struct regulator_init_data vddmem0 __initdata = {
456 .constraints = {
457 .name = "VDDMEM0",
458 .always_on = 1,
459 },
Mark Brown35127292011-06-22 13:08:17 +0900460 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900461};
462
463static struct regulator_init_data vddpll __initdata = {
464 .constraints = {
465 .name = "VDDPLL",
466 .always_on = 1,
467 },
Mark Brown35127292011-06-22 13:08:17 +0900468 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900469};
470
471static struct regulator_init_data vddlcd __initdata = {
472 .constraints = {
473 .name = "VDDLCD",
474 .always_on = 1,
475 },
Mark Brown35127292011-06-22 13:08:17 +0900476 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900477};
478
479static struct regulator_init_data vddalive __initdata = {
480 .constraints = {
481 .name = "VDDALIVE",
482 .always_on = 1,
483 },
Mark Brown35127292011-06-22 13:08:17 +0900484 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900485};
486
Mark Brown89e1c3d2011-07-21 01:26:24 +0900487static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
488 .charger_enable = 1,
489 .vlim = 2500, /* mV */
490 .ilim = 200, /* uA */
491};
492
Mark Browne1a3c742011-05-06 09:45:13 +0900493static struct wm831x_status_pdata banff_red_led __initdata = {
494 .name = "banff:red:",
495 .default_src = WM831X_STATUS_MANUAL,
496};
497
498static struct wm831x_status_pdata banff_green_led __initdata = {
499 .name = "banff:green:",
500 .default_src = WM831X_STATUS_MANUAL,
501};
502
503static struct wm831x_touch_pdata touch_pdata __initdata = {
504 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900505 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900506};
507
Mark Browne1a3c742011-05-06 09:45:13 +0900508static struct wm831x_pdata crag_pmic_pdata __initdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900509 .wm831x_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900510 .irq_base = BANFF_PMIC_IRQ_BASE,
Mark Brownaaed44e2011-11-03 16:28:15 +0900511 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900512 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900513
Mark Brown89e1c3d2011-07-21 01:26:24 +0900514 .backup = &banff_backup_pdata,
515
Mark Brownae24c262011-06-22 13:08:13 +0900516 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900517 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
518 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900519 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
520 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
521 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
522 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
523 },
524
Mark Browne1a3c742011-05-06 09:45:13 +0900525 .dcdc = {
526 &vddarm, /* DCDC1 */
527 &vddint, /* DCDC2 */
528 &vddmem, /* DCDC3 */
529 },
530
531 .ldo = {
532 &vddsys, /* LDO1 */
533 &vddmmc, /* LDO2 */
534 NULL, /* LDO3 */
535 &vddotgi, /* LDO4 */
536 &vddotg, /* LDO5 */
537 &vddhi, /* LDO6 */
538 &vddadc, /* LDO7 */
539 &vddmem0, /* LDO8 */
540 &vddpll, /* LDO9 */
541 &vddlcd, /* LDO10 */
542 &vddalive, /* LDO11 */
543 },
544
545 .status = {
546 &banff_green_led,
547 &banff_red_led,
548 },
549
550 .touch = &touch_pdata,
551};
552
553static struct i2c_board_info i2c_devs0[] __initdata = {
554 { I2C_BOARD_INFO("24c08", 0x50), },
555 { I2C_BOARD_INFO("tca6408", 0x20),
556 .platform_data = &crag6410_pca_data,
557 },
558 { I2C_BOARD_INFO("wm8312", 0x34),
559 .platform_data = &crag_pmic_pdata,
560 .irq = S3C_EINT(23),
561 },
562};
563
564static struct s3c2410_platform_i2c i2c0_pdata = {
565 .frequency = 400000,
566};
567
Mark Brownae24c262011-06-22 13:08:13 +0900568static struct regulator_init_data pvdd_1v2 __initdata = {
569 .constraints = {
570 .name = "PVDD_1V2",
571 .always_on = 1,
572 },
573};
574
575static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900576 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900577 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
578 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900579 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
580 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
581 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900582 REGULATOR_SUPPLY("CPVDD", "1-001a"),
583 REGULATOR_SUPPLY("AVDD2", "1-001a"),
584 REGULATOR_SUPPLY("DCVDD", "1-001a"),
585 REGULATOR_SUPPLY("AVDD", "1-001a"),
586};
587
588static struct regulator_init_data pvdd_1v8 __initdata = {
589 .constraints = {
590 .name = "PVDD_1V8",
591 .always_on = 1,
592 },
593
594 .consumer_supplies = pvdd_1v8_consumers,
595 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
596};
597
598static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
599 REGULATOR_SUPPLY("MICVDD", "1-001a"),
600 REGULATOR_SUPPLY("AVDD1", "1-001a"),
601};
602
603static struct regulator_init_data pvdd_3v3 __initdata = {
604 .constraints = {
605 .name = "PVDD_3V3",
606 .always_on = 1,
607 },
608
609 .consumer_supplies = pvdd_3v3_consumers,
610 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
611};
612
613static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
614 .wm831x_num = 2,
615 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
616 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900617 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900618
619 .gpio_defaults = {
620 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
621 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
622 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
623 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
624 },
625
626 .dcdc = {
627 &pvdd_1v2, /* DCDC1 */
628 &pvdd_1v8, /* DCDC2 */
629 &pvdd_3v3, /* DCDC3 */
630 },
631
632 .disable_touch = true,
633};
634
Mark Brown8504a3c2011-12-02 14:29:07 +0900635static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
636 .gpios = {
637 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
638 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
639 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
640 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
641 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
642 },
643};
644
Mark Browne1a3c742011-05-06 09:45:13 +0900645static struct i2c_board_info i2c_devs1[] __initdata = {
646 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900647 .irq = S3C_EINT(0),
648 .platform_data = &glenfarclas_pmic_pdata },
649
Mark Brownd0f0b432011-08-19 22:40:07 +0900650 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
651 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
652 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
653
Mark Brown8504a3c2011-12-02 14:29:07 +0900654 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
655 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900656};
657
Mark Brown8351c7a2011-12-02 14:29:07 +0900658static struct s3c2410_platform_i2c i2c1_pdata = {
659 .frequency = 400000,
660 .bus_num = 1,
661};
662
Mark Browne1a3c742011-05-06 09:45:13 +0900663static void __init crag6410_map_io(void)
664{
665 s3c64xx_init_io(NULL, 0);
666 s3c24xx_init_clocks(12000000);
667 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
668
669 /* LCD type and Bypass set by bootloader */
670}
671
672static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
673 .max_width = 4,
674 .cd_type = S3C_SDHCI_CD_PERMANENT,
675};
676
677static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
678 .max_width = 4,
679 .cd_type = S3C_SDHCI_CD_GPIO,
680 .ext_cd_gpio = S3C64XX_GPF(11),
681};
682
683static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
684{
685 /* Set all the necessary GPG pins to special-function 2 */
686 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
687
688 /* force card-detected for prototype 0 */
689 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
690}
691
692static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
693 .max_width = 4,
694 .cd_type = S3C_SDHCI_CD_INTERNAL,
695 .cfg_gpio = crag6410_cfg_sdhci0,
696};
697
698static void __init crag6410_machine_init(void)
699{
700 /* Open drain IRQs need pullups */
701 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
702 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
703
704 gpio_request(S3C64XX_GPB(0), "LCD power");
705 gpio_direction_output(S3C64XX_GPB(0), 0);
706
707 gpio_request(S3C64XX_GPF(14), "LCD PWM");
708 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
709
710 gpio_request(S3C64XX_GPB(1), "SD power");
711 gpio_direction_output(S3C64XX_GPB(1), 0);
712
713 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
714 gpio_direction_output(S3C64XX_GPF(10), 1);
715
716 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
717 s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
718 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
719
720 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900721 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900722 s3c_fb_set_platdata(&crag6410_lcd_pdata);
723
724 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
725 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
726
727 samsung_keypad_set_platdata(&crag6410_keypad_data);
728
729 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
730
Mark Brownae24c262011-06-22 13:08:13 +0900731 regulator_has_full_constraints();
732
Mark Browne1a3c742011-05-06 09:45:13 +0900733 s3c_pm_init();
734}
735
736MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
737 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400738 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900739 .init_irq = s3c6410_init_irq,
740 .map_io = crag6410_map_io,
741 .init_machine = crag6410_machine_init,
742 .timer = &s3c24xx_timer,
743MACHINE_END