blob: 924a6f67ed052fab7ed0ab401a789c59c04c0e16 [file] [log] [blame]
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05301/*
2 * DTS file for all SPEAr3xx SoCs
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "skeleton.dtsi"
15
16/ {
17 interrupt-parent = <&vic>;
18
19 cpus {
20 cpu@0 {
21 compatible = "arm,arm926ejs";
22 };
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0 0x40000000>;
28 };
29
30 ahb {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "simple-bus";
34 ranges = <0xd0000000 0xd0000000 0x30000000>;
35
36 vic: interrupt-controller@f1100000 {
37 compatible = "arm,pl190-vic";
38 interrupt-controller;
39 reg = <0xf1100000 0x1000>;
40 #interrupt-cells = <1>;
41 };
42
43 gmac: eth@e0800000 {
44 compatible = "st,spear600-gmac";
45 reg = <0xe0800000 0x8000>;
46 interrupts = <23 22>;
47 interrupt-names = "macirq", "eth_wake_irq";
48 status = "disabled";
49 };
50
51 smi: flash@fc000000 {
52 compatible = "st,spear600-smi";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 reg = <0xfc000000 0x1000>;
56 interrupts = <9>;
57 status = "disabled";
58 };
59
60 spi0: spi@d0100000 {
61 compatible = "arm,pl022", "arm,primecell";
62 reg = <0xd0100000 0x1000>;
63 interrupts = <20>;
64 status = "disabled";
65 };
66
67 ehci@e1800000 {
68 compatible = "st,spear600-ehci", "usb-ehci";
69 reg = <0xe1800000 0x1000>;
70 interrupts = <26>;
71 status = "disabled";
72 };
73
74 ohci@e1900000 {
75 compatible = "st,spear600-ohci", "usb-ohci";
76 reg = <0xe1900000 0x1000>;
77 interrupts = <25>;
78 status = "disabled";
79 };
80
81 ohci@e2100000 {
82 compatible = "st,spear600-ohci", "usb-ohci";
83 reg = <0xe2100000 0x1000>;
84 interrupts = <27>;
85 status = "disabled";
86 };
87
88 apb {
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "simple-bus";
92 ranges = <0xd0000000 0xd0000000 0x30000000>;
93
94 gpio0: gpio@fc980000 {
95 compatible = "arm,pl061", "arm,primecell";
96 reg = <0xfc980000 0x1000>;
97 interrupts = <11>;
98 gpio-controller;
99 #gpio-cells = <2>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
102 status = "disabled";
103 };
104
105 i2c0: i2c@d0180000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "snps,designware-i2c";
109 reg = <0xd0180000 0x1000>;
110 interrupts = <21>;
111 status = "disabled";
112 };
113
114 rtc@fc900000 {
115 compatible = "st,spear-rtc";
116 reg = <0xfc900000 0x1000>;
117 interrupts = <10>;
118 status = "disabled";
119 };
120
121 serial@d0000000 {
122 compatible = "arm,pl011", "arm,primecell";
123 reg = <0xd0000000 0x1000>;
124 interrupts = <19>;
125 status = "disabled";
126 };
127
128 wdt@fc880000 {
129 compatible = "arm,sp805", "arm,primecell";
130 reg = <0xfc880000 0x1000>;
131 interrupts = <12>;
132 status = "disabled";
133 };
134 };
135 };
136};