Kukjin Kim | f7d7707 | 2011-06-01 14:18:22 -0700 | [diff] [blame] | 1 | /* |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 3 | * http://www.samsung.com |
| 4 | * |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 5 | * EXYNOS4 - CPU frequency scaling support |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/types.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/clk.h> |
| 16 | #include <linux/io.h> |
| 17 | #include <linux/slab.h> |
| 18 | #include <linux/regulator/consumer.h> |
| 19 | #include <linux/cpufreq.h> |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 20 | #include <linux/notifier.h> |
| 21 | #include <linux/suspend.h> |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 22 | |
| 23 | #include <mach/map.h> |
| 24 | #include <mach/regs-clock.h> |
| 25 | #include <mach/regs-mem.h> |
| 26 | |
| 27 | #include <plat/clock.h> |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 28 | #include <plat/pm.h> |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 29 | |
| 30 | static struct clk *cpu_clk; |
| 31 | static struct clk *moutcore; |
| 32 | static struct clk *mout_mpll; |
| 33 | static struct clk *mout_apll; |
| 34 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 35 | static struct regulator *arm_regulator; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 36 | |
| 37 | static struct cpufreq_freqs freqs; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 38 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 39 | static unsigned int locking_frequency; |
| 40 | static bool frequency_locked; |
| 41 | static DEFINE_MUTEX(cpufreq_lock); |
| 42 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 43 | enum cpufreq_level_index { |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 44 | L0, L1, L2, L3, CPUFREQ_LEVEL_END, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 45 | }; |
| 46 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 47 | static struct cpufreq_frequency_table exynos4_freq_table[] = { |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 48 | {L0, 1000*1000}, |
| 49 | {L1, 800*1000}, |
| 50 | {L2, 400*1000}, |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 51 | {L3, 100*1000}, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 52 | {0, CPUFREQ_TABLE_END}, |
| 53 | }; |
| 54 | |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 55 | static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] = { |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 56 | /* |
| 57 | * Clock divider value for following |
| 58 | * { DIVCORE, DIVCOREM0, DIVCOREM1, DIVPERIPH, |
| 59 | * DIVATB, DIVPCLK_DBG, DIVAPLL } |
| 60 | */ |
| 61 | |
| 62 | /* ARM L0: 1000MHz */ |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 63 | { 0, 3, 7, 3, 3, 0, 1 }, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 64 | |
| 65 | /* ARM L1: 800MHz */ |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 66 | { 0, 3, 7, 3, 3, 0, 1 }, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 67 | |
| 68 | /* ARM L2: 400MHz */ |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 69 | { 0, 1, 3, 1, 3, 0, 1 }, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 70 | |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 71 | /* ARM L3: 100MHz */ |
| 72 | { 0, 0, 1, 0, 3, 1, 1 }, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 73 | }; |
| 74 | |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 75 | static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] = { |
| 76 | /* |
| 77 | * Clock divider value for following |
| 78 | * { DIVCOPY, DIVHPM } |
| 79 | */ |
| 80 | |
| 81 | /* ARM L0: 1000MHz */ |
| 82 | { 3, 0 }, |
| 83 | |
| 84 | /* ARM L1: 800MHz */ |
| 85 | { 3, 0 }, |
| 86 | |
| 87 | /* ARM L2: 400MHz */ |
| 88 | { 3, 0 }, |
| 89 | |
| 90 | /* ARM L3: 100MHz */ |
| 91 | { 3, 0 }, |
| 92 | }; |
| 93 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 94 | struct cpufreq_voltage_table { |
| 95 | unsigned int index; /* any */ |
| 96 | unsigned int arm_volt; /* uV */ |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 97 | }; |
| 98 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 99 | static struct cpufreq_voltage_table exynos4_volt_table[CPUFREQ_LEVEL_END] = { |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 100 | { |
| 101 | .index = L0, |
| 102 | .arm_volt = 1200000, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 103 | }, { |
| 104 | .index = L1, |
| 105 | .arm_volt = 1100000, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 106 | }, { |
| 107 | .index = L2, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 108 | .arm_volt = 1000000, |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 109 | }, { |
| 110 | .index = L3, |
| 111 | .arm_volt = 900000, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 112 | }, |
| 113 | }; |
| 114 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 115 | static unsigned int exynos4_apll_pms_table[CPUFREQ_LEVEL_END] = { |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 116 | /* APLL FOUT L0: 1000MHz */ |
| 117 | ((250 << 16) | (6 << 8) | 1), |
| 118 | |
| 119 | /* APLL FOUT L1: 800MHz */ |
| 120 | ((200 << 16) | (6 << 8) | 1), |
| 121 | |
| 122 | /* APLL FOUT L2 : 400MHz */ |
| 123 | ((200 << 16) | (6 << 8) | 2), |
| 124 | |
| 125 | /* APLL FOUT L3: 100MHz */ |
| 126 | ((200 << 16) | (6 << 8) | 4), |
| 127 | }; |
| 128 | |
Axel Lin | 2f0d6f2 | 2011-07-08 14:20:44 +0800 | [diff] [blame] | 129 | static int exynos4_verify_speed(struct cpufreq_policy *policy) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 130 | { |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 131 | return cpufreq_frequency_table_verify(policy, exynos4_freq_table); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 132 | } |
| 133 | |
Axel Lin | 2f0d6f2 | 2011-07-08 14:20:44 +0800 | [diff] [blame] | 134 | static unsigned int exynos4_getspeed(unsigned int cpu) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 135 | { |
| 136 | return clk_get_rate(cpu_clk) / 1000; |
| 137 | } |
| 138 | |
Axel Lin | 2f0d6f2 | 2011-07-08 14:20:44 +0800 | [diff] [blame] | 139 | static void exynos4_set_clkdiv(unsigned int div_index) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 140 | { |
| 141 | unsigned int tmp; |
| 142 | |
| 143 | /* Change Divider - CPU0 */ |
| 144 | |
| 145 | tmp = __raw_readl(S5P_CLKDIV_CPU); |
| 146 | |
| 147 | tmp &= ~(S5P_CLKDIV_CPU0_CORE_MASK | S5P_CLKDIV_CPU0_COREM0_MASK | |
| 148 | S5P_CLKDIV_CPU0_COREM1_MASK | S5P_CLKDIV_CPU0_PERIPH_MASK | |
| 149 | S5P_CLKDIV_CPU0_ATB_MASK | S5P_CLKDIV_CPU0_PCLKDBG_MASK | |
| 150 | S5P_CLKDIV_CPU0_APLL_MASK); |
| 151 | |
| 152 | tmp |= ((clkdiv_cpu0[div_index][0] << S5P_CLKDIV_CPU0_CORE_SHIFT) | |
| 153 | (clkdiv_cpu0[div_index][1] << S5P_CLKDIV_CPU0_COREM0_SHIFT) | |
| 154 | (clkdiv_cpu0[div_index][2] << S5P_CLKDIV_CPU0_COREM1_SHIFT) | |
| 155 | (clkdiv_cpu0[div_index][3] << S5P_CLKDIV_CPU0_PERIPH_SHIFT) | |
| 156 | (clkdiv_cpu0[div_index][4] << S5P_CLKDIV_CPU0_ATB_SHIFT) | |
| 157 | (clkdiv_cpu0[div_index][5] << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT) | |
| 158 | (clkdiv_cpu0[div_index][6] << S5P_CLKDIV_CPU0_APLL_SHIFT)); |
| 159 | |
| 160 | __raw_writel(tmp, S5P_CLKDIV_CPU); |
| 161 | |
| 162 | do { |
| 163 | tmp = __raw_readl(S5P_CLKDIV_STATCPU); |
| 164 | } while (tmp & 0x1111111); |
| 165 | |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 166 | /* Change Divider - CPU1 */ |
| 167 | |
| 168 | tmp = __raw_readl(S5P_CLKDIV_CPU1); |
| 169 | |
| 170 | tmp &= ~((0x7 << 4) | 0x7); |
| 171 | |
| 172 | tmp |= ((clkdiv_cpu1[div_index][0] << 4) | |
| 173 | (clkdiv_cpu1[div_index][1] << 0)); |
| 174 | |
| 175 | __raw_writel(tmp, S5P_CLKDIV_CPU1); |
| 176 | |
| 177 | do { |
| 178 | tmp = __raw_readl(S5P_CLKDIV_STATCPU1); |
| 179 | } while (tmp & 0x11); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 180 | } |
| 181 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 182 | static void exynos4_set_apll(unsigned int index) |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 183 | { |
| 184 | unsigned int tmp; |
| 185 | |
| 186 | /* 1. MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */ |
| 187 | clk_set_parent(moutcore, mout_mpll); |
| 188 | |
| 189 | do { |
| 190 | tmp = (__raw_readl(S5P_CLKMUX_STATCPU) |
| 191 | >> S5P_CLKSRC_CPU_MUXCORE_SHIFT); |
| 192 | tmp &= 0x7; |
| 193 | } while (tmp != 0x2); |
| 194 | |
| 195 | /* 2. Set APLL Lock time */ |
| 196 | __raw_writel(S5P_APLL_LOCKTIME, S5P_APLL_LOCK); |
| 197 | |
| 198 | /* 3. Change PLL PMS values */ |
| 199 | tmp = __raw_readl(S5P_APLL_CON0); |
| 200 | tmp &= ~((0x3ff << 16) | (0x3f << 8) | (0x7 << 0)); |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 201 | tmp |= exynos4_apll_pms_table[index]; |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 202 | __raw_writel(tmp, S5P_APLL_CON0); |
| 203 | |
| 204 | /* 4. wait_lock_time */ |
| 205 | do { |
| 206 | tmp = __raw_readl(S5P_APLL_CON0); |
| 207 | } while (!(tmp & (0x1 << S5P_APLLCON0_LOCKED_SHIFT))); |
| 208 | |
| 209 | /* 5. MUX_CORE_SEL = APLL */ |
| 210 | clk_set_parent(moutcore, mout_apll); |
| 211 | |
| 212 | do { |
| 213 | tmp = __raw_readl(S5P_CLKMUX_STATCPU); |
| 214 | tmp &= S5P_CLKMUX_STATCPU_MUXCORE_MASK; |
| 215 | } while (tmp != (0x1 << S5P_CLKSRC_CPU_MUXCORE_SHIFT)); |
| 216 | } |
| 217 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 218 | static void exynos4_set_frequency(unsigned int old_index, unsigned int new_index) |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 219 | { |
| 220 | unsigned int tmp; |
| 221 | |
| 222 | if (old_index > new_index) { |
| 223 | /* The frequency changing to L0 needs to change apll */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 224 | if (freqs.new == exynos4_freq_table[L0].frequency) { |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 225 | /* 1. Change the system clock divider values */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 226 | exynos4_set_clkdiv(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 227 | |
| 228 | /* 2. Change the apll m,p,s value */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 229 | exynos4_set_apll(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 230 | } else { |
| 231 | /* 1. Change the system clock divider values */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 232 | exynos4_set_clkdiv(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 233 | |
| 234 | /* 2. Change just s value in apll m,p,s value */ |
| 235 | tmp = __raw_readl(S5P_APLL_CON0); |
| 236 | tmp &= ~(0x7 << 0); |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 237 | tmp |= (exynos4_apll_pms_table[new_index] & 0x7); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 238 | __raw_writel(tmp, S5P_APLL_CON0); |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | else if (old_index < new_index) { |
| 243 | /* The frequency changing from L0 needs to change apll */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 244 | if (freqs.old == exynos4_freq_table[L0].frequency) { |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 245 | /* 1. Change the apll m,p,s value */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 246 | exynos4_set_apll(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 247 | |
| 248 | /* 2. Change the system clock divider values */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 249 | exynos4_set_clkdiv(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 250 | } else { |
| 251 | /* 1. Change just s value in apll m,p,s value */ |
| 252 | tmp = __raw_readl(S5P_APLL_CON0); |
| 253 | tmp &= ~(0x7 << 0); |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 254 | tmp |= (exynos4_apll_pms_table[new_index] & 0x7); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 255 | __raw_writel(tmp, S5P_APLL_CON0); |
| 256 | |
| 257 | /* 2. Change the system clock divider values */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 258 | exynos4_set_clkdiv(new_index); |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 259 | } |
| 260 | } |
| 261 | } |
| 262 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 263 | static int exynos4_target(struct cpufreq_policy *policy, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 264 | unsigned int target_freq, |
| 265 | unsigned int relation) |
| 266 | { |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 267 | unsigned int index, old_index; |
Jaecheol Lee | c8c430e | 2011-12-07 11:43:42 +0900 | [diff] [blame^] | 268 | unsigned int arm_volt; |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 269 | int err = -EINVAL; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 270 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 271 | freqs.old = exynos4_getspeed(policy->cpu); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 272 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 273 | mutex_lock(&cpufreq_lock); |
| 274 | |
| 275 | if (frequency_locked && target_freq != locking_frequency) { |
| 276 | err = -EAGAIN; |
| 277 | goto out; |
| 278 | } |
| 279 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 280 | if (cpufreq_frequency_table_target(policy, exynos4_freq_table, |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 281 | freqs.old, relation, &old_index)) |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 282 | goto out; |
Sangwook Ju | bf5ce05 | 2010-12-22 16:49:32 +0900 | [diff] [blame] | 283 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 284 | if (cpufreq_frequency_table_target(policy, exynos4_freq_table, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 285 | target_freq, relation, &index)) |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 286 | goto out; |
| 287 | |
| 288 | err = 0; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 289 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 290 | freqs.new = exynos4_freq_table[index].frequency; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 291 | freqs.cpu = policy->cpu; |
| 292 | |
| 293 | if (freqs.new == freqs.old) |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 294 | goto out; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 295 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 296 | /* get the voltage value */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 297 | arm_volt = exynos4_volt_table[index].arm_volt; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 298 | |
| 299 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
| 300 | |
| 301 | /* control regulator */ |
| 302 | if (freqs.new > freqs.old) { |
| 303 | /* Voltage up */ |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 304 | regulator_set_voltage(arm_regulator, arm_volt, arm_volt); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | /* Clock Configuration Procedure */ |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 308 | exynos4_set_frequency(old_index, index); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 309 | |
| 310 | /* control regulator */ |
| 311 | if (freqs.new < freqs.old) { |
| 312 | /* Voltage down */ |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 313 | regulator_set_voltage(arm_regulator, arm_volt, arm_volt); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
| 317 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 318 | out: |
| 319 | mutex_unlock(&cpufreq_lock); |
| 320 | return err; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | #ifdef CONFIG_PM |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 324 | /* |
| 325 | * These suspend/resume are used as syscore_ops, it is already too |
| 326 | * late to set regulator voltages at this stage. |
| 327 | */ |
Linus Torvalds | 411f5c7 | 2011-03-17 19:08:06 -0700 | [diff] [blame] | 328 | static int exynos4_cpufreq_suspend(struct cpufreq_policy *policy) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 329 | { |
| 330 | return 0; |
| 331 | } |
| 332 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 333 | static int exynos4_cpufreq_resume(struct cpufreq_policy *policy) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 334 | { |
| 335 | return 0; |
| 336 | } |
| 337 | #endif |
| 338 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 339 | /** |
| 340 | * exynos4_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume |
| 341 | * context |
| 342 | * @notifier |
| 343 | * @pm_event |
| 344 | * @v |
| 345 | * |
| 346 | * While frequency_locked == true, target() ignores every frequency but |
| 347 | * locking_frequency. The locking_frequency value is the initial frequency, |
| 348 | * which is set by the bootloader. In order to eliminate possible |
| 349 | * inconsistency in clock values, we save and restore frequencies during |
| 350 | * suspend and resume and block CPUFREQ activities. Note that the standard |
| 351 | * suspend/resume cannot be used as they are too deep (syscore_ops) for |
| 352 | * regulator actions. |
| 353 | */ |
| 354 | static int exynos4_cpufreq_pm_notifier(struct notifier_block *notifier, |
| 355 | unsigned long pm_event, void *v) |
| 356 | { |
| 357 | struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */ |
| 358 | static unsigned int saved_frequency; |
| 359 | unsigned int temp; |
| 360 | |
| 361 | mutex_lock(&cpufreq_lock); |
| 362 | switch (pm_event) { |
| 363 | case PM_SUSPEND_PREPARE: |
| 364 | if (frequency_locked) |
| 365 | goto out; |
| 366 | frequency_locked = true; |
| 367 | |
| 368 | if (locking_frequency) { |
| 369 | saved_frequency = exynos4_getspeed(0); |
| 370 | |
| 371 | mutex_unlock(&cpufreq_lock); |
| 372 | exynos4_target(policy, locking_frequency, |
| 373 | CPUFREQ_RELATION_H); |
| 374 | mutex_lock(&cpufreq_lock); |
| 375 | } |
| 376 | |
| 377 | break; |
| 378 | case PM_POST_SUSPEND: |
| 379 | |
| 380 | if (saved_frequency) { |
| 381 | /* |
| 382 | * While frequency_locked, only locking_frequency |
| 383 | * is valid for target(). In order to use |
| 384 | * saved_frequency while keeping frequency_locked, |
| 385 | * we temporarly overwrite locking_frequency. |
| 386 | */ |
| 387 | temp = locking_frequency; |
| 388 | locking_frequency = saved_frequency; |
| 389 | |
| 390 | mutex_unlock(&cpufreq_lock); |
| 391 | exynos4_target(policy, locking_frequency, |
| 392 | CPUFREQ_RELATION_H); |
| 393 | mutex_lock(&cpufreq_lock); |
| 394 | |
| 395 | locking_frequency = temp; |
| 396 | } |
| 397 | |
| 398 | frequency_locked = false; |
| 399 | break; |
| 400 | } |
| 401 | out: |
| 402 | mutex_unlock(&cpufreq_lock); |
| 403 | |
| 404 | return NOTIFY_OK; |
| 405 | } |
| 406 | |
| 407 | static struct notifier_block exynos4_cpufreq_nb = { |
| 408 | .notifier_call = exynos4_cpufreq_pm_notifier, |
| 409 | }; |
| 410 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 411 | static int exynos4_cpufreq_cpu_init(struct cpufreq_policy *policy) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 412 | { |
Donggeun Kim | 5beae3b | 2011-07-19 14:41:57 +0900 | [diff] [blame] | 413 | int ret; |
| 414 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 415 | policy->cur = policy->min = policy->max = exynos4_getspeed(policy->cpu); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 416 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 417 | cpufreq_frequency_table_get_attr(exynos4_freq_table, policy->cpu); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 418 | |
| 419 | /* set the transition latency value */ |
| 420 | policy->cpuinfo.transition_latency = 100000; |
| 421 | |
| 422 | /* |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 423 | * EXYNOS4 multi-core processors has 2 cores |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 424 | * that the frequency cannot be set independently. |
| 425 | * Each cpu is bound to the same speed. |
| 426 | * So the affected cpu is all of the cpus. |
| 427 | */ |
| 428 | cpumask_setall(policy->cpus); |
| 429 | |
Donggeun Kim | 5beae3b | 2011-07-19 14:41:57 +0900 | [diff] [blame] | 430 | ret = cpufreq_frequency_table_cpuinfo(policy, exynos4_freq_table); |
| 431 | if (ret) |
| 432 | return ret; |
| 433 | |
| 434 | cpufreq_frequency_table_get_attr(exynos4_freq_table, policy->cpu); |
| 435 | |
| 436 | return 0; |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 437 | } |
| 438 | |
Donggeun Kim | 5beae3b | 2011-07-19 14:41:57 +0900 | [diff] [blame] | 439 | static int exynos4_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
| 440 | { |
| 441 | cpufreq_frequency_table_put_attr(policy->cpu); |
| 442 | return 0; |
| 443 | } |
| 444 | |
| 445 | static struct freq_attr *exynos4_cpufreq_attr[] = { |
| 446 | &cpufreq_freq_attr_scaling_available_freqs, |
| 447 | NULL, |
| 448 | }; |
| 449 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 450 | static struct cpufreq_driver exynos4_driver = { |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 451 | .flags = CPUFREQ_STICKY, |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 452 | .verify = exynos4_verify_speed, |
| 453 | .target = exynos4_target, |
| 454 | .get = exynos4_getspeed, |
| 455 | .init = exynos4_cpufreq_cpu_init, |
Donggeun Kim | 5beae3b | 2011-07-19 14:41:57 +0900 | [diff] [blame] | 456 | .exit = exynos4_cpufreq_cpu_exit, |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 457 | .name = "exynos4_cpufreq", |
Donggeun Kim | 5beae3b | 2011-07-19 14:41:57 +0900 | [diff] [blame] | 458 | .attr = exynos4_cpufreq_attr, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 459 | #ifdef CONFIG_PM |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 460 | .suspend = exynos4_cpufreq_suspend, |
| 461 | .resume = exynos4_cpufreq_resume, |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 462 | #endif |
| 463 | }; |
| 464 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 465 | static int __init exynos4_cpufreq_init(void) |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 466 | { |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 467 | cpu_clk = clk_get(NULL, "armclk"); |
| 468 | if (IS_ERR(cpu_clk)) |
| 469 | return PTR_ERR(cpu_clk); |
| 470 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 471 | locking_frequency = exynos4_getspeed(0); |
| 472 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 473 | moutcore = clk_get(NULL, "moutcore"); |
| 474 | if (IS_ERR(moutcore)) |
| 475 | goto out; |
| 476 | |
| 477 | mout_mpll = clk_get(NULL, "mout_mpll"); |
| 478 | if (IS_ERR(mout_mpll)) |
| 479 | goto out; |
| 480 | |
| 481 | mout_apll = clk_get(NULL, "mout_apll"); |
| 482 | if (IS_ERR(mout_apll)) |
| 483 | goto out; |
| 484 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 485 | arm_regulator = regulator_get(NULL, "vdd_arm"); |
| 486 | if (IS_ERR(arm_regulator)) { |
| 487 | printk(KERN_ERR "failed to get resource %s\n", "vdd_arm"); |
| 488 | goto out; |
| 489 | } |
| 490 | |
MyungJoo Ham | 0073f53 | 2011-08-18 19:45:16 +0900 | [diff] [blame] | 491 | register_pm_notifier(&exynos4_cpufreq_nb); |
| 492 | |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 493 | return cpufreq_register_driver(&exynos4_driver); |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 494 | |
| 495 | out: |
| 496 | if (!IS_ERR(cpu_clk)) |
| 497 | clk_put(cpu_clk); |
| 498 | |
| 499 | if (!IS_ERR(moutcore)) |
| 500 | clk_put(moutcore); |
| 501 | |
| 502 | if (!IS_ERR(mout_mpll)) |
| 503 | clk_put(mout_mpll); |
| 504 | |
| 505 | if (!IS_ERR(mout_apll)) |
| 506 | clk_put(mout_apll); |
| 507 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 508 | if (!IS_ERR(arm_regulator)) |
| 509 | regulator_put(arm_regulator); |
| 510 | |
Sunyoung Kang | f40f91f | 2010-09-16 17:59:21 +0900 | [diff] [blame] | 511 | printk(KERN_ERR "%s: failed initialization\n", __func__); |
| 512 | |
| 513 | return -EINVAL; |
| 514 | } |
Kukjin Kim | 7d30e8b | 2011-02-14 16:33:10 +0900 | [diff] [blame] | 515 | late_initcall(exynos4_cpufreq_init); |