| Rajendra Nayak | 9b7fc90 | 2010-12-21 20:01:19 -0700 | [diff] [blame] | 1 | /* | 
| Paul Walmsley | 8179488 | 2011-09-14 11:34:21 -0600 | [diff] [blame] | 2 | * Common powerdomain framework functions | 
| Rajendra Nayak | 9b7fc90 | 2010-12-21 20:01:19 -0700 | [diff] [blame] | 3 | * | 
| Paul Walmsley | 8179488 | 2011-09-14 11:34:21 -0600 | [diff] [blame] | 4 | * Copyright (C) 2010-2011 Texas Instruments, Inc. | 
|  | 5 | * Copyright (C) 2010 Nokia Corporation | 
| Rajendra Nayak | 9b7fc90 | 2010-12-21 20:01:19 -0700 | [diff] [blame] | 6 | * | 
|  | 7 | * Derived from mach-omap2/powerdomain.c written by Paul Walmsley | 
|  | 8 | * | 
|  | 9 | * This program is free software; you can redistribute it and/or modify | 
|  | 10 | * it under the terms of the GNU General Public License version 2 as | 
|  | 11 | * published by the Free Software Foundation. | 
|  | 12 | */ | 
|  | 13 |  | 
|  | 14 | #include <linux/errno.h> | 
|  | 15 | #include <linux/kernel.h> | 
|  | 16 | #include "pm.h" | 
|  | 17 | #include "cm.h" | 
|  | 18 | #include "cm-regbits-34xx.h" | 
|  | 19 | #include "cm-regbits-44xx.h" | 
|  | 20 | #include "prm-regbits-34xx.h" | 
|  | 21 | #include "prm-regbits-44xx.h" | 
| Rajendra Nayak | 9b7fc90 | 2010-12-21 20:01:19 -0700 | [diff] [blame] | 22 |  | 
|  | 23 | /* | 
|  | 24 | * OMAP3 and OMAP4 specific register bit initialisations | 
|  | 25 | * Notice that the names here are not according to each power | 
|  | 26 | * domain but the bit mapping used applies to all of them | 
|  | 27 | */ | 
|  | 28 | /* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */ | 
|  | 29 | #define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK | 
|  | 30 | #define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK | 
|  | 31 | #define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK | 
|  | 32 | #define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK | 
|  | 33 | #define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK | 
|  | 34 |  | 
|  | 35 | /* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */ | 
|  | 36 | #define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE_MASK | 
|  | 37 | #define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE_MASK | 
|  | 38 | #define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE_MASK | 
|  | 39 | #define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE_MASK | 
|  | 40 | #define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK | 
|  | 41 |  | 
|  | 42 | /* OMAP3 and OMAP4 Memory Status bits */ | 
|  | 43 | #define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK | 
|  | 44 | #define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK | 
|  | 45 | #define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK | 
|  | 46 | #define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK | 
|  | 47 | #define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK | 
|  | 48 |  | 
|  | 49 | /* Common Internal functions used across OMAP rev's*/ | 
|  | 50 | u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank) | 
|  | 51 | { | 
|  | 52 | switch (bank) { | 
|  | 53 | case 0: | 
|  | 54 | return OMAP_MEM0_ONSTATE_MASK; | 
|  | 55 | case 1: | 
|  | 56 | return OMAP_MEM1_ONSTATE_MASK; | 
|  | 57 | case 2: | 
|  | 58 | return OMAP_MEM2_ONSTATE_MASK; | 
|  | 59 | case 3: | 
|  | 60 | return OMAP_MEM3_ONSTATE_MASK; | 
|  | 61 | case 4: | 
|  | 62 | return OMAP_MEM4_ONSTATE_MASK; | 
|  | 63 | default: | 
|  | 64 | WARN_ON(1); /* should never happen */ | 
|  | 65 | return -EEXIST; | 
|  | 66 | } | 
|  | 67 | return 0; | 
|  | 68 | } | 
|  | 69 |  | 
|  | 70 | u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank) | 
|  | 71 | { | 
|  | 72 | switch (bank) { | 
|  | 73 | case 0: | 
|  | 74 | return OMAP_MEM0_RETSTATE_MASK; | 
|  | 75 | case 1: | 
|  | 76 | return OMAP_MEM1_RETSTATE_MASK; | 
|  | 77 | case 2: | 
|  | 78 | return OMAP_MEM2_RETSTATE_MASK; | 
|  | 79 | case 3: | 
|  | 80 | return OMAP_MEM3_RETSTATE_MASK; | 
|  | 81 | case 4: | 
|  | 82 | return OMAP_MEM4_RETSTATE_MASK; | 
|  | 83 | default: | 
|  | 84 | WARN_ON(1); /* should never happen */ | 
|  | 85 | return -EEXIST; | 
|  | 86 | } | 
|  | 87 | return 0; | 
|  | 88 | } | 
|  | 89 |  | 
|  | 90 | u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank) | 
|  | 91 | { | 
|  | 92 | switch (bank) { | 
|  | 93 | case 0: | 
|  | 94 | return OMAP_MEM0_STATEST_MASK; | 
|  | 95 | case 1: | 
|  | 96 | return OMAP_MEM1_STATEST_MASK; | 
|  | 97 | case 2: | 
|  | 98 | return OMAP_MEM2_STATEST_MASK; | 
|  | 99 | case 3: | 
|  | 100 | return OMAP_MEM3_STATEST_MASK; | 
|  | 101 | case 4: | 
|  | 102 | return OMAP_MEM4_STATEST_MASK; | 
|  | 103 | default: | 
|  | 104 | WARN_ON(1); /* should never happen */ | 
|  | 105 | return -EEXIST; | 
|  | 106 | } | 
|  | 107 | return 0; | 
|  | 108 | } | 
|  | 109 |  |