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Kukjin Kimbe4ab362011-08-24 17:25:09 +09001/*
Changhwan Youn31451af2011-10-04 17:09:26 +09002 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
Kukjin Kimbe4ab362011-08-24 17:25:09 +09003 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
16#include <linux/mfd/max8997.h>
17#include <linux/mmc/host.h>
18#include <linux/platform_device.h>
19#include <linux/pwm_backlight.h>
20#include <linux/regulator/machine.h>
21#include <linux/serial_core.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
26#include <plat/backlight.h>
27#include <plat/clock.h>
28#include <plat/cpu.h>
29#include <plat/devs.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090030#include <plat/gpio-cfg.h>
31#include <plat/iic.h>
32#include <plat/keypad.h>
33#include <plat/regs-serial.h>
34#include <plat/sdhci.h>
35
36#include <mach/map.h>
37
Kukjin Kimcc511b82011-12-27 08:18:36 +010038#include "common.h"
39
Kukjin Kimbe4ab362011-08-24 17:25:09 +090040/* Following are default values for UCON, ULCON and UFCON UART registers */
Changhwan Youn31451af2011-10-04 17:09:26 +090041#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090042 S3C2410_UCON_RXILEVEL | \
43 S3C2410_UCON_TXIRQMODE | \
44 S3C2410_UCON_RXIRQMODE | \
45 S3C2410_UCON_RXFIFO_TOI | \
46 S3C2443_UCON_RXERR_IRQEN)
47
Changhwan Youn31451af2011-10-04 17:09:26 +090048#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
Kukjin Kimbe4ab362011-08-24 17:25:09 +090049
Changhwan Youn31451af2011-10-04 17:09:26 +090050#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090051 S5PV210_UFCON_TXTRIG4 | \
52 S5PV210_UFCON_RXTRIG4)
53
Changhwan Youn31451af2011-10-04 17:09:26 +090054static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090055 [0] = {
56 .hwport = 0,
57 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090058 .ucon = SMDK4X12_UCON_DEFAULT,
59 .ulcon = SMDK4X12_ULCON_DEFAULT,
60 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090061 },
62 [1] = {
63 .hwport = 1,
64 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090065 .ucon = SMDK4X12_UCON_DEFAULT,
66 .ulcon = SMDK4X12_ULCON_DEFAULT,
67 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090068 },
69 [2] = {
70 .hwport = 2,
71 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090072 .ucon = SMDK4X12_UCON_DEFAULT,
73 .ulcon = SMDK4X12_ULCON_DEFAULT,
74 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090075 },
76 [3] = {
77 .hwport = 3,
78 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090079 .ucon = SMDK4X12_UCON_DEFAULT,
80 .ulcon = SMDK4X12_ULCON_DEFAULT,
81 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090082 },
83};
84
Changhwan Youn31451af2011-10-04 17:09:26 +090085static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090086 .cd_type = S3C_SDHCI_CD_INTERNAL,
87 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
88#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
89 .max_width = 8,
90 .host_caps = MMC_CAP_8_BIT_DATA,
91#endif
92};
93
Changhwan Youn31451af2011-10-04 17:09:26 +090094static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090095 .cd_type = S3C_SDHCI_CD_INTERNAL,
96 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
97};
98
99static struct regulator_consumer_supply max8997_buck1 =
100 REGULATOR_SUPPLY("vdd_arm", NULL);
101
102static struct regulator_consumer_supply max8997_buck2 =
103 REGULATOR_SUPPLY("vdd_int", NULL);
104
105static struct regulator_consumer_supply max8997_buck3 =
106 REGULATOR_SUPPLY("vdd_g3d", NULL);
107
108static struct regulator_init_data max8997_buck1_data = {
109 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900110 .name = "VDD_ARM_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900111 .min_uV = 925000,
112 .max_uV = 1350000,
113 .always_on = 1,
114 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
115 .state_mem = {
116 .disabled = 1,
117 },
118 },
119 .num_consumer_supplies = 1,
120 .consumer_supplies = &max8997_buck1,
121};
122
123static struct regulator_init_data max8997_buck2_data = {
124 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900125 .name = "VDD_INT_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900126 .min_uV = 950000,
127 .max_uV = 1150000,
128 .always_on = 1,
129 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
130 .state_mem = {
131 .disabled = 1,
132 },
133 },
134 .num_consumer_supplies = 1,
135 .consumer_supplies = &max8997_buck2,
136};
137
138static struct regulator_init_data max8997_buck3_data = {
139 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900140 .name = "VDD_G3D_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900141 .min_uV = 950000,
142 .max_uV = 1150000,
143 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
144 REGULATOR_CHANGE_STATUS,
145 .state_mem = {
146 .disabled = 1,
147 },
148 },
149 .num_consumer_supplies = 1,
150 .consumer_supplies = &max8997_buck3,
151};
152
Changhwan Youn31451af2011-10-04 17:09:26 +0900153static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900154 { MAX8997_BUCK1, &max8997_buck1_data },
155 { MAX8997_BUCK2, &max8997_buck2_data },
156 { MAX8997_BUCK3, &max8997_buck3_data },
157};
158
Changhwan Youn31451af2011-10-04 17:09:26 +0900159static struct max8997_platform_data smdk4x12_max8997_pdata = {
160 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
161 .regulators = smdk4x12_max8997_regulators,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900162
163 .buck1_voltage[0] = 1100000, /* 1.1V */
164 .buck1_voltage[1] = 1100000, /* 1.1V */
165 .buck1_voltage[2] = 1100000, /* 1.1V */
166 .buck1_voltage[3] = 1100000, /* 1.1V */
167 .buck1_voltage[4] = 1100000, /* 1.1V */
168 .buck1_voltage[5] = 1100000, /* 1.1V */
169 .buck1_voltage[6] = 1000000, /* 1.0V */
170 .buck1_voltage[7] = 950000, /* 0.95V */
171
172 .buck2_voltage[0] = 1100000, /* 1.1V */
173 .buck2_voltage[1] = 1000000, /* 1.0V */
174 .buck2_voltage[2] = 950000, /* 0.95V */
175 .buck2_voltage[3] = 900000, /* 0.9V */
176 .buck2_voltage[4] = 1100000, /* 1.1V */
177 .buck2_voltage[5] = 1000000, /* 1.0V */
178 .buck2_voltage[6] = 950000, /* 0.95V */
179 .buck2_voltage[7] = 900000, /* 0.9V */
180
181 .buck5_voltage[0] = 1100000, /* 1.1V */
182 .buck5_voltage[1] = 1100000, /* 1.1V */
183 .buck5_voltage[2] = 1100000, /* 1.1V */
184 .buck5_voltage[3] = 1100000, /* 1.1V */
185 .buck5_voltage[4] = 1100000, /* 1.1V */
186 .buck5_voltage[5] = 1100000, /* 1.1V */
187 .buck5_voltage[6] = 1100000, /* 1.1V */
188 .buck5_voltage[7] = 1100000, /* 1.1V */
189};
190
Changhwan Youn31451af2011-10-04 17:09:26 +0900191static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900192 {
193 I2C_BOARD_INFO("max8997", 0x66),
Changhwan Youn31451af2011-10-04 17:09:26 +0900194 .platform_data = &smdk4x12_max8997_pdata,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900195 }
196};
197
Changhwan Youn31451af2011-10-04 17:09:26 +0900198static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900199 { I2C_BOARD_INFO("wm8994", 0x1a), }
200};
201
Changhwan Youn31451af2011-10-04 17:09:26 +0900202static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900203 /* nothing here yet */
204};
205
Changhwan Youn31451af2011-10-04 17:09:26 +0900206static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900207 /* nothing here yet */
208};
209
Changhwan Youn31451af2011-10-04 17:09:26 +0900210static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900211 .no = EXYNOS4_GPD0(1),
212 .func = S3C_GPIO_SFN(2),
213};
214
Changhwan Youn31451af2011-10-04 17:09:26 +0900215static struct platform_pwm_backlight_data smdk4x12_bl_data = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900216 .pwm_id = 1,
217 .pwm_period_ns = 1000,
218};
219
Changhwan Youn31451af2011-10-04 17:09:26 +0900220static uint32_t smdk4x12_keymap[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900221 /* KEY(row, col, keycode) */
222 KEY(1, 0, KEY_D), KEY(1, 1, KEY_A), KEY(1, 2, KEY_B),
223 KEY(1, 3, KEY_E), KEY(1, 4, KEY_C)
224};
225
Changhwan Youn31451af2011-10-04 17:09:26 +0900226static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
227 .keymap = smdk4x12_keymap,
228 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900229};
230
Changhwan Youn31451af2011-10-04 17:09:26 +0900231static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
232 .keymap_data = &smdk4x12_keymap_data,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900233 .rows = 2,
234 .cols = 5,
235};
236
Changhwan Youn31451af2011-10-04 17:09:26 +0900237static struct platform_device *smdk4x12_devices[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900238 &s3c_device_hsmmc2,
239 &s3c_device_hsmmc3,
240 &s3c_device_i2c0,
241 &s3c_device_i2c1,
242 &s3c_device_i2c3,
243 &s3c_device_i2c7,
244 &s3c_device_rtc,
245 &s3c_device_wdt,
246 &samsung_device_keypad,
247};
248
Changhwan Youn31451af2011-10-04 17:09:26 +0900249static void __init smdk4x12_map_io(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900250{
251 clk_xusbxti.rate = 24000000;
252
Kukjin Kimcc511b82011-12-27 08:18:36 +0100253 exynos_init_io(NULL, 0);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900254 s3c24xx_init_clocks(clk_xusbxti.rate);
Changhwan Youn31451af2011-10-04 17:09:26 +0900255 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900256}
257
Changhwan Youn31451af2011-10-04 17:09:26 +0900258static void __init smdk4x12_machine_init(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900259{
260 s3c_i2c0_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900261 i2c_register_board_info(0, smdk4x12_i2c_devs0,
262 ARRAY_SIZE(smdk4x12_i2c_devs0));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900263
264 s3c_i2c1_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900265 i2c_register_board_info(1, smdk4x12_i2c_devs1,
266 ARRAY_SIZE(smdk4x12_i2c_devs1));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900267
268 s3c_i2c3_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900269 i2c_register_board_info(3, smdk4x12_i2c_devs3,
270 ARRAY_SIZE(smdk4x12_i2c_devs3));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900271
272 s3c_i2c7_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900273 i2c_register_board_info(7, smdk4x12_i2c_devs7,
274 ARRAY_SIZE(smdk4x12_i2c_devs7));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900275
Changhwan Youn31451af2011-10-04 17:09:26 +0900276 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900277
Changhwan Youn31451af2011-10-04 17:09:26 +0900278 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900279
Changhwan Youn31451af2011-10-04 17:09:26 +0900280 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
281 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900282
Changhwan Youn31451af2011-10-04 17:09:26 +0900283 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900284}
285
286MACHINE_START(SMDK4212, "SMDK4212")
287 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Changhwan Youn31451af2011-10-04 17:09:26 +0900288 .atag_offset = 0x100,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900289 .init_irq = exynos4_init_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900290 .map_io = smdk4x12_map_io,
291 .init_machine = smdk4x12_machine_init,
292 .timer = &exynos4_timer,
293MACHINE_END
294
295MACHINE_START(SMDK4412, "SMDK4412")
296 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
297 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
298 .atag_offset = 0x100,
299 .init_irq = exynos4_init_irq,
300 .map_io = smdk4x12_map_io,
301 .init_machine = smdk4x12_machine_init,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900302 .timer = &exynos4_timer,
303MACHINE_END