blob: 52c7eae08d44a8fde30529be987d49c6d3f8a077 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/version.h>
30#include <linux/init.h>
31#include <linux/pci.h>
32#include <linux/dma-mapping.h>
33#include <linux/delay.h>
34#include <linux/skbuff.h>
35#include <linux/netdevice.h>
36#include <linux/wireless.h>
37#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070038#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080039#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070040
Assaf Krauss6bc913b2008-03-11 16:17:18 -070041#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070042#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070043#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070044#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070045#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070046#include "iwl-calib.h"
Zhu Yib481de92007-09-25 17:54:57 -070047
Assaf Krauss1ea87392008-03-18 14:57:50 -070048/* module parameters */
49static struct iwl_mod_params iwl4965_mod_params = {
Emmanuel Grumbach038669e2008-04-23 17:15:04 -070050 .num_of_queues = IWL49_NUM_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -070051 .enable_qos = 1,
52 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080053 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070054 /* the rest are 0 by default */
55};
56
Ron Rindjunskyfe01b472008-01-28 14:07:24 +020057#ifdef CONFIG_IWL4965_HT
58
59static const u16 default_tid_to_tx_fifo[] = {
60 IWL_TX_FIFO_AC1,
61 IWL_TX_FIFO_AC0,
62 IWL_TX_FIFO_AC0,
63 IWL_TX_FIFO_AC1,
64 IWL_TX_FIFO_AC2,
65 IWL_TX_FIFO_AC2,
66 IWL_TX_FIFO_AC3,
67 IWL_TX_FIFO_AC3,
68 IWL_TX_FIFO_NONE,
69 IWL_TX_FIFO_NONE,
70 IWL_TX_FIFO_NONE,
71 IWL_TX_FIFO_NONE,
72 IWL_TX_FIFO_NONE,
73 IWL_TX_FIFO_NONE,
74 IWL_TX_FIFO_NONE,
75 IWL_TX_FIFO_NONE,
76 IWL_TX_FIFO_AC3
77};
78
79#endif /*CONFIG_IWL4965_HT */
80
Tomas Winkler57aab752008-04-14 21:16:03 -070081/* check contents of special bootstrap uCode SRAM */
82static int iwl4965_verify_bsm(struct iwl_priv *priv)
83{
84 __le32 *image = priv->ucode_boot.v_addr;
85 u32 len = priv->ucode_boot.len;
86 u32 reg;
87 u32 val;
88
89 IWL_DEBUG_INFO("Begin verify bsm\n");
90
91 /* verify BSM SRAM contents */
92 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
93 for (reg = BSM_SRAM_LOWER_BOUND;
94 reg < BSM_SRAM_LOWER_BOUND + len;
95 reg += sizeof(u32), image++) {
96 val = iwl_read_prph(priv, reg);
97 if (val != le32_to_cpu(*image)) {
98 IWL_ERROR("BSM uCode verification failed at "
99 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
100 BSM_SRAM_LOWER_BOUND,
101 reg - BSM_SRAM_LOWER_BOUND, len,
102 val, le32_to_cpu(*image));
103 return -EIO;
104 }
105 }
106
107 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
108
109 return 0;
110}
111
112/**
113 * iwl4965_load_bsm - Load bootstrap instructions
114 *
115 * BSM operation:
116 *
117 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
118 * in special SRAM that does not power down during RFKILL. When powering back
119 * up after power-saving sleeps (or during initial uCode load), the BSM loads
120 * the bootstrap program into the on-board processor, and starts it.
121 *
122 * The bootstrap program loads (via DMA) instructions and data for a new
123 * program from host DRAM locations indicated by the host driver in the
124 * BSM_DRAM_* registers. Once the new program is loaded, it starts
125 * automatically.
126 *
127 * When initializing the NIC, the host driver points the BSM to the
128 * "initialize" uCode image. This uCode sets up some internal data, then
129 * notifies host via "initialize alive" that it is complete.
130 *
131 * The host then replaces the BSM_DRAM_* pointer values to point to the
132 * normal runtime uCode instructions and a backup uCode data cache buffer
133 * (filled initially with starting data values for the on-board processor),
134 * then triggers the "initialize" uCode to load and launch the runtime uCode,
135 * which begins normal operation.
136 *
137 * When doing a power-save shutdown, runtime uCode saves data SRAM into
138 * the backup data cache in DRAM before SRAM is powered down.
139 *
140 * When powering back up, the BSM loads the bootstrap program. This reloads
141 * the runtime uCode instructions and the backup data cache into SRAM,
142 * and re-launches the runtime uCode from where it left off.
143 */
144static int iwl4965_load_bsm(struct iwl_priv *priv)
145{
146 __le32 *image = priv->ucode_boot.v_addr;
147 u32 len = priv->ucode_boot.len;
148 dma_addr_t pinst;
149 dma_addr_t pdata;
150 u32 inst_len;
151 u32 data_len;
152 int i;
153 u32 done;
154 u32 reg_offset;
155 int ret;
156
157 IWL_DEBUG_INFO("Begin load bsm\n");
158
159 /* make sure bootstrap program is no larger than BSM's SRAM size */
160 if (len > IWL_MAX_BSM_SIZE)
161 return -EINVAL;
162
163 /* Tell bootstrap uCode where to find the "Initialize" uCode
164 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
165 * NOTE: iwl4965_initialize_alive_start() will replace these values,
166 * after the "initialize" uCode has run, to point to
167 * runtime/protocol instructions and backup data cache. */
168 pinst = priv->ucode_init.p_addr >> 4;
169 pdata = priv->ucode_init_data.p_addr >> 4;
170 inst_len = priv->ucode_init.len;
171 data_len = priv->ucode_init_data.len;
172
173 ret = iwl_grab_nic_access(priv);
174 if (ret)
175 return ret;
176
177 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
178 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
179 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
180 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
181
182 /* Fill BSM memory with bootstrap instructions */
183 for (reg_offset = BSM_SRAM_LOWER_BOUND;
184 reg_offset < BSM_SRAM_LOWER_BOUND + len;
185 reg_offset += sizeof(u32), image++)
186 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
187
188 ret = iwl4965_verify_bsm(priv);
189 if (ret) {
190 iwl_release_nic_access(priv);
191 return ret;
192 }
193
194 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
195 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
196 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
197 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
198
199 /* Load bootstrap code into instruction SRAM now,
200 * to prepare to load "initialize" uCode */
201 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
202
203 /* Wait for load of bootstrap uCode to finish */
204 for (i = 0; i < 100; i++) {
205 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
206 if (!(done & BSM_WR_CTRL_REG_BIT_START))
207 break;
208 udelay(10);
209 }
210 if (i < 100)
211 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
212 else {
213 IWL_ERROR("BSM write did not complete!\n");
214 return -EIO;
215 }
216
217 /* Enable future boot loads whenever power management unit triggers it
218 * (e.g. when powering back up after power-save shutdown) */
219 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
220
221 iwl_release_nic_access(priv);
222
223 return 0;
224}
225
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800226/**
227 * iwl4965_set_ucode_ptrs - Set uCode address location
228 *
229 * Tell initialization uCode where to find runtime uCode.
230 *
231 * BSM registers initially contain pointers to initialization uCode.
232 * We need to replace them to load runtime uCode inst and data,
233 * and to save runtime data when powering down.
234 */
235static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
236{
237 dma_addr_t pinst;
238 dma_addr_t pdata;
239 unsigned long flags;
240 int ret = 0;
241
242 /* bits 35:4 for 4965 */
243 pinst = priv->ucode_code.p_addr >> 4;
244 pdata = priv->ucode_data_backup.p_addr >> 4;
245
246 spin_lock_irqsave(&priv->lock, flags);
247 ret = iwl_grab_nic_access(priv);
248 if (ret) {
249 spin_unlock_irqrestore(&priv->lock, flags);
250 return ret;
251 }
252
253 /* Tell bootstrap uCode where to find image to load */
254 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
255 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
256 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
257 priv->ucode_data.len);
258
259 /* Inst bytecount must be last to set up, bit 31 signals uCode
260 * that all new ptr/size info is in place */
261 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
262 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
263 iwl_release_nic_access(priv);
264
265 spin_unlock_irqrestore(&priv->lock, flags);
266
267 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
268
269 return ret;
270}
271
272/**
273 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
274 *
275 * Called after REPLY_ALIVE notification received from "initialize" uCode.
276 *
277 * The 4965 "initialize" ALIVE reply contains calibration data for:
278 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
279 * (3945 does not contain this data).
280 *
281 * Tell "initialize" uCode to go ahead and load the runtime uCode.
282*/
283static void iwl4965_init_alive_start(struct iwl_priv *priv)
284{
285 /* Check alive response for "valid" sign from uCode */
286 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
287 /* We had an error bringing up the hardware, so take it
288 * all the way back down so we can try again */
289 IWL_DEBUG_INFO("Initialize Alive failed.\n");
290 goto restart;
291 }
292
293 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
294 * This is a paranoid check, because we would not have gotten the
295 * "initialize" alive if code weren't properly loaded. */
296 if (iwl_verify_ucode(priv)) {
297 /* Runtime instruction load was bad;
298 * take it all the way back down so we can try again */
299 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
300 goto restart;
301 }
302
303 /* Calculate temperature */
304 priv->temperature = iwl4965_get_temperature(priv);
305
306 /* Send pointers to protocol/runtime uCode image ... init code will
307 * load and launch runtime uCode, which will send us another "Alive"
308 * notification. */
309 IWL_DEBUG_INFO("Initialization Alive received.\n");
310 if (iwl4965_set_ucode_ptrs(priv)) {
311 /* Runtime instruction load won't happen;
312 * take it all the way back down so we can try again */
313 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
314 goto restart;
315 }
316 return;
317
318restart:
319 queue_work(priv->workqueue, &priv->restart);
320}
321
Zhu Yib481de92007-09-25 17:54:57 -0700322static int is_fat_channel(__le32 rxon_flags)
323{
324 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
325 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
326}
327
Tomas Winkler17744ff2008-03-02 01:52:00 +0200328int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
329{
330 int idx = 0;
331
332 /* 4965 HT rate format */
333 if (rate_n_flags & RATE_MCS_HT_MSK) {
334 idx = (rate_n_flags & 0xff);
335
Guy Cohenfde0db32008-04-21 15:42:01 -0700336 if (idx >= IWL_RATE_MIMO2_6M_PLCP)
337 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
Tomas Winkler17744ff2008-03-02 01:52:00 +0200338
339 idx += IWL_FIRST_OFDM_RATE;
340 /* skip 9M not supported in ht*/
341 if (idx >= IWL_RATE_9M_INDEX)
342 idx += 1;
343 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
344 return idx;
345
346 /* 4965 legacy rate format, search for match in table */
347 } else {
Tomas Winkler1826dcc2008-05-15 13:54:02 +0800348 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
349 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
Tomas Winkler17744ff2008-03-02 01:52:00 +0200350 return idx;
351 }
352
353 return -1;
354}
355
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800356/**
357 * translate ucode response to mac80211 tx status control values
358 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700359void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800360 struct ieee80211_tx_control *control)
361{
362 int rate_index;
363
364 control->antenna_sel_tx =
Guy Cohenfde0db32008-04-21 15:42:01 -0700365 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
Ron Rindjunsky4c424e42008-03-04 18:09:27 -0800366 if (rate_n_flags & RATE_MCS_HT_MSK)
367 control->flags |= IEEE80211_TXCTL_OFDM_HT;
368 if (rate_n_flags & RATE_MCS_GF_MSK)
369 control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
370 if (rate_n_flags & RATE_MCS_FAT_MSK)
371 control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
372 if (rate_n_flags & RATE_MCS_DUP_MSK)
373 control->flags |= IEEE80211_TXCTL_DUP_DATA;
374 if (rate_n_flags & RATE_MCS_SGI_MSK)
375 control->flags |= IEEE80211_TXCTL_SHORT_GI;
376 /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
377 * IEEE80211_BAND_2GHZ band as it contains all the rates */
378 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
379 if (rate_index == -1)
380 control->tx_rate = NULL;
381 else
382 control->tx_rate =
383 &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
384}
Tomas Winkler17744ff2008-03-02 01:52:00 +0200385
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700386int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700387{
388 int rc;
389 unsigned long flags;
390
391 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700392 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700393 if (rc) {
394 spin_unlock_irqrestore(&priv->lock, flags);
395 return rc;
396 }
397
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800398 /* stop Rx DMA */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700399 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
400 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
Zhu Yib481de92007-09-25 17:54:57 -0700401 (1 << 24), 1000);
402 if (rc < 0)
403 IWL_ERROR("Can't stop Rx DMA.\n");
404
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700405 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700406 spin_unlock_irqrestore(&priv->lock, flags);
407
408 return 0;
409}
410
Tomas Winkler8614f362008-04-23 17:14:55 -0700411/*
412 * EEPROM handlers
413 */
414
415static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
416{
417 u16 eeprom_ver;
418 u16 calib_ver;
419
420 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
421
422 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
423
424 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
425 calib_ver < EEPROM_4965_TX_POWER_VERSION)
426 goto err;
427
428 return 0;
429err:
430 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
431 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
432 calib_ver, EEPROM_4965_TX_POWER_VERSION);
433 return -EINVAL;
434
435}
Tomas Winkler079a2532008-04-17 16:03:39 -0700436int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
Zhu Yib481de92007-09-25 17:54:57 -0700437{
Tomas Winklerd8609652007-10-25 17:15:35 +0800438 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700439 unsigned long flags;
440
441 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700442 ret = iwl_grab_nic_access(priv);
Tomas Winklerd8609652007-10-25 17:15:35 +0800443 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700444 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winklerd8609652007-10-25 17:15:35 +0800445 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700446 }
447
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700448 if (src == IWL_PWR_SRC_VAUX) {
Zhu Yib481de92007-09-25 17:54:57 -0700449 u32 val;
Tomas Winklerd8609652007-10-25 17:15:35 +0800450 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700451 &val);
Zhu Yib481de92007-09-25 17:54:57 -0700452
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700453 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700454 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700455 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
456 ~APMG_PS_CTRL_MSK_PWR_SRC);
457 }
458 } else {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700459 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
Tomas Winkler6f4083a2008-04-16 16:34:49 -0700460 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
461 ~APMG_PS_CTRL_MSK_PWR_SRC);
462 }
Zhu Yib481de92007-09-25 17:54:57 -0700463
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700464 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700465 spin_unlock_irqrestore(&priv->lock, flags);
466
Tomas Winklerd8609652007-10-25 17:15:35 +0800467 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700468}
469
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800470static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700471{
Zhu Yib481de92007-09-25 17:54:57 -0700472 unsigned long flags;
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800473 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700474
475 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800476
Tomas Winkler059ff822008-04-14 21:16:14 -0700477 ret = iwl_grab_nic_access(priv);
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800478 if (unlikely(ret)) {
479 IWL_ERROR("Tx fifo reset failed");
Zhu Yib481de92007-09-25 17:54:57 -0700480 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler059ff822008-04-14 21:16:14 -0700481 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700482 }
483
Tomas Winkler12a81f62008-04-03 16:05:20 -0700484 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700485 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700486 spin_unlock_irqrestore(&priv->lock, flags);
487
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800488 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700489}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800490
Tomas Winkler91238712008-04-23 17:14:53 -0700491static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700492{
Tomas Winkler91238712008-04-23 17:14:53 -0700493 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700494
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700495 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700496 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700497
Tomas Winkler91238712008-04-23 17:14:53 -0700498 /* set "initialization complete" bit to move adapter
499 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700500 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700501
502 /* wait for clock stabilization */
503 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
504 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
505 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
506 if (ret < 0) {
Zhu Yib481de92007-09-25 17:54:57 -0700507 IWL_DEBUG_INFO("Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700508 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700509 }
510
Tomas Winkler91238712008-04-23 17:14:53 -0700511 ret = iwl_grab_nic_access(priv);
512 if (ret)
513 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700514
Tomas Winkler91238712008-04-23 17:14:53 -0700515 /* enable DMA */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700516 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
517 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700518
519 udelay(20);
520
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700521 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700522 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700523
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700524 iwl_release_nic_access(priv);
Tomas Winkler91238712008-04-23 17:14:53 -0700525out:
Tomas Winkler91238712008-04-23 17:14:53 -0700526 return ret;
527}
528
Tomas Winkler694cc562008-04-24 11:55:22 -0700529
530static void iwl4965_nic_config(struct iwl_priv *priv)
531{
532 unsigned long flags;
533 u32 val;
534 u16 radio_cfg;
535 u8 val_link;
536
537 spin_lock_irqsave(&priv->lock, flags);
538
539 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
540 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
541 /* Enable No Snoop field */
542 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
543 val & ~(1 << 11));
544 }
545
546 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
547
548 /* disable L1 entry -- workaround for pre-B1 */
549 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
550
551 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
552
553 /* write radio config values to register */
554 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
555 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
556 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
557 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
558 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
559
560 /* set CSR_HW_CONFIG_REG for uCode use */
561 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
562 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
563 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
564
565 priv->calib_info = (struct iwl_eeprom_calib_info *)
566 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
567
568 spin_unlock_irqrestore(&priv->lock, flags);
569}
570
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700571int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700572{
573 int rc = 0;
574 u32 reg_val;
575 unsigned long flags;
576
577 spin_lock_irqsave(&priv->lock, flags);
578
579 /* set stop master bit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700580 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
Zhu Yib481de92007-09-25 17:54:57 -0700581
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700582 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
Zhu Yib481de92007-09-25 17:54:57 -0700583
584 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
585 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
586 IWL_DEBUG_INFO("Card in power save, master is already "
587 "stopped\n");
588 else {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700589 rc = iwl_poll_bit(priv, CSR_RESET,
Zhu Yib481de92007-09-25 17:54:57 -0700590 CSR_RESET_REG_FLAG_MASTER_DISABLED,
591 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
592 if (rc < 0) {
593 spin_unlock_irqrestore(&priv->lock, flags);
594 return rc;
595 }
596 }
597
598 spin_unlock_irqrestore(&priv->lock, flags);
599 IWL_DEBUG_INFO("stop master\n");
600
601 return rc;
602}
603
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800604/**
605 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
606 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700607void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700608{
609
610 int txq_id;
611 unsigned long flags;
612
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800613 /* Stop each Tx DMA channel, and wait for it to be idle */
Tomas Winkler5425e492008-04-15 16:01:38 -0700614 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
Zhu Yib481de92007-09-25 17:54:57 -0700615 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700616 if (iwl_grab_nic_access(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -0700617 spin_unlock_irqrestore(&priv->lock, flags);
618 continue;
619 }
620
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700621 iwl_write_direct32(priv,
Emmanuel Grumbach4b52c392008-04-23 17:15:07 -0700622 FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
623 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
624 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700625 (txq_id), 200);
626 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700627 spin_unlock_irqrestore(&priv->lock, flags);
628 }
629
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800630 /* Deallocate memory for all Tx queues */
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800631 iwl_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700632}
633
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700634int iwl4965_hw_nic_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700635{
636 int rc = 0;
637 unsigned long flags;
638
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800639 iwl4965_hw_nic_stop_master(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700640
641 spin_lock_irqsave(&priv->lock, flags);
642
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700643 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
Zhu Yib481de92007-09-25 17:54:57 -0700644
645 udelay(10);
646
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700647 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
648 rc = iwl_poll_bit(priv, CSR_RESET,
Zhu Yib481de92007-09-25 17:54:57 -0700649 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
650 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
651
652 udelay(10);
653
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700654 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700655 if (!rc) {
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700656 iwl_write_prph(priv, APMG_CLK_EN_REG,
657 APMG_CLK_VAL_DMA_CLK_RQT |
658 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700659
660 udelay(10);
661
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700662 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
663 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700664
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700665 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700666 }
667
668 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
669 wake_up_interruptible(&priv->wait_command_queue);
670
671 spin_unlock_irqrestore(&priv->lock, flags);
672
673 return rc;
674
675}
676
677#define REG_RECALIB_PERIOD (60)
678
679/**
680 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
681 *
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700682 * This callback is provided in order to send a statistics request.
Zhu Yib481de92007-09-25 17:54:57 -0700683 *
684 * This timer function is continually reset to execute within
685 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
686 * was received. We need to ensure we receive the statistics in order
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700687 * to update the temperature used for calibrating the TXPOWER.
Zhu Yib481de92007-09-25 17:54:57 -0700688 */
689static void iwl4965_bg_statistics_periodic(unsigned long data)
690{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700691 struct iwl_priv *priv = (struct iwl_priv *)data;
Zhu Yib481de92007-09-25 17:54:57 -0700692
Zhu Yib481de92007-09-25 17:54:57 -0700693 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
694 return;
695
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -0700696 iwl_send_statistics_request(priv, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -0700697}
698
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700699void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700700{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800701 struct iwl4965_ct_kill_config cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700702 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700703 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700704
705 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700706 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -0700707 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
708 spin_unlock_irqrestore(&priv->lock, flags);
709
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700710 cmd.critical_temperature_R =
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700711 cpu_to_le32(priv->hw_params.ct_kill_threshold);
712
Tomas Winkler857485c2008-03-21 13:53:44 -0700713 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
714 sizeof(cmd), &cmd);
715 if (ret)
Zhu Yib481de92007-09-25 17:54:57 -0700716 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
717 else
Emmanuel Grumbachb73cdf22008-04-21 15:41:58 -0700718 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
719 "critical temperature is %d\n",
720 cmd.critical_temperature_R);
Zhu Yib481de92007-09-25 17:54:57 -0700721}
722
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700723#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -0700724
725/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
726 * Called after every association, but this runs only once!
727 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700728static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700729{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700730 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700731
Tomas Winkler3109ece2008-03-28 16:33:35 -0700732 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800733 struct iwl4965_calibration_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700734
735 memset(&cmd, 0, sizeof(cmd));
736 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
737 cmd.diff_gain_a = 0;
738 cmd.diff_gain_b = 0;
739 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700740 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
741 sizeof(cmd), &cmd))
742 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700743 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
744 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
745 }
Zhu Yib481de92007-09-25 17:54:57 -0700746}
747
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700748static void iwl4965_gain_computation(struct iwl_priv *priv,
749 u32 *average_noise,
750 u16 min_average_noise_antenna_i,
751 u32 min_average_noise)
Zhu Yib481de92007-09-25 17:54:57 -0700752{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700753 int i, ret;
754 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700755
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700756 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700757
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700758 for (i = 0; i < NUM_RX_CHAINS; i++) {
759 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700760
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700761 if (!(data->disconn_array[i]) &&
762 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700763 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700764 delta_g = average_noise[i] - min_average_noise;
765 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
766 data->delta_gain_code[i] =
767 min(data->delta_gain_code[i],
768 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700769
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700770 data->delta_gain_code[i] =
771 (data->delta_gain_code[i] | (1 << 2));
772 } else {
773 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700774 }
Zhu Yib481de92007-09-25 17:54:57 -0700775 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700776 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
777 data->delta_gain_code[0],
778 data->delta_gain_code[1],
779 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700780
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700781 /* Differential gain gets sent to uCode only once */
782 if (!data->radio_write) {
783 struct iwl4965_calibration_cmd cmd;
784 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700785
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700786 memset(&cmd, 0, sizeof(cmd));
787 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
788 cmd.diff_gain_a = data->delta_gain_code[0];
789 cmd.diff_gain_b = data->delta_gain_code[1];
790 cmd.diff_gain_c = data->delta_gain_code[2];
791 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
792 sizeof(cmd), &cmd);
793 if (ret)
794 IWL_DEBUG_CALIB("fail sending cmd "
795 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700796
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700797 /* TODO we might want recalculate
798 * rx_chain in rxon cmd */
799
800 /* Mark so we run this algo only once! */
801 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700802 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700803 data->chain_noise_a = 0;
804 data->chain_noise_b = 0;
805 data->chain_noise_c = 0;
806 data->chain_signal_a = 0;
807 data->chain_signal_b = 0;
808 data->chain_signal_c = 0;
809 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700810}
811
812static void iwl4965_bg_sensitivity_work(struct work_struct *work)
813{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700814 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700815 sensitivity_work);
816
817 mutex_lock(&priv->mutex);
818
819 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
820 test_bit(STATUS_SCANNING, &priv->status)) {
821 mutex_unlock(&priv->mutex);
822 return;
823 }
824
825 if (priv->start_calib) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700826 iwl_chain_noise_calibration(priv, &priv->statistics);
Zhu Yib481de92007-09-25 17:54:57 -0700827
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700828 iwl_sensitivity_calibration(priv, &priv->statistics);
Zhu Yib481de92007-09-25 17:54:57 -0700829 }
830
831 mutex_unlock(&priv->mutex);
832 return;
833}
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700834#endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
Zhu Yib481de92007-09-25 17:54:57 -0700835
836static void iwl4965_bg_txpower_work(struct work_struct *work)
837{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700838 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700839 txpower_work);
840
841 /* If a scan happened to start before we got here
842 * then just return; the statistics notification will
843 * kick off another scheduled work to compensate for
844 * any temperature delta we missed here. */
845 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
846 test_bit(STATUS_SCANNING, &priv->status))
847 return;
848
849 mutex_lock(&priv->mutex);
850
851 /* Regardless of if we are assocaited, we must reconfigure the
852 * TX power since frames can be sent on non-radar channels while
853 * not associated */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800854 iwl4965_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700855
856 /* Update last_temperature to keep is_calib_needed from running
857 * when it isn't needed... */
858 priv->last_temperature = priv->temperature;
859
860 mutex_unlock(&priv->mutex);
861}
862
863/*
864 * Acquire priv->lock before calling this function !
865 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700866static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700867{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700868 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700869 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700870 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700871}
872
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800873/**
874 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
875 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
876 * @scd_retry: (1) Indicates queue will be used in aggregation mode
877 *
878 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700879 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700880static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800881 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700882 int tx_fifo_id, int scd_retry)
883{
884 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800885
886 /* Find out whether to activate Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -0700887 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
888
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800889 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700890 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700891 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
892 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
893 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
894 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
895 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700896
897 txq->sched_retry = scd_retry;
898
899 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800900 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700901 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
902}
903
904static const u16 default_queue_to_tx_fifo[] = {
905 IWL_TX_FIFO_AC3,
906 IWL_TX_FIFO_AC2,
907 IWL_TX_FIFO_AC1,
908 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700909 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700910 IWL_TX_FIFO_HCCA_1,
911 IWL_TX_FIFO_HCCA_2
912};
913
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700914static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700915{
916 set_bit(txq_id, &priv->txq_ctx_active_msk);
917}
918
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700919static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700920{
921 clear_bit(txq_id, &priv->txq_ctx_active_msk);
922}
923
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700924int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700925{
926 u32 a;
927 int i = 0;
928 unsigned long flags;
Tomas Winkler857485c2008-03-21 13:53:44 -0700929 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700930
931 spin_lock_irqsave(&priv->lock, flags);
932
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700933#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -0700934 memset(&(priv->sensitivity_data), 0,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700935 sizeof(struct iwl_sensitivity_data));
Zhu Yib481de92007-09-25 17:54:57 -0700936 memset(&(priv->chain_noise_data), 0,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700937 sizeof(struct iwl_chain_noise_data));
Zhu Yib481de92007-09-25 17:54:57 -0700938 for (i = 0; i < NUM_RX_CHAINS; i++)
939 priv->chain_noise_data.delta_gain_code[i] =
940 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700941#endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700942 ret = iwl_grab_nic_access(priv);
Tomas Winkler857485c2008-03-21 13:53:44 -0700943 if (ret) {
Zhu Yib481de92007-09-25 17:54:57 -0700944 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler857485c2008-03-21 13:53:44 -0700945 return ret;
Zhu Yib481de92007-09-25 17:54:57 -0700946 }
947
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800948 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700949 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700950 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
951 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700952 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700953 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700954 iwl_write_targ_mem(priv, a, 0);
Tomas Winkler5425e492008-04-15 16:01:38 -0700955 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700956 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700957
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800958 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700959 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler059ff822008-04-14 21:16:14 -0700960 (priv->shared_phys +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800961 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800962
963 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700964 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700965
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800966 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700967 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800968
969 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700970 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700971 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800972
973 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700974 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700975 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
976 (SCD_WIN_SIZE <<
977 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
978 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800979
980 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700981 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700982 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
983 sizeof(u32),
984 (SCD_FRAME_LIMIT <<
985 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
986 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700987
988 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700989 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700990 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700991
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800992 /* Activate all Tx DMA/FIFO channels */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700993 iwl_write_prph(priv, IWL49_SCD_TXFACT,
Zhu Yib481de92007-09-25 17:54:57 -0700994 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
995
996 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800997
998 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700999 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1000 int ac = default_queue_to_tx_fifo[i];
1001 iwl4965_txq_ctx_activate(priv, i);
1002 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1003 }
1004
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001005 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001006 spin_unlock_irqrestore(&priv->lock, flags);
1007
Emmanuel Grumbach49ea8592008-04-15 16:01:37 -07001008 /* Ask for statistics now, the uCode will send statistics notification
1009 * periodically after association */
1010 iwl_send_statistics_request(priv, CMD_ASYNC);
Tomas Winkler857485c2008-03-21 13:53:44 -07001011 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001012}
1013
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07001014#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1015static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
1016 .min_nrg_cck = 97,
1017 .max_nrg_cck = 0,
1018
1019 .auto_corr_min_ofdm = 85,
1020 .auto_corr_min_ofdm_mrc = 170,
1021 .auto_corr_min_ofdm_x1 = 105,
1022 .auto_corr_min_ofdm_mrc_x1 = 220,
1023
1024 .auto_corr_max_ofdm = 120,
1025 .auto_corr_max_ofdm_mrc = 210,
1026 .auto_corr_max_ofdm_x1 = 140,
1027 .auto_corr_max_ofdm_mrc_x1 = 270,
1028
1029 .auto_corr_min_cck = 125,
1030 .auto_corr_max_cck = 200,
1031 .auto_corr_min_cck_mrc = 200,
1032 .auto_corr_max_cck_mrc = 400,
1033
1034 .nrg_th_cck = 100,
1035 .nrg_th_ofdm = 100,
1036};
1037#endif
1038
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001039/**
Tomas Winkler5425e492008-04-15 16:01:38 -07001040 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001041 *
1042 * Called when initializing driver
1043 */
Tomas Winkler5425e492008-04-15 16:01:38 -07001044int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001045{
Assaf Krauss316c30d2008-03-14 10:38:46 -07001046
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001047 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
Assaf Krauss1ea87392008-03-18 14:57:50 -07001048 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
Assaf Krauss316c30d2008-03-14 10:38:46 -07001049 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001050 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
Tomas Winkler059ff822008-04-14 21:16:14 -07001051 return -EINVAL;
Assaf Krauss316c30d2008-03-14 10:38:46 -07001052 }
1053
Tomas Winkler5425e492008-04-15 16:01:38 -07001054 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001055 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
Tomas Winkler5425e492008-04-15 16:01:38 -07001056 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1057 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
Assaf Krauss1ea87392008-03-18 14:57:50 -07001058 if (priv->cfg->mod_params->amsdu_size_8K)
Tomas Winkler5425e492008-04-15 16:01:38 -07001059 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +02001060 else
Tomas Winkler5425e492008-04-15 16:01:38 -07001061 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1062 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1063 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
1064 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Tomas Winkler3e82a822008-02-13 11:32:31 -08001065
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001066 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
1067 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
1068 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
1069 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
1070
Tomas Winklerec35cf22008-04-15 16:01:39 -07001071 priv->hw_params.tx_chains_num = 2;
1072 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -07001073 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
1074 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07001075 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
1076
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07001077#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1078 priv->hw_params.sens = &iwl4965_sensitivity;
1079#endif
Tomas Winkler3e82a822008-02-13 11:32:31 -08001080
Tomas Winkler059ff822008-04-14 21:16:14 -07001081 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07001082}
1083
Mohamed Abbas5da4b552008-04-21 15:41:51 -07001084/* set card power command */
1085static int iwl4965_set_power(struct iwl_priv *priv,
1086 void *cmd)
1087{
1088 int ret = 0;
1089
1090 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
1091 sizeof(struct iwl4965_powertable_cmd),
1092 cmd, NULL);
1093 return ret;
1094}
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001095int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
Zhu Yib481de92007-09-25 17:54:57 -07001096{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001097 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001098 return -EINVAL;
1099}
1100
1101static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1102{
1103 s32 sign = 1;
1104
1105 if (num < 0) {
1106 sign = -sign;
1107 num = -num;
1108 }
1109 if (denom < 0) {
1110 sign = -sign;
1111 denom = -denom;
1112 }
1113 *res = 1;
1114 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1115
1116 return 1;
1117}
1118
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001119/**
1120 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1121 *
1122 * Determines power supply voltage compensation for txpower calculations.
1123 * Returns number of 1/2-dB steps to subtract from gain table index,
1124 * to compensate for difference between power supply voltage during
1125 * factory measurements, vs. current power supply voltage.
1126 *
1127 * Voltage indication is higher for lower voltage.
1128 * Lower voltage requires more gain (lower gain table index).
1129 */
Zhu Yib481de92007-09-25 17:54:57 -07001130static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1131 s32 current_voltage)
1132{
1133 s32 comp = 0;
1134
1135 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1136 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1137 return 0;
1138
1139 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1140 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1141
1142 if (current_voltage > eeprom_voltage)
1143 comp *= 2;
1144 if ((comp < -2) || (comp > 2))
1145 comp = 0;
1146
1147 return comp;
1148}
1149
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001150static const struct iwl_channel_info *
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001151iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01001152 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001153{
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001154 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001155
Assaf Krauss8622e702008-03-21 13:53:43 -07001156 ch_info = iwl_get_channel_info(priv, band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001157
1158 if (!is_channel_valid(ch_info))
1159 return NULL;
1160
1161 return ch_info;
1162}
1163
1164static s32 iwl4965_get_tx_atten_grp(u16 channel)
1165{
1166 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1167 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1168 return CALIB_CH_GROUP_5;
1169
1170 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1171 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1172 return CALIB_CH_GROUP_1;
1173
1174 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1175 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1176 return CALIB_CH_GROUP_2;
1177
1178 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1179 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1180 return CALIB_CH_GROUP_3;
1181
1182 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1183 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1184 return CALIB_CH_GROUP_4;
1185
1186 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1187 return -1;
1188}
1189
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001190static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001191{
1192 s32 b = -1;
1193
1194 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001195 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001196 continue;
1197
Tomas Winkler073d3f52008-04-21 15:41:52 -07001198 if ((channel >= priv->calib_info->band_info[b].ch_from)
1199 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -07001200 break;
1201 }
1202
1203 return b;
1204}
1205
1206static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1207{
1208 s32 val;
1209
1210 if (x2 == x1)
1211 return y1;
1212 else {
1213 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1214 return val + y2;
1215 }
1216}
1217
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001218/**
1219 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1220 *
1221 * Interpolates factory measurements from the two sample channels within a
1222 * sub-band, to apply to channel of interest. Interpolation is proportional to
1223 * differences in channel frequencies, which is proportional to differences
1224 * in channel number.
1225 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001226static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -07001227 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -07001228{
1229 s32 s = -1;
1230 u32 c;
1231 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001232 const struct iwl_eeprom_calib_measure *m1;
1233 const struct iwl_eeprom_calib_measure *m2;
1234 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -07001235 u32 ch_i1;
1236 u32 ch_i2;
1237
1238 s = iwl4965_get_sub_band(priv, channel);
1239 if (s >= EEPROM_TX_POWER_BANDS) {
1240 IWL_ERROR("Tx Power can not find channel %d ", channel);
1241 return -1;
1242 }
1243
Tomas Winkler073d3f52008-04-21 15:41:52 -07001244 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1245 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -07001246 chan_info->ch_num = (u8) channel;
1247
1248 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1249 channel, s, ch_i1, ch_i2);
1250
1251 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1252 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -07001253 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -07001254 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -07001255 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -07001256 measurements[c][m]);
1257 omeas = &(chan_info->measurements[c][m]);
1258
1259 omeas->actual_pow =
1260 (u8) iwl4965_interpolate_value(channel, ch_i1,
1261 m1->actual_pow,
1262 ch_i2,
1263 m2->actual_pow);
1264 omeas->gain_idx =
1265 (u8) iwl4965_interpolate_value(channel, ch_i1,
1266 m1->gain_idx, ch_i2,
1267 m2->gain_idx);
1268 omeas->temperature =
1269 (u8) iwl4965_interpolate_value(channel, ch_i1,
1270 m1->temperature,
1271 ch_i2,
1272 m2->temperature);
1273 omeas->pa_det =
1274 (s8) iwl4965_interpolate_value(channel, ch_i1,
1275 m1->pa_det, ch_i2,
1276 m2->pa_det);
1277
1278 IWL_DEBUG_TXPOWER
1279 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1280 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1281 IWL_DEBUG_TXPOWER
1282 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1283 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1284 IWL_DEBUG_TXPOWER
1285 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1286 m1->pa_det, m2->pa_det, omeas->pa_det);
1287 IWL_DEBUG_TXPOWER
1288 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1289 m1->temperature, m2->temperature,
1290 omeas->temperature);
1291 }
1292 }
1293
1294 return 0;
1295}
1296
1297/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1298 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1299static s32 back_off_table[] = {
1300 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1301 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1302 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1303 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1304 10 /* CCK */
1305};
1306
1307/* Thermal compensation values for txpower for various frequency ranges ...
1308 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001309static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -07001310 s32 degrees_per_05db_a;
1311 s32 degrees_per_05db_a_denom;
1312} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1313 {9, 2}, /* group 0 5.2, ch 34-43 */
1314 {4, 1}, /* group 1 5.2, ch 44-70 */
1315 {4, 1}, /* group 2 5.2, ch 71-124 */
1316 {4, 1}, /* group 3 5.2, ch 125-200 */
1317 {3, 1} /* group 4 2.4, ch all */
1318};
1319
1320static s32 get_min_power_index(s32 rate_power_index, u32 band)
1321{
1322 if (!band) {
1323 if ((rate_power_index & 7) <= 4)
1324 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1325 }
1326 return MIN_TX_GAIN_INDEX;
1327}
1328
1329struct gain_entry {
1330 u8 dsp;
1331 u8 radio;
1332};
1333
1334static const struct gain_entry gain_table[2][108] = {
1335 /* 5.2GHz power gain index table */
1336 {
1337 {123, 0x3F}, /* highest txpower */
1338 {117, 0x3F},
1339 {110, 0x3F},
1340 {104, 0x3F},
1341 {98, 0x3F},
1342 {110, 0x3E},
1343 {104, 0x3E},
1344 {98, 0x3E},
1345 {110, 0x3D},
1346 {104, 0x3D},
1347 {98, 0x3D},
1348 {110, 0x3C},
1349 {104, 0x3C},
1350 {98, 0x3C},
1351 {110, 0x3B},
1352 {104, 0x3B},
1353 {98, 0x3B},
1354 {110, 0x3A},
1355 {104, 0x3A},
1356 {98, 0x3A},
1357 {110, 0x39},
1358 {104, 0x39},
1359 {98, 0x39},
1360 {110, 0x38},
1361 {104, 0x38},
1362 {98, 0x38},
1363 {110, 0x37},
1364 {104, 0x37},
1365 {98, 0x37},
1366 {110, 0x36},
1367 {104, 0x36},
1368 {98, 0x36},
1369 {110, 0x35},
1370 {104, 0x35},
1371 {98, 0x35},
1372 {110, 0x34},
1373 {104, 0x34},
1374 {98, 0x34},
1375 {110, 0x33},
1376 {104, 0x33},
1377 {98, 0x33},
1378 {110, 0x32},
1379 {104, 0x32},
1380 {98, 0x32},
1381 {110, 0x31},
1382 {104, 0x31},
1383 {98, 0x31},
1384 {110, 0x30},
1385 {104, 0x30},
1386 {98, 0x30},
1387 {110, 0x25},
1388 {104, 0x25},
1389 {98, 0x25},
1390 {110, 0x24},
1391 {104, 0x24},
1392 {98, 0x24},
1393 {110, 0x23},
1394 {104, 0x23},
1395 {98, 0x23},
1396 {110, 0x22},
1397 {104, 0x18},
1398 {98, 0x18},
1399 {110, 0x17},
1400 {104, 0x17},
1401 {98, 0x17},
1402 {110, 0x16},
1403 {104, 0x16},
1404 {98, 0x16},
1405 {110, 0x15},
1406 {104, 0x15},
1407 {98, 0x15},
1408 {110, 0x14},
1409 {104, 0x14},
1410 {98, 0x14},
1411 {110, 0x13},
1412 {104, 0x13},
1413 {98, 0x13},
1414 {110, 0x12},
1415 {104, 0x08},
1416 {98, 0x08},
1417 {110, 0x07},
1418 {104, 0x07},
1419 {98, 0x07},
1420 {110, 0x06},
1421 {104, 0x06},
1422 {98, 0x06},
1423 {110, 0x05},
1424 {104, 0x05},
1425 {98, 0x05},
1426 {110, 0x04},
1427 {104, 0x04},
1428 {98, 0x04},
1429 {110, 0x03},
1430 {104, 0x03},
1431 {98, 0x03},
1432 {110, 0x02},
1433 {104, 0x02},
1434 {98, 0x02},
1435 {110, 0x01},
1436 {104, 0x01},
1437 {98, 0x01},
1438 {110, 0x00},
1439 {104, 0x00},
1440 {98, 0x00},
1441 {93, 0x00},
1442 {88, 0x00},
1443 {83, 0x00},
1444 {78, 0x00},
1445 },
1446 /* 2.4GHz power gain index table */
1447 {
1448 {110, 0x3f}, /* highest txpower */
1449 {104, 0x3f},
1450 {98, 0x3f},
1451 {110, 0x3e},
1452 {104, 0x3e},
1453 {98, 0x3e},
1454 {110, 0x3d},
1455 {104, 0x3d},
1456 {98, 0x3d},
1457 {110, 0x3c},
1458 {104, 0x3c},
1459 {98, 0x3c},
1460 {110, 0x3b},
1461 {104, 0x3b},
1462 {98, 0x3b},
1463 {110, 0x3a},
1464 {104, 0x3a},
1465 {98, 0x3a},
1466 {110, 0x39},
1467 {104, 0x39},
1468 {98, 0x39},
1469 {110, 0x38},
1470 {104, 0x38},
1471 {98, 0x38},
1472 {110, 0x37},
1473 {104, 0x37},
1474 {98, 0x37},
1475 {110, 0x36},
1476 {104, 0x36},
1477 {98, 0x36},
1478 {110, 0x35},
1479 {104, 0x35},
1480 {98, 0x35},
1481 {110, 0x34},
1482 {104, 0x34},
1483 {98, 0x34},
1484 {110, 0x33},
1485 {104, 0x33},
1486 {98, 0x33},
1487 {110, 0x32},
1488 {104, 0x32},
1489 {98, 0x32},
1490 {110, 0x31},
1491 {104, 0x31},
1492 {98, 0x31},
1493 {110, 0x30},
1494 {104, 0x30},
1495 {98, 0x30},
1496 {110, 0x6},
1497 {104, 0x6},
1498 {98, 0x6},
1499 {110, 0x5},
1500 {104, 0x5},
1501 {98, 0x5},
1502 {110, 0x4},
1503 {104, 0x4},
1504 {98, 0x4},
1505 {110, 0x3},
1506 {104, 0x3},
1507 {98, 0x3},
1508 {110, 0x2},
1509 {104, 0x2},
1510 {98, 0x2},
1511 {110, 0x1},
1512 {104, 0x1},
1513 {98, 0x1},
1514 {110, 0x0},
1515 {104, 0x0},
1516 {98, 0x0},
1517 {97, 0},
1518 {96, 0},
1519 {95, 0},
1520 {94, 0},
1521 {93, 0},
1522 {92, 0},
1523 {91, 0},
1524 {90, 0},
1525 {89, 0},
1526 {88, 0},
1527 {87, 0},
1528 {86, 0},
1529 {85, 0},
1530 {84, 0},
1531 {83, 0},
1532 {82, 0},
1533 {81, 0},
1534 {80, 0},
1535 {79, 0},
1536 {78, 0},
1537 {77, 0},
1538 {76, 0},
1539 {75, 0},
1540 {74, 0},
1541 {73, 0},
1542 {72, 0},
1543 {71, 0},
1544 {70, 0},
1545 {69, 0},
1546 {68, 0},
1547 {67, 0},
1548 {66, 0},
1549 {65, 0},
1550 {64, 0},
1551 {63, 0},
1552 {62, 0},
1553 {61, 0},
1554 {60, 0},
1555 {59, 0},
1556 }
1557};
1558
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001559static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Zhu Yib481de92007-09-25 17:54:57 -07001560 u8 is_fat, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001561 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001562{
1563 u8 saturation_power;
1564 s32 target_power;
1565 s32 user_target_power;
1566 s32 power_limit;
1567 s32 current_temp;
1568 s32 reg_limit;
1569 s32 current_regulatory;
1570 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1571 int i;
1572 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001573 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001574 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1575 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001576 s16 voltage;
1577 s32 init_voltage;
1578 s32 voltage_compensation;
1579 s32 degrees_per_05db_num;
1580 s32 degrees_per_05db_denom;
1581 s32 factory_temp;
1582 s32 temperature_comp[2];
1583 s32 factory_gain_index[2];
1584 s32 factory_actual_pwr[2];
1585 s32 power_index;
1586
1587 /* Sanity check requested level (dBm) */
1588 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1589 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1590 priv->user_txpower_limit);
1591 return -EINVAL;
1592 }
1593 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1594 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1595 priv->user_txpower_limit);
1596 return -EINVAL;
1597 }
1598
1599 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1600 * are used for indexing into txpower table) */
1601 user_target_power = 2 * priv->user_txpower_limit;
1602
1603 /* Get current (RXON) channel, band, width */
1604 ch_info =
Johannes Berg8318d782008-01-24 19:38:38 +01001605 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001606
1607 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1608 is_fat);
1609
1610 if (!ch_info)
1611 return -EINVAL;
1612
1613 /* get txatten group, used to select 1) thermal txpower adjustment
1614 * and 2) mimo txpower balance between Tx chains. */
1615 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1616 if (txatten_grp < 0)
1617 return -EINVAL;
1618
1619 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1620 channel, txatten_grp);
1621
1622 if (is_fat) {
1623 if (ctrl_chan_high)
1624 channel -= 2;
1625 else
1626 channel += 2;
1627 }
1628
1629 /* hardware txpower limits ...
1630 * saturation (clipping distortion) txpowers are in half-dBm */
1631 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001632 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001633 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001634 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001635
1636 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1637 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1638 if (band)
1639 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1640 else
1641 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1642 }
1643
1644 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1645 * max_power_avg values are in dBm, convert * 2 */
1646 if (is_fat)
1647 reg_limit = ch_info->fat_max_power_avg * 2;
1648 else
1649 reg_limit = ch_info->max_power_avg * 2;
1650
1651 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1652 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1653 if (band)
1654 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1655 else
1656 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1657 }
1658
1659 /* Interpolate txpower calibration values for this channel,
1660 * based on factory calibration tests on spaced channels. */
1661 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1662
1663 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001664 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001665 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1666 voltage_compensation =
1667 iwl4965_get_voltage_compensation(voltage, init_voltage);
1668
1669 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1670 init_voltage,
1671 voltage, voltage_compensation);
1672
1673 /* get current temperature (Celsius) */
1674 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1675 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1676 current_temp = KELVIN_TO_CELSIUS(current_temp);
1677
1678 /* select thermal txpower adjustment params, based on channel group
1679 * (same frequency group used for mimo txatten adjustment) */
1680 degrees_per_05db_num =
1681 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1682 degrees_per_05db_denom =
1683 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1684
1685 /* get per-chain txpower values from factory measurements */
1686 for (c = 0; c < 2; c++) {
1687 measurement = &ch_eeprom_info.measurements[c][1];
1688
1689 /* txgain adjustment (in half-dB steps) based on difference
1690 * between factory and current temperature */
1691 factory_temp = measurement->temperature;
1692 iwl4965_math_div_round((current_temp - factory_temp) *
1693 degrees_per_05db_denom,
1694 degrees_per_05db_num,
1695 &temperature_comp[c]);
1696
1697 factory_gain_index[c] = measurement->gain_idx;
1698 factory_actual_pwr[c] = measurement->actual_pow;
1699
1700 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1701 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1702 "curr tmp %d, comp %d steps\n",
1703 factory_temp, current_temp,
1704 temperature_comp[c]);
1705
1706 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1707 factory_gain_index[c],
1708 factory_actual_pwr[c]);
1709 }
1710
1711 /* for each of 33 bit-rates (including 1 for CCK) */
1712 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1713 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001714 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001715
1716 /* for mimo, reduce each chain's txpower by half
1717 * (3dB, 6 steps), so total output power is regulatory
1718 * compliant. */
1719 if (i & 0x8) {
1720 current_regulatory = reg_limit -
1721 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1722 is_mimo_rate = 1;
1723 } else {
1724 current_regulatory = reg_limit;
1725 is_mimo_rate = 0;
1726 }
1727
1728 /* find txpower limit, either hardware or regulatory */
1729 power_limit = saturation_power - back_off_table[i];
1730 if (power_limit > current_regulatory)
1731 power_limit = current_regulatory;
1732
1733 /* reduce user's txpower request if necessary
1734 * for this rate on this channel */
1735 target_power = user_target_power;
1736 if (target_power > power_limit)
1737 target_power = power_limit;
1738
1739 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1740 i, saturation_power - back_off_table[i],
1741 current_regulatory, user_target_power,
1742 target_power);
1743
1744 /* for each of 2 Tx chains (radio transmitters) */
1745 for (c = 0; c < 2; c++) {
1746 s32 atten_value;
1747
1748 if (is_mimo_rate)
1749 atten_value =
1750 (s32)le32_to_cpu(priv->card_alive_init.
1751 tx_atten[txatten_grp][c]);
1752 else
1753 atten_value = 0;
1754
1755 /* calculate index; higher index means lower txpower */
1756 power_index = (u8) (factory_gain_index[c] -
1757 (target_power -
1758 factory_actual_pwr[c]) -
1759 temperature_comp[c] -
1760 voltage_compensation +
1761 atten_value);
1762
1763/* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1764 power_index); */
1765
1766 if (power_index < get_min_power_index(i, band))
1767 power_index = get_min_power_index(i, band);
1768
1769 /* adjust 5 GHz index to support negative indexes */
1770 if (!band)
1771 power_index += 9;
1772
1773 /* CCK, rate 32, reduce txpower for CCK */
1774 if (i == POWER_TABLE_CCK_ENTRY)
1775 power_index +=
1776 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1777
1778 /* stay within the table! */
1779 if (power_index > 107) {
1780 IWL_WARNING("txpower index %d > 107\n",
1781 power_index);
1782 power_index = 107;
1783 }
1784 if (power_index < 0) {
1785 IWL_WARNING("txpower index %d < 0\n",
1786 power_index);
1787 power_index = 0;
1788 }
1789
1790 /* fill txpower command for this rate/chain */
1791 tx_power.s.radio_tx_gain[c] =
1792 gain_table[band][power_index].radio;
1793 tx_power.s.dsp_predis_atten[c] =
1794 gain_table[band][power_index].dsp;
1795
1796 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1797 "gain 0x%02x dsp %d\n",
1798 c, atten_value, power_index,
1799 tx_power.s.radio_tx_gain[c],
1800 tx_power.s.dsp_predis_atten[c]);
1801 }/* for each chain */
1802
1803 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1804
1805 }/* for each rate */
1806
1807 return 0;
1808}
1809
1810/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001811 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001812 *
1813 * Uses the active RXON for channel, band, and characteristics (fat, high)
1814 * The power limit is taken from priv->user_txpower_limit.
1815 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001816int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001817{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001818 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001819 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001820 u8 band = 0;
1821 u8 is_fat = 0;
1822 u8 ctrl_chan_high = 0;
1823
1824 if (test_bit(STATUS_SCANNING, &priv->status)) {
1825 /* If this gets hit a lot, switch it to a BUG() and catch
1826 * the stack trace to find out who is calling this during
1827 * a scan. */
1828 IWL_WARNING("TX Power requested while scanning!\n");
1829 return -EAGAIN;
1830 }
1831
Johannes Berg8318d782008-01-24 19:38:38 +01001832 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001833
1834 is_fat = is_fat_channel(priv->active_rxon.flags);
1835
1836 if (is_fat &&
1837 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1838 ctrl_chan_high = 1;
1839
1840 cmd.band = band;
1841 cmd.channel = priv->active_rxon.channel;
1842
Tomas Winkler857485c2008-03-21 13:53:44 -07001843 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001844 le16_to_cpu(priv->active_rxon.channel),
1845 is_fat, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001846 if (ret)
1847 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001848
Tomas Winkler857485c2008-03-21 13:53:44 -07001849 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1850
1851out:
1852 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001853}
1854
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001855static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1856{
1857 int ret = 0;
1858 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001859 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1860 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001861
1862 if ((rxon1->flags == rxon2->flags) &&
1863 (rxon1->filter_flags == rxon2->filter_flags) &&
1864 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1865 (rxon1->ofdm_ht_single_stream_basic_rates ==
1866 rxon2->ofdm_ht_single_stream_basic_rates) &&
1867 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1868 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1869 (rxon1->rx_chain == rxon2->rx_chain) &&
1870 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1871 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1872 return 0;
1873 }
1874
1875 rxon_assoc.flags = priv->staging_rxon.flags;
1876 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1877 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1878 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1879 rxon_assoc.reserved = 0;
1880 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1881 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1882 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1883 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1884 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1885
1886 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1887 sizeof(rxon_assoc), &rxon_assoc, NULL);
1888 if (ret)
1889 return ret;
1890
1891 return ret;
1892}
1893
1894
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001895int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001896{
1897 int rc;
1898 u8 band = 0;
1899 u8 is_fat = 0;
1900 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001901 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001902 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001903
Johannes Berg8318d782008-01-24 19:38:38 +01001904 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001905
Assaf Krauss8622e702008-03-21 13:53:43 -07001906 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001907
1908 is_fat = is_fat_channel(priv->staging_rxon.flags);
1909
1910 if (is_fat &&
1911 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1912 ctrl_chan_high = 1;
1913
1914 cmd.band = band;
1915 cmd.expect_beacon = 0;
1916 cmd.channel = cpu_to_le16(channel);
1917 cmd.rxon_flags = priv->active_rxon.flags;
1918 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1919 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1920 if (ch_info)
1921 cmd.expect_beacon = is_channel_radar(ch_info);
1922 else
1923 cmd.expect_beacon = 1;
1924
1925 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1926 ctrl_chan_high, &cmd.tx_power);
1927 if (rc) {
1928 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1929 return rc;
1930 }
1931
Tomas Winkler857485c2008-03-21 13:53:44 -07001932 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001933 return rc;
1934}
1935
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001936static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001937{
Tomas Winkler059ff822008-04-14 21:16:14 -07001938 struct iwl4965_shared *s = priv->shared_virt;
1939 return le32_to_cpu(s->rb_closed) & 0xFFF;
Zhu Yib481de92007-09-25 17:54:57 -07001940}
1941
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001942int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001943{
1944 return priv->temperature;
1945}
1946
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001947unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
Tomas Winklerfcab4232008-05-15 13:54:01 +08001948 struct iwl_frame *frame, u8 rate)
Zhu Yib481de92007-09-25 17:54:57 -07001949{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001950 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001951 unsigned int frame_size;
1952
1953 tx_beacon_cmd = &frame->u.beacon;
1954 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1955
Tomas Winkler5425e492008-04-15 16:01:38 -07001956 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
Zhu Yib481de92007-09-25 17:54:57 -07001957 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1958
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001959 frame_size = iwl4965_fill_beacon_frame(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001960 tx_beacon_cmd->frame,
Tomas Winkler57bd1be2008-05-15 13:54:03 +08001961 iwl_bcast_addr,
Zhu Yib481de92007-09-25 17:54:57 -07001962 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1963
1964 BUG_ON(frame_size > MAX_MPDU_SIZE);
1965 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1966
1967 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1968 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001969 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001970 else
1971 tx_beacon_cmd->tx.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001972 iwl4965_hw_set_rate_n_flags(rate, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001973
1974 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1975 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1976 return (sizeof(*tx_beacon_cmd) + frame_size);
1977}
1978
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001979static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1980{
1981 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1982 sizeof(struct iwl4965_shared),
1983 &priv->shared_phys);
1984 if (!priv->shared_virt)
1985 return -ENOMEM;
1986
1987 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1988
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08001989 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1990
Ron Rindjunsky399f4902008-04-23 17:14:56 -07001991 return 0;
1992}
1993
1994static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1995{
1996 if (priv->shared_virt)
1997 pci_free_consistent(priv->pci_dev,
1998 sizeof(struct iwl4965_shared),
1999 priv->shared_virt,
2000 priv->shared_phys);
2001}
2002
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002003/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07002004 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002005 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07002006static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08002007 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07002008 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07002009{
2010 int len;
2011 int txq_id = txq->q.id;
Tomas Winkler059ff822008-04-14 21:16:14 -07002012 struct iwl4965_shared *shared_data = priv->shared_virt;
Zhu Yib481de92007-09-25 17:54:57 -07002013
Zhu Yib481de92007-09-25 17:54:57 -07002014 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2015
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002016 /* Set up byte count within first 256 entries */
Zhu Yib481de92007-09-25 17:54:57 -07002017 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002018 tfd_offset[txq->q.write_ptr], byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07002019
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002020 /* If within first 64 entries, duplicate at end */
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07002021 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
Zhu Yib481de92007-09-25 17:54:57 -07002022 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07002023 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
Zhu Yib481de92007-09-25 17:54:57 -07002024 byte_cnt, len);
Zhu Yib481de92007-09-25 17:54:57 -07002025}
2026
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002027/**
Zhu Yib481de92007-09-25 17:54:57 -07002028 * sign_extend - Sign extend a value using specified bit as sign-bit
2029 *
2030 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2031 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2032 *
2033 * @param oper value to sign extend
2034 * @param index 0 based bit index (0<=index<32) to sign bit
2035 */
2036static s32 sign_extend(u32 oper, int index)
2037{
2038 u8 shift = 31 - index;
2039
2040 return (s32)(oper << shift) >> shift;
2041}
2042
2043/**
2044 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2045 * @statistics: Provides the temperature reading from the uCode
2046 *
2047 * A return of <0 indicates bogus data in the statistics
2048 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002049int iwl4965_get_temperature(const struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002050{
2051 s32 temperature;
2052 s32 vt;
2053 s32 R1, R2, R3;
2054 u32 R4;
2055
2056 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2057 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2058 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2059 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2060 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2061 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2062 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2063 } else {
2064 IWL_DEBUG_TEMP("Running temperature calibration\n");
2065 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2066 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2067 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2068 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2069 }
2070
2071 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002072 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07002073 *
2074 * NOTE If we haven't received a statistics notification yet
2075 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002076 * "initialize" ALIVE response.
2077 */
Zhu Yib481de92007-09-25 17:54:57 -07002078 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2079 vt = sign_extend(R4, 23);
2080 else
2081 vt = sign_extend(
2082 le32_to_cpu(priv->statistics.general.temperature), 23);
2083
2084 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2085 R1, R2, R3, vt);
2086
2087 if (R3 == R1) {
2088 IWL_ERROR("Calibration conflict R1 == R3\n");
2089 return -1;
2090 }
2091
2092 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2093 * Add offset to center the adjustment around 0 degrees Centigrade. */
2094 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2095 temperature /= (R3 - R1);
2096 temperature = (temperature * 97) / 100 +
2097 TEMPERATURE_CALIB_KELVIN_OFFSET;
2098
2099 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2100 KELVIN_TO_CELSIUS(temperature));
2101
2102 return temperature;
2103}
2104
2105/* Adjust Txpower only if temperature variance is greater than threshold. */
2106#define IWL_TEMPERATURE_THRESHOLD 3
2107
2108/**
2109 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2110 *
2111 * If the temperature changed has changed sufficiently, then a recalibration
2112 * is needed.
2113 *
2114 * Assumes caller will replace priv->last_temperature once calibration
2115 * executed.
2116 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002117static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002118{
2119 int temp_diff;
2120
2121 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2122 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2123 return 0;
2124 }
2125
2126 temp_diff = priv->temperature - priv->last_temperature;
2127
2128 /* get absolute value */
2129 if (temp_diff < 0) {
2130 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2131 temp_diff = -temp_diff;
2132 } else if (temp_diff == 0)
2133 IWL_DEBUG_POWER("Same temp, \n");
2134 else
2135 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2136
2137 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2138 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2139 return 0;
2140 }
2141
2142 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2143
2144 return 1;
2145}
2146
2147/* Calculate noise level, based on measurements during network silence just
2148 * before arriving beacon. This measurement can be done only if we know
2149 * exactly when to expect beacons, therefore only when we're associated. */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002150static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002151{
2152 struct statistics_rx_non_phy *rx_info
2153 = &(priv->statistics.rx.general);
2154 int num_active_rx = 0;
2155 int total_silence = 0;
2156 int bcn_silence_a =
2157 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2158 int bcn_silence_b =
2159 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2160 int bcn_silence_c =
2161 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2162
2163 if (bcn_silence_a) {
2164 total_silence += bcn_silence_a;
2165 num_active_rx++;
2166 }
2167 if (bcn_silence_b) {
2168 total_silence += bcn_silence_b;
2169 num_active_rx++;
2170 }
2171 if (bcn_silence_c) {
2172 total_silence += bcn_silence_c;
2173 num_active_rx++;
2174 }
2175
2176 /* Average among active antennas */
2177 if (num_active_rx)
2178 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2179 else
2180 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2181
2182 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2183 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2184 priv->last_rx_noise);
2185}
2186
Tomas Winklera55360e2008-05-05 10:22:28 +08002187void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
2188 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002189{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002190 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002191 int change;
2192 s32 temp;
2193
2194 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2195 (int)sizeof(priv->statistics), pkt->len);
2196
2197 change = ((priv->statistics.general.temperature !=
2198 pkt->u.stats.general.temperature) ||
2199 ((priv->statistics.flag &
2200 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2201 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2202
2203 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2204
2205 set_bit(STATUS_STATISTICS, &priv->status);
2206
2207 /* Reschedule the statistics timer to occur in
2208 * REG_RECALIB_PERIOD seconds to ensure we get a
2209 * thermal update even if the uCode doesn't give
2210 * us one */
2211 mod_timer(&priv->statistics_periodic, jiffies +
2212 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2213
2214 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2215 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2216 iwl4965_rx_calc_noise(priv);
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002217#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -07002218 queue_work(priv->workqueue, &priv->sensitivity_work);
2219#endif
2220 }
2221
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002222 iwl_leds_background(priv);
2223
Zhu Yib481de92007-09-25 17:54:57 -07002224 /* If the hardware hasn't reported a change in
2225 * temperature then don't bother computing a
2226 * calibrated temperature value */
2227 if (!change)
2228 return;
2229
2230 temp = iwl4965_get_temperature(priv);
2231 if (temp < 0)
2232 return;
2233
2234 if (priv->temperature != temp) {
2235 if (priv->temperature)
2236 IWL_DEBUG_TEMP("Temperature changed "
2237 "from %dC to %dC\n",
2238 KELVIN_TO_CELSIUS(priv->temperature),
2239 KELVIN_TO_CELSIUS(temp));
2240 else
2241 IWL_DEBUG_TEMP("Temperature "
2242 "initialized to %dC\n",
2243 KELVIN_TO_CELSIUS(temp));
2244 }
2245
2246 priv->temperature = temp;
2247 set_bit(STATUS_TEMPERATURE, &priv->status);
2248
2249 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2250 iwl4965_is_temp_calib_needed(priv))
2251 queue_work(priv->workqueue, &priv->txpower_work);
2252}
2253
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002254static void iwl4965_add_radiotap(struct iwl_priv *priv,
Zhu Yi12342c42007-12-20 11:27:32 +08002255 struct sk_buff *skb,
2256 struct iwl4965_rx_phy_res *rx_start,
2257 struct ieee80211_rx_status *stats,
2258 u32 ampdu_status)
2259{
Bruno Randolf566bfe52008-05-08 19:15:40 +02002260 s8 signal = stats->signal;
Zhu Yi12342c42007-12-20 11:27:32 +08002261 s8 noise = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01002262 int rate = stats->rate_idx;
Zhu Yi12342c42007-12-20 11:27:32 +08002263 u64 tsf = stats->mactime;
Johannes Berga0b484f2008-04-01 17:51:47 +02002264 __le16 antenna;
Zhu Yi12342c42007-12-20 11:27:32 +08002265 __le16 phy_flags_hw = rx_start->phy_flags;
2266 struct iwl4965_rt_rx_hdr {
2267 struct ieee80211_radiotap_header rt_hdr;
2268 __le64 rt_tsf; /* TSF */
2269 u8 rt_flags; /* radiotap packet flags */
2270 u8 rt_rate; /* rate in 500kb/s */
2271 __le16 rt_channelMHz; /* channel in MHz */
2272 __le16 rt_chbitmask; /* channel bitfield */
2273 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2274 s8 rt_dbmnoise;
2275 u8 rt_antenna; /* antenna number */
2276 } __attribute__ ((packed)) *iwl4965_rt;
2277
2278 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2279 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2280 if (net_ratelimit())
2281 printk(KERN_ERR "not enough headroom [%d] for "
Miguel Botón01c20982008-01-04 23:34:35 +01002282 "radiotap head [%zd]\n",
Zhu Yi12342c42007-12-20 11:27:32 +08002283 skb_headroom(skb), sizeof(*iwl4965_rt));
2284 return;
2285 }
2286
2287 /* put radiotap header in front of 802.11 header and data */
2288 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2289
2290 /* initialise radiotap header */
2291 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2292 iwl4965_rt->rt_hdr.it_pad = 0;
2293
2294 /* total header + data */
2295 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2296 &iwl4965_rt->rt_hdr.it_len);
2297
2298 /* Indicate all the fields we add to the radiotap header */
2299 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2300 (1 << IEEE80211_RADIOTAP_FLAGS) |
2301 (1 << IEEE80211_RADIOTAP_RATE) |
2302 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2303 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2304 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2305 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2306 &iwl4965_rt->rt_hdr.it_present);
2307
2308 /* Zero the flags, we'll add to them as we go */
2309 iwl4965_rt->rt_flags = 0;
2310
2311 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2312
2313 iwl4965_rt->rt_dbmsignal = signal;
2314 iwl4965_rt->rt_dbmnoise = noise;
2315
2316 /* Convert the channel frequency and set the flags */
2317 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2318 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2319 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2320 IEEE80211_CHAN_5GHZ),
2321 &iwl4965_rt->rt_chbitmask);
2322 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2323 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2324 IEEE80211_CHAN_2GHZ),
2325 &iwl4965_rt->rt_chbitmask);
2326 else /* 802.11g */
2327 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2328 IEEE80211_CHAN_2GHZ),
2329 &iwl4965_rt->rt_chbitmask);
2330
Zhu Yi12342c42007-12-20 11:27:32 +08002331 if (rate == -1)
2332 iwl4965_rt->rt_rate = 0;
2333 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002334 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
Zhu Yi12342c42007-12-20 11:27:32 +08002335
2336 /*
2337 * "antenna number"
2338 *
2339 * It seems that the antenna field in the phy flags value
2340 * is actually a bitfield. This is undefined by radiotap,
2341 * it wants an actual antenna number but I always get "7"
2342 * for most legacy frames I receive indicating that the
2343 * same frame was received on all three RX chains.
2344 *
2345 * I think this field should be removed in favour of a
2346 * new 802.11n radiotap field "RX chains" that is defined
2347 * as a bitmask.
2348 */
Johannes Berga0b484f2008-04-01 17:51:47 +02002349 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2350 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
Zhu Yi12342c42007-12-20 11:27:32 +08002351
2352 /* set the preamble flag if appropriate */
2353 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2354 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2355
2356 stats->flag |= RX_FLAG_RADIOTAP;
2357}
2358
Tomas Winkler19758be2008-03-12 16:58:51 -07002359static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2360{
2361 /* 0 - mgmt, 1 - cnt, 2 - data */
2362 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2363 priv->rx_stats[idx].cnt++;
2364 priv->rx_stats[idx].bytes += len;
2365}
2366
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002367/*
2368 * returns non-zero if packet should be dropped
2369 */
2370static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2371 struct ieee80211_hdr *hdr,
2372 u32 decrypt_res,
2373 struct ieee80211_rx_status *stats)
2374{
2375 u16 fc = le16_to_cpu(hdr->frame_control);
2376
2377 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2378 return 0;
2379
2380 if (!(fc & IEEE80211_FCTL_PROTECTED))
2381 return 0;
2382
2383 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2384 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2385 case RX_RES_STATUS_SEC_TYPE_TKIP:
2386 /* The uCode has got a bad phase 1 Key, pushes the packet.
2387 * Decryption will be done in SW. */
2388 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2389 RX_RES_STATUS_BAD_KEY_TTAK)
2390 break;
2391
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +08002392 case RX_RES_STATUS_SEC_TYPE_WEP:
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002393 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2394 RX_RES_STATUS_BAD_ICV_MIC) {
2395 /* bad ICV, the packet is destroyed since the
2396 * decryption is inplace, drop it */
2397 IWL_DEBUG_RX("Packet destroyed\n");
2398 return -1;
2399 }
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002400 case RX_RES_STATUS_SEC_TYPE_CCMP:
2401 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2402 RX_RES_STATUS_DECRYPT_OK) {
2403 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2404 stats->flag |= RX_FLAG_DECRYPTED;
2405 }
2406 break;
2407
2408 default:
2409 break;
2410 }
2411 return 0;
2412}
2413
Ester Kummerbf403db2008-05-05 10:22:40 +08002414static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002415{
2416 u32 decrypt_out = 0;
2417
2418 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2419 RX_RES_STATUS_STATION_FOUND)
2420 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2421 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2422
2423 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2424
2425 /* packet was not encrypted */
2426 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2427 RX_RES_STATUS_SEC_TYPE_NONE)
2428 return decrypt_out;
2429
2430 /* packet was encrypted with unknown alg */
2431 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2432 RX_RES_STATUS_SEC_TYPE_ERR)
2433 return decrypt_out;
2434
2435 /* decryption was not done in HW */
2436 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2437 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2438 return decrypt_out;
2439
2440 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2441
2442 case RX_RES_STATUS_SEC_TYPE_CCMP:
2443 /* alg is CCM: check MIC only */
2444 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2445 /* Bad MIC */
2446 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2447 else
2448 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2449
2450 break;
2451
2452 case RX_RES_STATUS_SEC_TYPE_TKIP:
2453 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2454 /* Bad TTAK */
2455 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2456 break;
2457 }
2458 /* fall through if TTAK OK */
2459 default:
2460 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2461 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2462 else
2463 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2464 break;
2465 };
2466
2467 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2468 decrypt_in, decrypt_out);
2469
2470 return decrypt_out;
2471}
2472
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002473static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
Zhu Yib481de92007-09-25 17:54:57 -07002474 int include_phy,
Tomas Winklera55360e2008-05-05 10:22:28 +08002475 struct iwl_rx_mem_buffer *rxb,
Zhu Yib481de92007-09-25 17:54:57 -07002476 struct ieee80211_rx_status *stats)
2477{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002478 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002479 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2480 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2481 struct ieee80211_hdr *hdr;
2482 u16 len;
2483 __le32 *rx_end;
2484 unsigned int skblen;
2485 u32 ampdu_status;
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002486 u32 ampdu_status_legacy;
Zhu Yib481de92007-09-25 17:54:57 -07002487
2488 if (!include_phy && priv->last_phy_res[0])
2489 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2490
2491 if (!rx_start) {
2492 IWL_ERROR("MPDU frame without a PHY data\n");
2493 return;
2494 }
2495 if (include_phy) {
2496 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2497 rx_start->cfg_phy_cnt);
2498
2499 len = le16_to_cpu(rx_start->byte_count);
2500
2501 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2502 sizeof(struct iwl4965_rx_phy_res) +
2503 rx_start->cfg_phy_cnt + len);
2504
2505 } else {
2506 struct iwl4965_rx_mpdu_res_start *amsdu =
2507 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2508
2509 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2510 sizeof(struct iwl4965_rx_mpdu_res_start));
2511 len = le16_to_cpu(amsdu->byte_count);
2512 rx_start->byte_count = amsdu->byte_count;
2513 rx_end = (__le32 *) (((u8 *) hdr) + len);
2514 }
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002515 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2516 if (len > priv->hw_params.max_pkt_size ||
2517 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
Zhu Yi12342c42007-12-20 11:27:32 +08002518 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07002519 return;
2520 }
2521
2522 ampdu_status = le32_to_cpu(*rx_end);
2523 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2524
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002525 if (!include_phy) {
2526 /* New status scheme, need to translate */
2527 ampdu_status_legacy = ampdu_status;
Ester Kummerbf403db2008-05-05 10:22:40 +08002528 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
Emmanuel Grumbach17e476b2008-03-19 16:41:42 -07002529 }
2530
Zhu Yib481de92007-09-25 17:54:57 -07002531 /* start from MAC */
2532 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2533 skb_put(rxb->skb, len); /* end where data ends */
2534
2535 /* We only process data packets if the interface is open */
2536 if (unlikely(!priv->is_open)) {
2537 IWL_DEBUG_DROP_LIMIT
2538 ("Dropping packet while interface is not open.\n");
2539 return;
2540 }
2541
Zhu Yib481de92007-09-25 17:54:57 -07002542 stats->flag = 0;
2543 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2544
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002545 /* in case of HW accelerated crypto and bad decryption, drop */
Ron Rindjunsky099b40b2008-04-21 15:41:53 -07002546 if (!priv->hw_params.sw_crypto &&
Emmanuel Grumbach3ec47732008-04-17 16:03:36 -07002547 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2548 return;
Zhu Yib481de92007-09-25 17:54:57 -07002549
Zhu Yi12342c42007-12-20 11:27:32 +08002550 if (priv->add_radiotap)
2551 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2552
Tomas Winkler19758be2008-03-12 16:58:51 -07002553 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
Zhu Yib481de92007-09-25 17:54:57 -07002554 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2555 priv->alloc_rxb_skb--;
2556 rxb->skb = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002557}
2558
2559/* Calc max signal level (dBm) among 3 possible receivers */
Ester Kummerbf403db2008-05-05 10:22:40 +08002560static int iwl4965_calc_rssi(struct iwl_priv *priv,
2561 struct iwl4965_rx_phy_res *rx_resp)
Zhu Yib481de92007-09-25 17:54:57 -07002562{
2563 /* data from PHY/DSP regarding signal strength, etc.,
2564 * contents are always there, not configurable by host. */
2565 struct iwl4965_rx_non_cfg_phy *ncphy =
2566 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2567 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2568 >> IWL_AGC_DB_POS;
2569
2570 u32 valid_antennae =
2571 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2572 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2573 u8 max_rssi = 0;
2574 u32 i;
2575
2576 /* Find max rssi among 3 possible receivers.
2577 * These values are measured by the digital signal processor (DSP).
2578 * They should stay fairly constant even as the signal strength varies,
2579 * if the radio's automatic gain control (AGC) is working right.
2580 * AGC value (see below) will provide the "interesting" info. */
2581 for (i = 0; i < 3; i++)
2582 if (valid_antennae & (1 << i))
2583 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2584
2585 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2586 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2587 max_rssi, agc);
2588
2589 /* dBm = max_rssi dB - agc dB - constant.
2590 * Higher AGC (higher radio gain) means lower signal. */
2591 return (max_rssi - agc - IWL_RSSI_OFFSET);
2592}
2593
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002594static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07002595{
2596 unsigned long flags;
2597
2598 spin_lock_irqsave(&priv->sta_lock, flags);
2599 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2600 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2601 priv->stations[sta_id].sta.sta.modify_mask = 0;
2602 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2603 spin_unlock_irqrestore(&priv->sta_lock, flags);
2604
Tomas Winkler133636d2008-05-05 10:22:34 +08002605 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002606}
2607
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002608static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
Zhu Yib481de92007-09-25 17:54:57 -07002609{
2610 /* FIXME: need locking over ps_status ??? */
Tomas Winkler947b13a2008-04-16 16:34:48 -07002611 u8 sta_id = iwl_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07002612
2613 if (sta_id != IWL_INVALID_STATION) {
2614 u8 sta_awake = priv->stations[sta_id].
2615 ps_status == STA_PS_STATUS_WAKE;
2616
2617 if (sta_awake && ps_bit)
2618 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2619 else if (!sta_awake && !ps_bit) {
2620 iwl4965_sta_modify_ps_wake(priv, sta_id);
2621 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2622 }
2623 }
2624}
Tomas Winkler0a6857e2008-03-12 16:58:49 -07002625#ifdef CONFIG_IWLWIFI_DEBUG
Tomas Winkler17744ff2008-03-02 01:52:00 +02002626
2627/**
2628 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2629 *
2630 * You may hack this function to show different aspects of received frames,
2631 * including selective frame dumps.
2632 * group100 parameter selects whether to show 1 out of 100 good frames.
2633 *
2634 * TODO: This was originally written for 3945, need to audit for
2635 * proper operation with 4965.
2636 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002637static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002638 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002639 struct ieee80211_hdr *header, int group100)
2640{
2641 u32 to_us;
2642 u32 print_summary = 0;
2643 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2644 u32 hundred = 0;
2645 u32 dataframe = 0;
2646 u16 fc;
2647 u16 seq_ctl;
2648 u16 channel;
2649 u16 phy_flags;
2650 int rate_sym;
2651 u16 length;
2652 u16 status;
2653 u16 bcn_tmr;
2654 u32 tsf_low;
2655 u64 tsf;
2656 u8 rssi;
2657 u8 agc;
2658 u16 sig_avg;
2659 u16 noise_diff;
2660 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2661 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2662 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2663 u8 *data = IWL_RX_DATA(pkt);
2664
Ester Kummerbf403db2008-05-05 10:22:40 +08002665 if (likely(!(priv->debug_level & IWL_DL_RX)))
Tomas Winkler17744ff2008-03-02 01:52:00 +02002666 return;
2667
2668 /* MAC header */
2669 fc = le16_to_cpu(header->frame_control);
2670 seq_ctl = le16_to_cpu(header->seq_ctrl);
2671
2672 /* metadata */
2673 channel = le16_to_cpu(rx_hdr->channel);
2674 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2675 rate_sym = rx_hdr->rate;
2676 length = le16_to_cpu(rx_hdr->len);
2677
2678 /* end-of-frame status and timestamp */
2679 status = le32_to_cpu(rx_end->status);
2680 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2681 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2682 tsf = le64_to_cpu(rx_end->timestamp);
2683
2684 /* signal statistics */
2685 rssi = rx_stats->rssi;
2686 agc = rx_stats->agc;
2687 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2688 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2689
2690 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2691
2692 /* if data frame is to us and all is good,
2693 * (optionally) print summary for only 1 out of every 100 */
2694 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2695 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2696 dataframe = 1;
2697 if (!group100)
2698 print_summary = 1; /* print each frame */
2699 else if (priv->framecnt_to_us < 100) {
2700 priv->framecnt_to_us++;
2701 print_summary = 0;
2702 } else {
2703 priv->framecnt_to_us = 0;
2704 print_summary = 1;
2705 hundred = 1;
2706 }
2707 } else {
2708 /* print summary for all other frames */
2709 print_summary = 1;
2710 }
2711
2712 if (print_summary) {
2713 char *title;
2714 int rate_idx;
2715 u32 bitrate;
2716
2717 if (hundred)
2718 title = "100Frames";
2719 else if (fc & IEEE80211_FCTL_RETRY)
2720 title = "Retry";
2721 else if (ieee80211_is_assoc_response(fc))
2722 title = "AscRsp";
2723 else if (ieee80211_is_reassoc_response(fc))
2724 title = "RasRsp";
2725 else if (ieee80211_is_probe_response(fc)) {
2726 title = "PrbRsp";
2727 print_dump = 1; /* dump frame contents */
2728 } else if (ieee80211_is_beacon(fc)) {
2729 title = "Beacon";
2730 print_dump = 1; /* dump frame contents */
2731 } else if (ieee80211_is_atim(fc))
2732 title = "ATIM";
2733 else if (ieee80211_is_auth(fc))
2734 title = "Auth";
2735 else if (ieee80211_is_deauth(fc))
2736 title = "DeAuth";
2737 else if (ieee80211_is_disassoc(fc))
2738 title = "DisAssoc";
2739 else
2740 title = "Frame";
2741
2742 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
2743 if (unlikely(rate_idx == -1))
2744 bitrate = 0;
2745 else
Tomas Winkler1826dcc2008-05-15 13:54:02 +08002746 bitrate = iwl_rates[rate_idx].ieee / 2;
Tomas Winkler17744ff2008-03-02 01:52:00 +02002747
2748 /* print frame summary.
2749 * MAC addresses show just the last byte (for brevity),
2750 * but you can hack it to show more, if you'd like to. */
2751 if (dataframe)
2752 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2753 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2754 title, fc, header->addr1[5],
2755 length, rssi, channel, bitrate);
2756 else {
2757 /* src/dst addresses assume managed mode */
2758 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2759 "src=0x%02x, rssi=%u, tim=%lu usec, "
2760 "phy=0x%02x, chnl=%d\n",
2761 title, fc, header->addr1[5],
2762 header->addr3[5], rssi,
2763 tsf_low - priv->scan_start_tsf,
2764 phy_flags, channel);
2765 }
2766 }
2767 if (print_dump)
Ester Kummerbf403db2008-05-05 10:22:40 +08002768 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002769}
2770#else
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002771static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
Tomas Winklerdb11d632008-05-05 10:22:33 +08002772 struct iwl_rx_packet *pkt,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002773 struct ieee80211_hdr *header,
2774 int group100)
2775{
2776}
2777#endif
2778
Zhu Yib481de92007-09-25 17:54:57 -07002779
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002780
Tomas Winkler857485c2008-03-21 13:53:44 -07002781/* Called for REPLY_RX (legacy ABG frames), or
Zhu Yib481de92007-09-25 17:54:57 -07002782 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002783static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002784 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002785{
Tomas Winkler17744ff2008-03-02 01:52:00 +02002786 struct ieee80211_hdr *header;
2787 struct ieee80211_rx_status rx_status;
Tomas Winklerdb11d632008-05-05 10:22:33 +08002788 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002789 /* Use phy data (Rx signal strength, etc.) contained within
2790 * this rx packet for legacy frames,
2791 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
Tomas Winkler857485c2008-03-21 13:53:44 -07002792 int include_phy = (pkt->hdr.cmd == REPLY_RX);
Zhu Yib481de92007-09-25 17:54:57 -07002793 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2794 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2795 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2796 __le32 *rx_end;
2797 unsigned int len = 0;
Zhu Yib481de92007-09-25 17:54:57 -07002798 u16 fc;
Zhu Yib481de92007-09-25 17:54:57 -07002799 u8 network_packet;
2800
Tomas Winkler17744ff2008-03-02 01:52:00 +02002801 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
Tomas Winklerdc92e492008-04-03 16:05:22 -07002802 rx_status.freq =
Emmanuel Grumbachc0186072008-05-08 11:34:05 +08002803 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002804 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2805 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
Tomas Winklerdc92e492008-04-03 16:05:22 -07002806 rx_status.rate_idx =
2807 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
Tomas Winkler17744ff2008-03-02 01:52:00 +02002808 if (rx_status.band == IEEE80211_BAND_5GHZ)
2809 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2810
2811 rx_status.antenna = 0;
2812 rx_status.flag = 0;
2813
Zhu Yib481de92007-09-25 17:54:57 -07002814 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
Tomas Winklerdc92e492008-04-03 16:05:22 -07002815 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2816 rx_start->cfg_phy_cnt);
Zhu Yib481de92007-09-25 17:54:57 -07002817 return;
2818 }
Tomas Winkler17744ff2008-03-02 01:52:00 +02002819
Zhu Yib481de92007-09-25 17:54:57 -07002820 if (!include_phy) {
2821 if (priv->last_phy_res[0])
2822 rx_start = (struct iwl4965_rx_phy_res *)
2823 &priv->last_phy_res[1];
2824 else
2825 rx_start = NULL;
2826 }
2827
2828 if (!rx_start) {
2829 IWL_ERROR("MPDU frame without a PHY data\n");
2830 return;
2831 }
2832
2833 if (include_phy) {
2834 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2835 + rx_start->cfg_phy_cnt);
2836
2837 len = le16_to_cpu(rx_start->byte_count);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002838 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
Zhu Yib481de92007-09-25 17:54:57 -07002839 sizeof(struct iwl4965_rx_phy_res) + len);
2840 } else {
2841 struct iwl4965_rx_mpdu_res_start *amsdu =
2842 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2843
2844 header = (void *)(pkt->u.raw +
2845 sizeof(struct iwl4965_rx_mpdu_res_start));
2846 len = le16_to_cpu(amsdu->byte_count);
2847 rx_end = (__le32 *) (pkt->u.raw +
2848 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2849 }
2850
2851 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2852 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2853 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2854 le32_to_cpu(*rx_end));
2855 return;
2856 }
2857
2858 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2859
Zhu Yib481de92007-09-25 17:54:57 -07002860 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
Bruno Randolf566bfe52008-05-08 19:15:40 +02002861 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
Zhu Yib481de92007-09-25 17:54:57 -07002862
2863 /* Meaningful noise values are available only from beacon statistics,
2864 * which are gathered only when associated, and indicate noise
2865 * only for the associated network channel ...
2866 * Ignore these noise values while scanning (other channels) */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002867 if (iwl_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07002868 !test_bit(STATUS_SCANNING, &priv->status)) {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002869 rx_status.noise = priv->last_rx_noise;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002870 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002871 rx_status.noise);
Zhu Yib481de92007-09-25 17:54:57 -07002872 } else {
Tomas Winkler17744ff2008-03-02 01:52:00 +02002873 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
Bruno Randolf566bfe52008-05-08 19:15:40 +02002874 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002875 }
2876
2877 /* Reset beacon noise level if not associated. */
Tomas Winkler3109ece2008-03-28 16:33:35 -07002878 if (!iwl_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07002879 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2880
Tomas Winkler17744ff2008-03-02 01:52:00 +02002881 /* Set "1" to report good data frames in groups of 100 */
2882 /* FIXME: need to optimze the call: */
2883 iwl4965_dbg_report_frame(priv, pkt, header, 1);
Zhu Yib481de92007-09-25 17:54:57 -07002884
Tomas Winkler17744ff2008-03-02 01:52:00 +02002885 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
Bruno Randolf566bfe52008-05-08 19:15:40 +02002886 rx_status.signal, rx_status.noise, rx_status.signal,
John W. Linville06501d22008-04-01 17:38:47 -04002887 (unsigned long long)rx_status.mactime);
Zhu Yib481de92007-09-25 17:54:57 -07002888
Abhijeet Kolekar4419e392008-05-05 10:22:47 +08002889
2890 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2891 iwl4965_handle_data_packet(priv, 1, include_phy,
2892 rxb, &rx_status);
2893 return;
2894 }
2895
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002896 network_packet = iwl4965_is_network_packet(priv, header);
Zhu Yib481de92007-09-25 17:54:57 -07002897 if (network_packet) {
Bruno Randolf566bfe52008-05-08 19:15:40 +02002898 priv->last_rx_rssi = rx_status.signal;
Zhu Yib481de92007-09-25 17:54:57 -07002899 priv->last_beacon_time = priv->ucode_beacon_time;
2900 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2901 }
2902
2903 fc = le16_to_cpu(header->frame_control);
2904 switch (fc & IEEE80211_FCTL_FTYPE) {
2905 case IEEE80211_FTYPE_MGMT:
Zhu Yib481de92007-09-25 17:54:57 -07002906 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2907 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2908 header->addr2);
Tomas Winkler17744ff2008-03-02 01:52:00 +02002909 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002910 break;
2911
2912 case IEEE80211_FTYPE_CTL:
Ron Rindjunsky9ab46172007-12-25 17:00:38 +02002913#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07002914 switch (fc & IEEE80211_FCTL_STYPE) {
2915 case IEEE80211_STYPE_BACK_REQ:
2916 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2917 iwl4965_handle_data_packet(priv, 0, include_phy,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002918 rxb, &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002919 break;
2920 default:
2921 break;
2922 }
2923#endif
Zhu Yib481de92007-09-25 17:54:57 -07002924 break;
2925
Joe Perches0795af52007-10-03 17:59:30 -07002926 case IEEE80211_FTYPE_DATA: {
2927 DECLARE_MAC_BUF(mac1);
2928 DECLARE_MAC_BUF(mac2);
2929 DECLARE_MAC_BUF(mac3);
2930
Zhu Yib481de92007-09-25 17:54:57 -07002931 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2932 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2933 header->addr2);
2934
2935 if (unlikely(!network_packet))
2936 IWL_DEBUG_DROP("Dropping (non network): "
Joe Perches0795af52007-10-03 17:59:30 -07002937 "%s, %s, %s\n",
2938 print_mac(mac1, header->addr1),
2939 print_mac(mac2, header->addr2),
2940 print_mac(mac3, header->addr3));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002941 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
Joe Perches0795af52007-10-03 17:59:30 -07002942 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2943 print_mac(mac1, header->addr1),
2944 print_mac(mac2, header->addr2),
2945 print_mac(mac3, header->addr3));
Zhu Yib481de92007-09-25 17:54:57 -07002946 else
2947 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
Tomas Winkler17744ff2008-03-02 01:52:00 +02002948 &rx_status);
Zhu Yib481de92007-09-25 17:54:57 -07002949 break;
Joe Perches0795af52007-10-03 17:59:30 -07002950 }
Zhu Yib481de92007-09-25 17:54:57 -07002951 default:
2952 break;
2953
2954 }
2955}
2956
2957/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
2958 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002959static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002960 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002961{
Tomas Winklerdb11d632008-05-05 10:22:33 +08002962 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07002963 priv->last_phy_res[0] = 1;
2964 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
2965 sizeof(struct iwl4965_rx_phy_res));
2966}
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002967static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08002968 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07002969
2970{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002971#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Tomas Winklerdb11d632008-05-05 10:22:33 +08002972 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002973 struct iwl4965_missed_beacon_notif *missed_beacon;
Zhu Yib481de92007-09-25 17:54:57 -07002974
2975 missed_beacon = &pkt->u.missed_beacon;
2976 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
2977 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
2978 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
2979 le32_to_cpu(missed_beacon->total_missed_becons),
2980 le32_to_cpu(missed_beacon->num_recvd_beacons),
2981 le32_to_cpu(missed_beacon->num_expected_beacons));
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002982 if (!test_bit(STATUS_SCANNING, &priv->status))
2983 iwl_init_sensitivity(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002984 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002985#endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
Zhu Yib481de92007-09-25 17:54:57 -07002986}
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002987#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07002988
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002989/**
2990 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
2991 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07002992static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002993 int sta_id, int tid)
2994{
2995 unsigned long flags;
2996
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08002997 /* Remove "disable" flag, to enable Tx for this TID */
Zhu Yib481de92007-09-25 17:54:57 -07002998 spin_lock_irqsave(&priv->sta_lock, flags);
2999 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3000 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3001 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3002 spin_unlock_irqrestore(&priv->sta_lock, flags);
3003
Tomas Winkler133636d2008-05-05 10:22:34 +08003004 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003005}
3006
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003007/**
3008 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3009 *
3010 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3011 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3012 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003013static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winkler6def9762008-05-05 10:22:31 +08003014 struct iwl_ht_agg *agg,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003015 struct iwl4965_compressed_ba_resp*
Zhu Yib481de92007-09-25 17:54:57 -07003016 ba_resp)
3017
3018{
3019 int i, sh, ack;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003020 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3021 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3022 u64 bitmap;
3023 int successes = 0;
3024 struct ieee80211_tx_status *tx_status;
Zhu Yib481de92007-09-25 17:54:57 -07003025
3026 if (unlikely(!agg->wait_for_ba)) {
3027 IWL_ERROR("Received BA when not expected\n");
3028 return -EINVAL;
3029 }
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003030
3031 /* Mark that the expected block-ack response arrived */
Zhu Yib481de92007-09-25 17:54:57 -07003032 agg->wait_for_ba = 0;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003033 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003034
3035 /* Calculate shift to align block-ack bits with our Tx window bits */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003036 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
Ian Schram01ebd062007-10-25 17:15:22 +08003037 if (sh < 0) /* tbw something is wrong with indices */
Zhu Yib481de92007-09-25 17:54:57 -07003038 sh += 0x100;
3039
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003040 /* don't use 64-bit values for now */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003041 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
Zhu Yib481de92007-09-25 17:54:57 -07003042
3043 if (agg->frame_count > (64 - sh)) {
3044 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3045 return -1;
3046 }
3047
3048 /* check for success or failure according to the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003049 * transmitted bitmap and block-ack bitmap */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003050 bitmap &= agg->bitmap;
Zhu Yib481de92007-09-25 17:54:57 -07003051
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003052 /* For each frame attempted in aggregation,
3053 * update driver's record of tx frame's status. */
Zhu Yib481de92007-09-25 17:54:57 -07003054 for (i = 0; i < agg->frame_count ; i++) {
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003055 ack = bitmap & (1 << i);
3056 successes += !!ack;
Zhu Yib481de92007-09-25 17:54:57 -07003057 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003058 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3059 agg->start_idx + i);
Zhu Yib481de92007-09-25 17:54:57 -07003060 }
3061
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003062 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3063 tx_status->flags = IEEE80211_TX_STATUS_ACK;
Ron Rindjunsky99556432008-01-28 14:07:25 +02003064 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3065 tx_status->ampdu_ack_map = successes;
3066 tx_status->ampdu_ack_len = agg->frame_count;
Ron Rindjunsky4c424e42008-03-04 18:09:27 -08003067 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
3068 &tx_status->control);
Zhu Yib481de92007-09-25 17:54:57 -07003069
John W. Linvillef868f4e2008-03-07 16:38:43 -05003070 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003071
3072 return 0;
3073}
3074
3075/**
3076 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3077 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003078static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003079 u16 txq_id)
3080{
3081 /* Simply stop the queue, but don't change any configuration;
3082 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003083 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07003084 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003085 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3086 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003087}
3088
3089/**
3090 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003091 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003092 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003093static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003094 u16 ssn_idx, u8 tx_fifo)
3095{
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003096 int ret = 0;
3097
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003098 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3099 IWL_WARNING("queue number too small: %d, must be > %d\n",
3100 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3101 return -EINVAL;
3102 }
3103
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003104 ret = iwl_grab_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003105 if (ret)
3106 return ret;
3107
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003108 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3109
Tomas Winkler12a81f62008-04-03 16:05:20 -07003110 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003111
3112 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3113 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3114 /* supposes that ssn_idx is valid (!= 0xFFF) */
3115 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3116
Tomas Winkler12a81f62008-04-03 16:05:20 -07003117 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003118 iwl4965_txq_ctx_deactivate(priv, txq_id);
3119 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3120
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003121 iwl_release_nic_access(priv);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003122
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003123 return 0;
3124}
3125
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003126int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003127 u8 tid, int txq_id)
3128{
Tomas Winkler443cfd42008-05-15 13:53:57 +08003129 struct iwl_queue *q = &priv->txq[txq_id].q;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003130 u8 *addr = priv->stations[sta_id].sta.sta.addr;
Tomas Winkler6def9762008-05-05 10:22:31 +08003131 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003132
3133 switch (priv->stations[sta_id].tid[tid].agg.state) {
3134 case IWL_EMPTYING_HW_QUEUE_DELBA:
3135 /* We are reclaiming the last packet of the */
3136 /* aggregated HW queue */
3137 if (txq_id == tid_data->agg.txq_id &&
3138 q->read_ptr == q->write_ptr) {
3139 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3140 int tx_fifo = default_tid_to_tx_fifo[tid];
3141 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3142 iwl4965_tx_queue_agg_disable(priv, txq_id,
3143 ssn, tx_fifo);
3144 tid_data->agg.state = IWL_AGG_OFF;
3145 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3146 }
3147 break;
3148 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3149 /* We are reclaiming the last packet of the queue */
3150 if (tid_data->tfds_in_queue == 0) {
3151 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3152 tid_data->agg.state = IWL_AGG_ON;
3153 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3154 }
3155 break;
3156 }
Zhu Yib481de92007-09-25 17:54:57 -07003157 return 0;
3158}
3159
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003160/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003161 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3162 *
3163 * Handles block-acknowledge notification from device, which reports success
3164 * of frames sent via aggregation.
3165 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003166static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
Tomas Winklera55360e2008-05-05 10:22:28 +08003167 struct iwl_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003168{
Tomas Winklerdb11d632008-05-05 10:22:33 +08003169 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003170 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
Zhu Yib481de92007-09-25 17:54:57 -07003171 int index;
Ron Rindjunsky16466902008-05-05 10:22:50 +08003172 struct iwl_tx_queue *txq = NULL;
Tomas Winkler6def9762008-05-05 10:22:31 +08003173 struct iwl_ht_agg *agg;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003174 DECLARE_MAC_BUF(mac);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003175
3176 /* "flow" corresponds to Tx queue */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003177 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003178
3179 /* "ssn" is start of block-ack Tx window, corresponds to index
3180 * (in Tx queue's circular buffer) of first TFD/frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07003181 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3182
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07003183 if (scd_flow >= priv->hw_params.max_txq_num) {
Zhu Yib481de92007-09-25 17:54:57 -07003184 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3185 return;
3186 }
3187
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003188 txq = &priv->txq[scd_flow];
Zhu Yib481de92007-09-25 17:54:57 -07003189 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003190
3191 /* Find index just before block-ack window */
Tomas Winkler443cfd42008-05-15 13:53:57 +08003192 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
Zhu Yib481de92007-09-25 17:54:57 -07003193
Ian Schram01ebd062007-10-25 17:15:22 +08003194 /* TODO: Need to get this copy more safely - now good for debug */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003195
Joe Perches0795af52007-10-03 17:59:30 -07003196 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3197 "sta_id = %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07003198 agg->wait_for_ba,
Joe Perches0795af52007-10-03 17:59:30 -07003199 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
Zhu Yib481de92007-09-25 17:54:57 -07003200 ba_resp->sta_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003201 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
Zhu Yib481de92007-09-25 17:54:57 -07003202 "%d, scd_ssn = %d\n",
3203 ba_resp->tid,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003204 ba_resp->seq_ctl,
Tomas Winkler0310ae72008-03-11 16:17:19 -07003205 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
Zhu Yib481de92007-09-25 17:54:57 -07003206 ba_resp->scd_flow,
3207 ba_resp->scd_ssn);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003208 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
Zhu Yib481de92007-09-25 17:54:57 -07003209 agg->start_idx,
John W. Linvillef868f4e2008-03-07 16:38:43 -05003210 (unsigned long long)agg->bitmap);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003211
3212 /* Update driver's record of ACK vs. not for each frame in window */
Zhu Yib481de92007-09-25 17:54:57 -07003213 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003214
3215 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3216 * block-ack window (we assume that they've been successfully
3217 * transmitted ... if not, it's too late anyway). */
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003218 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003219 /* calculate mac80211 ampdu sw queue to wake */
3220 int ampdu_q =
3221 scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003222 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3223 priv->stations[ba_resp->sta_id].
3224 tid[ba_resp->tid].tfds_in_queue -= freed;
Tomas Winkler443cfd42008-05-15 13:53:57 +08003225 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003226 priv->mac80211_registered &&
3227 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
Ron Rindjunsky0d0b2c12008-05-04 14:48:18 +03003228 ieee80211_wake_queue(priv->hw, ampdu_q);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003229 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3230 ba_resp->tid, scd_flow);
3231 }
Zhu Yib481de92007-09-25 17:54:57 -07003232}
3233
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003234/**
3235 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3236 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003237static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07003238 u16 txq_id)
3239{
3240 u32 tbl_dw_addr;
3241 u32 tbl_dw;
3242 u16 scd_q2ratid;
3243
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003244 scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07003245
3246 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003247 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07003248
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003249 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003250
3251 if (txq_id & 0x1)
3252 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3253 else
3254 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3255
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003256 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07003257
3258 return 0;
3259}
3260
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003261
Zhu Yib481de92007-09-25 17:54:57 -07003262/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003263 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3264 *
3265 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3266 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07003267 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003268static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
Zhu Yib481de92007-09-25 17:54:57 -07003269 int tx_fifo, int sta_id, int tid,
3270 u16 ssn_idx)
3271{
3272 unsigned long flags;
3273 int rc;
3274 u16 ra_tid;
3275
3276 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3277 IWL_WARNING("queue number too small: %d, must be > %d\n",
3278 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3279
3280 ra_tid = BUILD_RAxTID(sta_id, tid);
3281
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003282 /* Modify device's station table to Tx this TID */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003283 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07003284
3285 spin_lock_irqsave(&priv->lock, flags);
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003286 rc = iwl_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003287 if (rc) {
3288 spin_unlock_irqrestore(&priv->lock, flags);
3289 return rc;
3290 }
3291
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003292 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07003293 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3294
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003295 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07003296 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3297
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003298 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07003299 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003300
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003301 /* Place first TFD at index corresponding to start sequence number.
3302 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08003303 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3304 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07003305 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3306
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003307 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003308 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003309 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3310 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3311 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003312
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003313 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07003314 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3315 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3316 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07003317
Tomas Winkler12a81f62008-04-03 16:05:20 -07003318 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07003319
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003320 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07003321 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3322
Tomas Winkler3395f6e2008-03-25 16:33:37 -07003323 iwl_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003324 spin_unlock_irqrestore(&priv->lock, flags);
3325
3326 return 0;
3327}
3328
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003329#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003330
Zhu Yib481de92007-09-25 17:54:57 -07003331
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003332#ifdef CONFIG_IWL4965_HT
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003333static int iwl4965_rx_agg_start(struct iwl_priv *priv,
3334 const u8 *addr, int tid, u16 ssn)
Zhu Yib481de92007-09-25 17:54:57 -07003335{
3336 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003337 int sta_id;
3338
3339 sta_id = iwl_find_station(priv, addr);
3340 if (sta_id == IWL_INVALID_STATION)
3341 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003342
3343 spin_lock_irqsave(&priv->sta_lock, flags);
3344 priv->stations[sta_id].sta.station_flags_msk = 0;
3345 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3346 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3347 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3348 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3349 spin_unlock_irqrestore(&priv->sta_lock, flags);
3350
Tomas Winkler133636d2008-05-05 10:22:34 +08003351 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003352 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003353}
3354
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003355static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3356 const u8 *addr, int tid)
Zhu Yib481de92007-09-25 17:54:57 -07003357{
3358 unsigned long flags;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003359 int sta_id;
3360
3361 sta_id = iwl_find_station(priv, addr);
3362 if (sta_id == IWL_INVALID_STATION)
3363 return -ENXIO;
Zhu Yib481de92007-09-25 17:54:57 -07003364
3365 spin_lock_irqsave(&priv->sta_lock, flags);
3366 priv->stations[sta_id].sta.station_flags_msk = 0;
3367 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3368 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3369 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3370 spin_unlock_irqrestore(&priv->sta_lock, flags);
3371
Tomas Winkler133636d2008-05-05 10:22:34 +08003372 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003373 CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07003374}
3375
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08003376/*
3377 * Find first available (lowest unused) Tx Queue, mark it "active".
3378 * Called only when finding queue for aggregation.
3379 * Should never return anything < 7, because they should already
3380 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
3381 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003382static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003383{
3384 int txq_id;
3385
Tomas Winkler5425e492008-04-15 16:01:38 -07003386 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
Zhu Yib481de92007-09-25 17:54:57 -07003387 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
3388 return txq_id;
3389 return -1;
3390}
3391
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003392static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
3393 u16 tid, u16 *start_seq_num)
Zhu Yib481de92007-09-25 17:54:57 -07003394{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003395 struct iwl_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07003396 int sta_id;
3397 int tx_fifo;
3398 int txq_id;
3399 int ssn = -1;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003400 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003401 unsigned long flags;
Tomas Winkler6def9762008-05-05 10:22:31 +08003402 struct iwl_tid_data *tid_data;
Joe Perches0795af52007-10-03 17:59:30 -07003403 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07003404
3405 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3406 tx_fifo = default_tid_to_tx_fifo[tid];
3407 else
3408 return -EINVAL;
3409
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003410 IWL_WARNING("%s on ra = %s tid = %d\n",
3411 __func__, print_mac(mac, ra), tid);
Zhu Yib481de92007-09-25 17:54:57 -07003412
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003413 sta_id = iwl_find_station(priv, ra);
Zhu Yib481de92007-09-25 17:54:57 -07003414 if (sta_id == IWL_INVALID_STATION)
3415 return -ENXIO;
3416
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003417 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
3418 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
3419 return -ENXIO;
3420 }
3421
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003422 txq_id = iwl4965_txq_ctx_activate_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003423 if (txq_id == -1)
3424 return -ENXIO;
3425
3426 spin_lock_irqsave(&priv->sta_lock, flags);
3427 tid_data = &priv->stations[sta_id].tid[tid];
3428 ssn = SEQ_TO_SN(tid_data->seq_number);
3429 tid_data->agg.txq_id = txq_id;
3430 spin_unlock_irqrestore(&priv->sta_lock, flags);
3431
3432 *start_seq_num = ssn;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003433 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
3434 sta_id, tid, ssn);
3435 if (ret)
3436 return ret;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003437
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003438 ret = 0;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003439 if (tid_data->tfds_in_queue == 0) {
3440 printk(KERN_ERR "HW queue is empty\n");
3441 tid_data->agg.state = IWL_AGG_ON;
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003442 ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003443 } else {
3444 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
3445 tid_data->tfds_in_queue);
3446 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
3447 }
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003448 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07003449}
3450
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003451static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
Zhu Yib481de92007-09-25 17:54:57 -07003452{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003453 struct iwl_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07003454 int tx_fifo_id, txq_id, sta_id, ssn = -1;
Tomas Winkler6def9762008-05-05 10:22:31 +08003455 struct iwl_tid_data *tid_data;
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003456 int ret, write_ptr, read_ptr;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003457 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07003458 DECLARE_MAC_BUF(mac);
3459
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003460 if (!ra) {
3461 IWL_ERROR("ra = NULL\n");
Zhu Yib481de92007-09-25 17:54:57 -07003462 return -EINVAL;
3463 }
3464
3465 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
3466 tx_fifo_id = default_tid_to_tx_fifo[tid];
3467 else
3468 return -EINVAL;
3469
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003470 sta_id = iwl_find_station(priv, ra);
Zhu Yib481de92007-09-25 17:54:57 -07003471
3472 if (sta_id == IWL_INVALID_STATION)
3473 return -ENXIO;
3474
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003475 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
3476 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
3477
Zhu Yib481de92007-09-25 17:54:57 -07003478 tid_data = &priv->stations[sta_id].tid[tid];
3479 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
3480 txq_id = tid_data->agg.txq_id;
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003481 write_ptr = priv->txq[txq_id].q.write_ptr;
3482 read_ptr = priv->txq[txq_id].q.read_ptr;
Zhu Yib481de92007-09-25 17:54:57 -07003483
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003484 /* The queue is not empty */
3485 if (write_ptr != read_ptr) {
3486 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
3487 priv->stations[sta_id].tid[tid].agg.state =
3488 IWL_EMPTYING_HW_QUEUE_DELBA;
3489 return 0;
3490 }
3491
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003492 IWL_DEBUG_HT("HW queue is empty\n");
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003493 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
3494
3495 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003496 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02003497 spin_unlock_irqrestore(&priv->lock, flags);
3498
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08003499 if (ret)
3500 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07003501
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003502 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
Zhu Yib481de92007-09-25 17:54:57 -07003503
3504 return 0;
3505}
3506
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003507int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3508 enum ieee80211_ampdu_mlme_action action,
3509 const u8 *addr, u16 tid, u16 *ssn)
3510{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003511 struct iwl_priv *priv = hw->priv;
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003512 DECLARE_MAC_BUF(mac);
3513
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003514 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3515 print_mac(mac, addr), tid);
3516
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003517 switch (action) {
3518 case IEEE80211_AMPDU_RX_START:
3519 IWL_DEBUG_HT("start Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003520 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003521 case IEEE80211_AMPDU_RX_STOP:
3522 IWL_DEBUG_HT("stop Rx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003523 return iwl4965_rx_agg_stop(priv, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003524 case IEEE80211_AMPDU_TX_START:
3525 IWL_DEBUG_HT("start Tx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003526 return iwl4965_tx_agg_start(hw, addr, tid, ssn);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003527 case IEEE80211_AMPDU_TX_STOP:
3528 IWL_DEBUG_HT("stop Tx\n");
Ron Rindjunskyfe07aa72008-04-17 16:03:37 -07003529 return iwl4965_tx_agg_stop(hw, addr, tid);
Ron Rindjunsky8114fcf2008-01-28 14:07:23 +02003530 default:
3531 IWL_DEBUG_HT("unknown\n");
3532 return -EINVAL;
3533 break;
3534 }
3535 return 0;
3536}
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003537#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003538
Tomas Winkler133636d2008-05-05 10:22:34 +08003539
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003540static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3541{
3542 switch (cmd_id) {
3543 case REPLY_RXON:
3544 return (u16) sizeof(struct iwl4965_rxon_cmd);
3545 default:
3546 return len;
3547 }
3548}
3549
Tomas Winkler133636d2008-05-05 10:22:34 +08003550static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3551{
3552 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3553 addsta->mode = cmd->mode;
3554 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3555 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3556 addsta->station_flags = cmd->station_flags;
3557 addsta->station_flags_msk = cmd->station_flags_msk;
3558 addsta->tid_disable_tx = cmd->tid_disable_tx;
3559 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3560 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3561 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3562 addsta->reserved1 = __constant_cpu_to_le16(0);
3563 addsta->reserved2 = __constant_cpu_to_le32(0);
3564
3565 return (u16)sizeof(struct iwl4965_addsta_cmd);
3566}
Zhu Yib481de92007-09-25 17:54:57 -07003567/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003568static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003569{
3570 /* Legacy Rx frames */
Tomas Winkler857485c2008-03-21 13:53:44 -07003571 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
Zhu Yib481de92007-09-25 17:54:57 -07003572
3573 /* High-throughput (HT) Rx frames */
3574 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
3575 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
3576
3577 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
3578 iwl4965_rx_missed_beacon_notif;
3579
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003580#ifdef CONFIG_IWL4965_HT
Zhu Yib481de92007-09-25 17:54:57 -07003581 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003582#endif /* CONFIG_IWL4965_HT */
Zhu Yib481de92007-09-25 17:54:57 -07003583}
3584
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003585void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003586{
3587 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07003588#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
Zhu Yib481de92007-09-25 17:54:57 -07003589 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
3590#endif
Zhu Yib481de92007-09-25 17:54:57 -07003591 init_timer(&priv->statistics_periodic);
3592 priv->statistics_periodic.data = (unsigned long)priv;
3593 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
3594}
3595
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07003596void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003597{
3598 del_timer_sync(&priv->statistics_periodic);
3599
3600 cancel_delayed_work(&priv->init_alive_start);
3601}
3602
Tomas Winkler3c424c22008-04-15 16:01:42 -07003603
3604static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07003605 .rxon_assoc = iwl4965_send_rxon_assoc,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003606};
3607
Tomas Winkler857485c2008-03-21 13:53:44 -07003608static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08003609 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08003610 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07003611#ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3612 .chain_noise_reset = iwl4965_chain_noise_reset,
3613 .gain_computation = iwl4965_gain_computation,
3614#endif
Tomas Winkler857485c2008-03-21 13:53:44 -07003615};
3616
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003617static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07003618 .set_hw_params = iwl4965_hw_set_hw_params,
Ron Rindjunsky399f4902008-04-23 17:14:56 -07003619 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3620 .free_shared_mem = iwl4965_free_shared_mem,
Ron Rindjunskyd67f5482008-05-05 10:22:49 +08003621 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
Tomas Winklere2a722e2008-04-14 21:16:10 -07003622 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +08003623 .disable_tx_fifo = iwl4965_disable_tx_fifo,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07003624 .rx_handler_setup = iwl4965_rx_handler_setup,
Tomas Winkler57aab752008-04-14 21:16:03 -07003625 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3626 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08003627 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07003628 .load_ucode = iwl4965_load_bsm,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003629 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07003630 .init = iwl4965_apm_init,
Tomas Winkler694cc562008-04-24 11:55:22 -07003631 .config = iwl4965_nic_config,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07003632 .set_pwr_src = iwl4965_set_pwr_src,
3633 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003634 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07003635 .regulatory_bands = {
3636 EEPROM_REGULATORY_BAND_1_CHANNELS,
3637 EEPROM_REGULATORY_BAND_2_CHANNELS,
3638 EEPROM_REGULATORY_BAND_3_CHANNELS,
3639 EEPROM_REGULATORY_BAND_4_CHANNELS,
3640 EEPROM_REGULATORY_BAND_5_CHANNELS,
3641 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3642 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3643 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003644 .verify_signature = iwlcore_eeprom_verify_signature,
3645 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3646 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler8614f362008-04-23 17:14:55 -07003647 .check_version = iwl4965_eeprom_check_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003648 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003649 },
Mohamed Abbasad97edd2008-03-28 16:21:06 -07003650 .radio_kill_sw = iwl4965_radio_kill_sw,
Mohamed Abbas5da4b552008-04-21 15:41:51 -07003651 .set_power = iwl4965_set_power,
3652 .update_chain_flags = iwl4965_update_chain_flags,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003653};
3654
3655static struct iwl_ops iwl4965_ops = {
3656 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07003657 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07003658 .utils = &iwl4965_hcmd_utils,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003659};
3660
Ron Rindjunskyfed90172008-04-15 16:01:41 -07003661struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08003662 .name = "4965AGN",
Tomas Winkler4bf775c2008-03-04 18:09:31 -08003663 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
Tomas Winkler82b9a122008-03-04 18:09:30 -08003664 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07003665 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07003666 .ops = &iwl4965_ops,
Assaf Krauss1ea87392008-03-18 14:57:50 -07003667 .mod_params = &iwl4965_mod_params,
Tomas Winkler82b9a122008-03-04 18:09:30 -08003668};
3669
Assaf Krauss1ea87392008-03-18 14:57:50 -07003670module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3671MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3672module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3673MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Emmanuel Grumbachfcc76c62008-04-15 16:01:47 -07003674module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3675MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
Assaf Krauss1ea87392008-03-18 14:57:50 -07003676module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3677MODULE_PARM_DESC(debug, "debug output mask");
3678module_param_named(
3679 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3680MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3681
3682module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3683MODULE_PARM_DESC(queues_num, "number of hw queues.");
3684
3685/* QoS */
3686module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3687MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3688module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3689MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ester Kummer3a1081e2008-05-06 11:05:14 +08003690module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3691MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");