| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _AD1889_H_ |
| 2 | #define _AD1889_H_ |
| 3 | |
| 4 | #define AD_DSWSMC 0x00 /* DMA input wave/syn mixer control */ |
| 5 | #define AD_DSRAMC 0x02 /* DMA output resamp/ADC mixer control */ |
| 6 | #define AD_DSWADA 0x04 /* DMA input wave attenuation */ |
| 7 | #define AD_DSSYDA 0x06 /* DMA input syn attentuation */ |
| 8 | #define AD_DSWAS 0x08 /* wave input sample rate */ |
| 9 | #define AD_DSRES 0x0a /* resampler output sample rate */ |
| 10 | #define AD_DSCCS 0x0c /* chip control/status */ |
| 11 | |
| 12 | #define AD_DMARESBA 0x40 /* RES base addr */ |
| 13 | #define AD_DMARESCA 0x44 /* RES current addr */ |
| 14 | #define AD_DMARESBC 0x48 /* RES base cnt */ |
| 15 | #define AD_DMARESCC 0x4c /* RES current count */ |
| 16 | #define AD_DMAADCBA 0x50 /* ADC */ |
| 17 | #define AD_DMAADCCA 0x54 |
| 18 | #define AD_DMAADCBC 0x58 |
| 19 | #define AD_DMAADCCC 0x5c |
| 20 | #define AD_DMASYNBA 0x60 /* SYN */ |
| 21 | #define AD_DMASYNCA 0x64 |
| 22 | #define AD_DMASYNBC 0x68 |
| 23 | #define AD_DMASYNCC 0x6c |
| 24 | #define AD_DMAWAVBA 0x70 /* WAV */ |
| 25 | #define AD_DMAWAVCA 0x74 |
| 26 | #define AD_DMAWAVBC 0x78 |
| 27 | #define AD_DMAWAVCC 0x7c |
| 28 | #define AD_DMARESICC 0x80 /* RES interrupt current count */ |
| 29 | #define AD_DMARESIBC 0x84 /* RES interrupt base count */ |
| 30 | #define AD_DMAADCICC 0x88 /* ADC interrupt current count */ |
| 31 | #define AD_DMAADCIBC 0x8c /* ADC interrupt base count */ |
| 32 | #define AD_DMASYNICC 0x90 /* SYN interrupt current count */ |
| 33 | #define AD_DMASYNIBC 0x94 /* SYN interrupt base count */ |
| 34 | #define AD_DMAWAVICC 0x98 /* WAV interrupt current count */ |
| 35 | #define AD_DMAWAVIBC 0x9c /* WAV interrupt base count */ |
| 36 | #define AD_DMARESCTRL 0xa0 /* RES PCI control/status */ |
| 37 | #define AD_DMAADCCTRL 0xa8 /* ADC PCI control/status */ |
| 38 | #define AD_DMASYNCTRL 0xb0 /* SYN PCI control/status */ |
| 39 | #define AD_DMAWAVCTRL 0xb8 /* WAV PCI control/status */ |
| 40 | #define AD_DMADISR 0xc0 /* PCI DMA intr status */ |
| 41 | #define AD_DMACHSS 0xc4 /* PCI DMA channel stop status */ |
| 42 | |
| 43 | #define AD_GPIOIPC 0xc8 /* IO port ctrl */ |
| 44 | #define AD_GPIOOP 0xca /* IO output status */ |
| 45 | #define AD_GPIOIP 0xcc /* IO input status */ |
| 46 | |
| 47 | /* AC97 registers, 0x100 - 0x17f; see ac97.h */ |
| 48 | #define AD_ACIC 0x180 /* AC Link interface ctrl */ |
| 49 | |
| 50 | /* OPL3; BAR1 */ |
| 51 | #define AD_OPLM0AS 0x00 /* Music0 address/status */ |
| 52 | #define AD_OPLM0DATA 0x01 /* Music0 data */ |
| 53 | #define AD_OPLM1A 0x02 /* Music1 address */ |
| 54 | #define AD_OPLM1DATA 0x03 /* Music1 data */ |
| 55 | /* 0x04-0x0f reserved */ |
| 56 | |
| 57 | /* MIDI; BAR2 */ |
| 58 | #define AD_MIDA 0x00 /* MIDI data */ |
| 59 | #define AD_MISC 0x01 /* MIDI status/cmd */ |
| 60 | /* 0x02-0xff reserved */ |
| 61 | |
| 62 | #define AD_DSIOMEMSIZE 512 |
| 63 | #define AD_OPLMEMSIZE 16 |
| 64 | #define AD_MIDIMEMSIZE 16 |
| 65 | |
| 66 | #define AD_WAV_STATE 0 |
| 67 | #define AD_ADC_STATE 1 |
| 68 | #define AD_MAX_STATES 2 |
| 69 | |
| 70 | #define DMA_SIZE (128*1024) |
| 71 | |
| 72 | #define DMA_FLAG_MAPPED 1 |
| 73 | |
| 74 | struct ad1889_dev; |
| 75 | |
| 76 | typedef struct ad1889_state { |
| 77 | struct ad1889_dev *card; |
| 78 | |
| 79 | mode_t open_mode; |
| 80 | struct dmabuf { |
| 81 | unsigned int rate; |
| 82 | unsigned char fmt, enable; |
| 83 | |
| 84 | /* buf management */ |
| 85 | size_t rawbuf_size; |
| 86 | void *rawbuf; |
| 87 | dma_addr_t dma_handle; /* mapped address */ |
| 88 | unsigned long dma_len; /* number of bytes mapped */ |
| 89 | |
| 90 | /* indexes into rawbuf for setting up DMA engine */ |
| 91 | volatile unsigned long rd_ptr, wr_ptr; |
| 92 | |
| 93 | wait_queue_head_t wait; /* to wait for buf servicing */ |
| 94 | |
| 95 | /* OSS bits */ |
| 96 | unsigned int mapped:1; |
| 97 | unsigned int ready:1; |
| 98 | unsigned int ossfragshift; |
| 99 | int ossmaxfrags; |
| 100 | unsigned int subdivision; |
| 101 | } dmabuf; |
| 102 | |
| 103 | struct semaphore sem; |
| 104 | } ad1889_state_t; |
| 105 | |
| 106 | typedef struct ad1889_dev { |
| 107 | void __iomem *regbase; |
| 108 | struct pci_dev *pci; |
| 109 | |
| 110 | spinlock_t lock; |
| 111 | |
| 112 | int dev_audio; |
| 113 | |
| 114 | /* states; one per channel; right now only WAV and ADC */ |
| 115 | struct ad1889_state state[AD_MAX_STATES]; |
| 116 | |
| 117 | /* AC97 codec */ |
| 118 | struct ac97_codec *ac97_codec; |
| 119 | u16 ac97_features; |
| 120 | |
| 121 | /* debugging stuff */ |
| 122 | struct stats { |
| 123 | unsigned int wav_intrs, adc_intrs; |
| 124 | unsigned int blocks, underrun, error; |
| 125 | } stats; |
| 126 | } ad1889_dev_t; |
| 127 | |
| 128 | typedef struct ad1889_reg { |
| 129 | const char *name; |
| 130 | int offset; |
| 131 | int width; |
| 132 | } ad1889_reg_t; |
| 133 | |
| 134 | #endif |