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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090024#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/pwm_backlight.h>
26#include <linux/dm9000.h>
27#include <linux/gpio_keys.h>
28#include <linux/basic_mmio_gpio.h>
29#include <linux/spi/spi.h>
30
31#include <linux/i2c/pca953x.h>
32
33#include <video/platform_lcd.h>
34
35#include <linux/mfd/wm831x/core.h>
36#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090037#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090038#include <linux/mfd/wm831x/gpio.h>
39
40#include <asm/mach/arch.h>
41#include <asm/mach-types.h>
42
43#include <mach/hardware.h>
44#include <mach/map.h>
45
46#include <mach/s3c6410.h>
47#include <mach/regs-sys.h>
48#include <mach/regs-gpio.h>
49#include <mach/regs-modem.h>
Mark Brownd0f0b432011-08-19 22:40:07 +090050#include <mach/crag6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090051
Mark Browne1a3c742011-05-06 09:45:13 +090052#include <mach/regs-gpio-memport.h>
53
54#include <plat/regs-serial.h>
55#include <plat/regs-fb-v4.h>
56#include <plat/fb.h>
57#include <plat/sdhci.h>
58#include <plat/gpio-cfg.h>
59#include <plat/s3c64xx-spi.h>
60
61#include <plat/keypad.h>
62#include <plat/clock.h>
63#include <plat/devs.h>
64#include <plat/cpu.h>
65#include <plat/adc.h>
66#include <plat/iic.h>
67#include <plat/pm.h>
68
Mark Browne1a3c742011-05-06 09:45:13 +090069/* serial port setup */
70
71#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
72#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
73#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
74
75static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
76 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090077 .hwport = 0,
78 .flags = 0,
79 .ucon = UCON,
80 .ulcon = ULCON,
81 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090082 },
83 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090084 .hwport = 1,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090089 },
90 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090091 .hwport = 2,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090096 },
97 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +090098 .hwport = 3,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900103 },
104};
105
106static struct platform_pwm_backlight_data crag6410_backlight_data = {
107 .pwm_id = 0,
108 .max_brightness = 1000,
109 .dft_brightness = 600,
110 .pwm_period_ns = 100000, /* about 1kHz */
111};
112
113static struct platform_device crag6410_backlight_device = {
114 .name = "pwm-backlight",
115 .id = -1,
116 .dev = {
117 .parent = &s3c_device_timer[0].dev,
118 .platform_data = &crag6410_backlight_data,
119 },
120};
121
122static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
123{
124 pr_debug("%s: setting power %d\n", __func__, power);
125
126 if (power) {
127 gpio_set_value(S3C64XX_GPB(0), 1);
128 msleep(1);
129 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
130 } else {
131 gpio_direction_output(S3C64XX_GPF(14), 0);
132 gpio_set_value(S3C64XX_GPB(0), 0);
133 }
134}
135
136static struct platform_device crag6410_lcd_powerdev = {
137 .name = "platform-lcd",
138 .id = -1,
139 .dev.parent = &s3c_device_fb.dev,
140 .dev.platform_data = &(struct plat_lcd_data) {
141 .set_power = crag6410_lcd_power_set,
142 },
143};
144
145/* 640x480 URT */
146static struct s3c_fb_pd_win crag6410_fb_win0 = {
147 /* this is to ensure we use win0 */
148 .win_mode = {
149 .left_margin = 150,
150 .right_margin = 80,
151 .upper_margin = 40,
152 .lower_margin = 5,
153 .hsync_len = 40,
154 .vsync_len = 5,
155 .xres = 640,
156 .yres = 480,
157 },
158 .max_bpp = 32,
159 .default_bpp = 16,
160 .virtual_y = 480 * 2,
161 .virtual_x = 640,
162};
163
164/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
165static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
166 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
167 .win[0] = &crag6410_fb_win0,
168 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
169 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
170};
171
172/* 2x6 keypad */
173
174static uint32_t crag6410_keymap[] __initdata = {
175 /* KEY(row, col, keycode) */
176 KEY(0, 0, KEY_VOLUMEUP),
177 KEY(0, 1, KEY_HOME),
178 KEY(0, 2, KEY_VOLUMEDOWN),
179 KEY(0, 3, KEY_HELP),
180 KEY(0, 4, KEY_MENU),
181 KEY(0, 5, KEY_MEDIA),
182 KEY(1, 0, 232),
183 KEY(1, 1, KEY_DOWN),
184 KEY(1, 2, KEY_LEFT),
185 KEY(1, 3, KEY_UP),
186 KEY(1, 4, KEY_RIGHT),
187 KEY(1, 5, KEY_CAMERA),
188};
189
190static struct matrix_keymap_data crag6410_keymap_data __initdata = {
191 .keymap = crag6410_keymap,
192 .keymap_size = ARRAY_SIZE(crag6410_keymap),
193};
194
195static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
196 .keymap_data = &crag6410_keymap_data,
197 .rows = 2,
198 .cols = 6,
199};
200
201static struct gpio_keys_button crag6410_gpio_keys[] = {
202 [0] = {
203 .code = KEY_SUSPEND,
204 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900205 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900206 .wakeup = 1,
207 .active_low = 1,
208 },
Mark Brownae24c262011-06-22 13:08:13 +0900209 [1] = {
210 .code = SW_FRONT_PROXIMITY,
211 .gpio = S3C64XX_GPN(11), /* EINT 11 */
212 .type = EV_SW,
213 },
Mark Browne1a3c742011-05-06 09:45:13 +0900214};
215
216static struct gpio_keys_platform_data crag6410_gpio_keydata = {
217 .buttons = crag6410_gpio_keys,
218 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
219};
220
221static struct platform_device crag6410_gpio_keydev = {
222 .name = "gpio-keys",
223 .id = 0,
224 .dev.platform_data = &crag6410_gpio_keydata,
225};
226
227static struct resource crag6410_dm9k_resource[] = {
228 [0] = {
229 .start = S3C64XX_PA_XM0CSN5,
230 .end = S3C64XX_PA_XM0CSN5 + 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
235 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
236 .flags = IORESOURCE_MEM,
237 },
238 [2] = {
239 .start = S3C_EINT(17),
240 .end = S3C_EINT(17),
241 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
242 },
243};
244
245static struct dm9000_plat_data mini6410_dm9k_pdata = {
246 .flags = DM9000_PLATF_16BITONLY,
247};
248
249static struct platform_device crag6410_dm9k_device = {
250 .name = "dm9000",
251 .id = -1,
252 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
253 .resource = crag6410_dm9k_resource,
254 .dev.platform_data = &mini6410_dm9k_pdata,
255};
256
257static struct resource crag6410_mmgpio_resource[] = {
258 [0] = {
259 .start = S3C64XX_PA_XM0CSN4 + 1,
260 .end = S3C64XX_PA_XM0CSN4 + 1,
261 .flags = IORESOURCE_MEM,
262 },
263};
264
265static struct platform_device crag6410_mmgpio = {
266 .name = "basic-mmio-gpio",
267 .id = -1,
268 .resource = crag6410_mmgpio_resource,
269 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
270 .dev.platform_data = &(struct bgpio_pdata) {
271 .base = -1,
272 },
273};
274
Mark Brownae24c262011-06-22 13:08:13 +0900275static struct platform_device speyside_device = {
276 .name = "speyside",
277 .id = -1,
278};
279
280static struct platform_device speyside_wm8962_device = {
281 .name = "speyside-wm8962",
282 .id = -1,
283};
284
285static struct regulator_consumer_supply wallvdd_consumers[] = {
286 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
287 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
288};
289
290static struct regulator_init_data wallvdd_data = {
291 .constraints = {
292 .always_on = 1,
293 },
294 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
295 .consumer_supplies = wallvdd_consumers,
296};
297
298static struct fixed_voltage_config wallvdd_pdata = {
299 .supply_name = "WALLVDD",
300 .microvolts = 5000000,
301 .init_data = &wallvdd_data,
302 .gpio = -EINVAL,
303};
304
305static struct platform_device wallvdd_device = {
306 .name = "reg-fixed-voltage",
307 .id = -1,
308 .dev = {
309 .platform_data = &wallvdd_pdata,
310 },
311};
312
Mark Browne1a3c742011-05-06 09:45:13 +0900313static struct platform_device *crag6410_devices[] __initdata = {
314 &s3c_device_hsmmc0,
315 &s3c_device_hsmmc1,
316 &s3c_device_hsmmc2,
317 &s3c_device_i2c0,
318 &s3c_device_i2c1,
319 &s3c_device_fb,
320 &s3c_device_ohci,
321 &s3c_device_usb_hsotg,
322 &s3c_device_adc,
323 &s3c_device_rtc,
324 &s3c_device_ts,
325 &s3c_device_timer[0],
326 &s3c64xx_device_iis0,
327 &s3c64xx_device_iis1,
328 &samsung_asoc_dma,
329 &samsung_device_keypad,
330 &crag6410_gpio_keydev,
331 &crag6410_dm9k_device,
332 &s3c64xx_device_spi0,
333 &crag6410_mmgpio,
334 &crag6410_lcd_powerdev,
335 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900336 &speyside_device,
337 &speyside_wm8962_device,
338 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900339};
340
341static struct pca953x_platform_data crag6410_pca_data = {
342 .gpio_base = PCA935X_GPIO_BASE,
343 .irq_base = 0,
344};
345
Mark Brown986afc92011-08-12 18:08:17 +0900346/* VDDARM is controlled by DVS1 connected to GPK(0) */
347static struct wm831x_buckv_pdata vddarm_pdata = {
348 .dvs_control_src = 1,
349 .dvs_gpio = S3C64XX_GPK(0),
350};
351
Mark Browne1a3c742011-05-06 09:45:13 +0900352static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
353 REGULATOR_SUPPLY("vddarm", NULL),
354};
355
356static struct regulator_init_data vddarm __initdata = {
357 .constraints = {
358 .name = "VDDARM",
359 .min_uV = 1000000,
360 .max_uV = 1300000,
361 .always_on = 1,
362 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
363 },
364 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
365 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900366 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900367 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900368};
369
370static struct regulator_init_data vddint __initdata = {
371 .constraints = {
372 .name = "VDDINT",
373 .min_uV = 1000000,
374 .max_uV = 1200000,
375 .always_on = 1,
376 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
377 },
378};
379
380static struct regulator_init_data vddmem __initdata = {
381 .constraints = {
382 .name = "VDDMEM",
383 .always_on = 1,
384 },
385};
386
387static struct regulator_init_data vddsys __initdata = {
388 .constraints = {
389 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
390 .always_on = 1,
391 },
392};
393
394static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
395 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
396 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
397 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
398};
399
400static struct regulator_init_data vddmmc __initdata = {
401 .constraints = {
402 .name = "VDDMMC,UH",
403 .always_on = 1,
404 },
405 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
406 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900407 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900408};
409
410static struct regulator_init_data vddotgi __initdata = {
411 .constraints = {
412 .name = "VDDOTGi",
413 .always_on = 1,
414 },
Mark Brown35127292011-06-22 13:08:17 +0900415 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900416};
417
418static struct regulator_init_data vddotg __initdata = {
419 .constraints = {
420 .name = "VDDOTG",
421 .always_on = 1,
422 },
Mark Brown35127292011-06-22 13:08:17 +0900423 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900424};
425
426static struct regulator_init_data vddhi __initdata = {
427 .constraints = {
428 .name = "VDDHI",
429 .always_on = 1,
430 },
Mark Brown35127292011-06-22 13:08:17 +0900431 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900432};
433
434static struct regulator_init_data vddadc __initdata = {
435 .constraints = {
436 .name = "VDDADC,VDDDAC",
437 .always_on = 1,
438 },
Mark Brown35127292011-06-22 13:08:17 +0900439 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900440};
441
442static struct regulator_init_data vddmem0 __initdata = {
443 .constraints = {
444 .name = "VDDMEM0",
445 .always_on = 1,
446 },
Mark Brown35127292011-06-22 13:08:17 +0900447 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900448};
449
450static struct regulator_init_data vddpll __initdata = {
451 .constraints = {
452 .name = "VDDPLL",
453 .always_on = 1,
454 },
Mark Brown35127292011-06-22 13:08:17 +0900455 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900456};
457
458static struct regulator_init_data vddlcd __initdata = {
459 .constraints = {
460 .name = "VDDLCD",
461 .always_on = 1,
462 },
Mark Brown35127292011-06-22 13:08:17 +0900463 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900464};
465
466static struct regulator_init_data vddalive __initdata = {
467 .constraints = {
468 .name = "VDDALIVE",
469 .always_on = 1,
470 },
Mark Brown35127292011-06-22 13:08:17 +0900471 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900472};
473
Mark Brown89e1c3d2011-07-21 01:26:24 +0900474static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
475 .charger_enable = 1,
476 .vlim = 2500, /* mV */
477 .ilim = 200, /* uA */
478};
479
Mark Browne1a3c742011-05-06 09:45:13 +0900480static struct wm831x_status_pdata banff_red_led __initdata = {
481 .name = "banff:red:",
482 .default_src = WM831X_STATUS_MANUAL,
483};
484
485static struct wm831x_status_pdata banff_green_led __initdata = {
486 .name = "banff:green:",
487 .default_src = WM831X_STATUS_MANUAL,
488};
489
490static struct wm831x_touch_pdata touch_pdata __initdata = {
491 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900492 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900493};
494
Mark Browne1a3c742011-05-06 09:45:13 +0900495static struct wm831x_pdata crag_pmic_pdata __initdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900496 .wm831x_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900497 .irq_base = BANFF_PMIC_IRQ_BASE,
498 .gpio_base = GPIO_BOARD_START + 8,
499
Mark Brown89e1c3d2011-07-21 01:26:24 +0900500 .backup = &banff_backup_pdata,
501
Mark Brownae24c262011-06-22 13:08:13 +0900502 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900503 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
504 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900505 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
506 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
507 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
508 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
509 },
510
Mark Browne1a3c742011-05-06 09:45:13 +0900511 .dcdc = {
512 &vddarm, /* DCDC1 */
513 &vddint, /* DCDC2 */
514 &vddmem, /* DCDC3 */
515 },
516
517 .ldo = {
518 &vddsys, /* LDO1 */
519 &vddmmc, /* LDO2 */
520 NULL, /* LDO3 */
521 &vddotgi, /* LDO4 */
522 &vddotg, /* LDO5 */
523 &vddhi, /* LDO6 */
524 &vddadc, /* LDO7 */
525 &vddmem0, /* LDO8 */
526 &vddpll, /* LDO9 */
527 &vddlcd, /* LDO10 */
528 &vddalive, /* LDO11 */
529 },
530
531 .status = {
532 &banff_green_led,
533 &banff_red_led,
534 },
535
536 .touch = &touch_pdata,
537};
538
539static struct i2c_board_info i2c_devs0[] __initdata = {
540 { I2C_BOARD_INFO("24c08", 0x50), },
541 { I2C_BOARD_INFO("tca6408", 0x20),
542 .platform_data = &crag6410_pca_data,
543 },
544 { I2C_BOARD_INFO("wm8312", 0x34),
545 .platform_data = &crag_pmic_pdata,
546 .irq = S3C_EINT(23),
547 },
548};
549
550static struct s3c2410_platform_i2c i2c0_pdata = {
551 .frequency = 400000,
552};
553
Mark Brownae24c262011-06-22 13:08:13 +0900554static struct regulator_init_data pvdd_1v2 __initdata = {
555 .constraints = {
556 .name = "PVDD_1V2",
557 .always_on = 1,
558 },
559};
560
561static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
562 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
563 REGULATOR_SUPPLY("DBVDD", "1-001a"),
564 REGULATOR_SUPPLY("CPVDD", "1-001a"),
565 REGULATOR_SUPPLY("AVDD2", "1-001a"),
566 REGULATOR_SUPPLY("DCVDD", "1-001a"),
567 REGULATOR_SUPPLY("AVDD", "1-001a"),
568};
569
570static struct regulator_init_data pvdd_1v8 __initdata = {
571 .constraints = {
572 .name = "PVDD_1V8",
573 .always_on = 1,
574 },
575
576 .consumer_supplies = pvdd_1v8_consumers,
577 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
578};
579
580static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
581 REGULATOR_SUPPLY("MICVDD", "1-001a"),
582 REGULATOR_SUPPLY("AVDD1", "1-001a"),
583};
584
585static struct regulator_init_data pvdd_3v3 __initdata = {
586 .constraints = {
587 .name = "PVDD_3V3",
588 .always_on = 1,
589 },
590
591 .consumer_supplies = pvdd_3v3_consumers,
592 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
593};
594
595static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
596 .wm831x_num = 2,
597 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
598 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
599
600 .gpio_defaults = {
601 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
602 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
603 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
604 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
605 },
606
607 .dcdc = {
608 &pvdd_1v2, /* DCDC1 */
609 &pvdd_1v8, /* DCDC2 */
610 &pvdd_3v3, /* DCDC3 */
611 },
612
613 .disable_touch = true,
614};
615
Mark Browne1a3c742011-05-06 09:45:13 +0900616static struct i2c_board_info i2c_devs1[] __initdata = {
617 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900618 .irq = S3C_EINT(0),
619 .platform_data = &glenfarclas_pmic_pdata },
620
Mark Brownd0f0b432011-08-19 22:40:07 +0900621 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
622 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
623 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
624
Mark Brownae24c262011-06-22 13:08:13 +0900625 { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
Mark Browne1a3c742011-05-06 09:45:13 +0900626};
627
628static void __init crag6410_map_io(void)
629{
630 s3c64xx_init_io(NULL, 0);
631 s3c24xx_init_clocks(12000000);
632 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
633
634 /* LCD type and Bypass set by bootloader */
635}
636
637static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
638 .max_width = 4,
639 .cd_type = S3C_SDHCI_CD_PERMANENT,
640};
641
642static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
643 .max_width = 4,
644 .cd_type = S3C_SDHCI_CD_GPIO,
645 .ext_cd_gpio = S3C64XX_GPF(11),
646};
647
648static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
649{
650 /* Set all the necessary GPG pins to special-function 2 */
651 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
652
653 /* force card-detected for prototype 0 */
654 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
655}
656
657static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
658 .max_width = 4,
659 .cd_type = S3C_SDHCI_CD_INTERNAL,
660 .cfg_gpio = crag6410_cfg_sdhci0,
661};
662
663static void __init crag6410_machine_init(void)
664{
665 /* Open drain IRQs need pullups */
666 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
667 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
668
669 gpio_request(S3C64XX_GPB(0), "LCD power");
670 gpio_direction_output(S3C64XX_GPB(0), 0);
671
672 gpio_request(S3C64XX_GPF(14), "LCD PWM");
673 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
674
675 gpio_request(S3C64XX_GPB(1), "SD power");
676 gpio_direction_output(S3C64XX_GPB(1), 0);
677
678 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
679 gpio_direction_output(S3C64XX_GPF(10), 1);
680
681 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
682 s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
683 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
684
685 s3c_i2c0_set_platdata(&i2c0_pdata);
686 s3c_i2c1_set_platdata(NULL);
687 s3c_fb_set_platdata(&crag6410_lcd_pdata);
688
689 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
690 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
691
692 samsung_keypad_set_platdata(&crag6410_keypad_data);
693
694 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
695
Mark Brownae24c262011-06-22 13:08:13 +0900696 regulator_has_full_constraints();
697
Mark Browne1a3c742011-05-06 09:45:13 +0900698 s3c_pm_init();
699}
700
701MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
702 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
703 .boot_params = S3C64XX_PA_SDRAM + 0x100,
704 .init_irq = s3c6410_init_irq,
705 .map_io = crag6410_map_io,
706 .init_machine = crag6410_machine_init,
707 .timer = &s3c24xx_timer,
708MACHINE_END