| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * IRQ subsystem internal functions and variables: | 
| Thomas Gleixner | dbec07b | 2011-02-07 20:19:55 +0100 | [diff] [blame] | 3 |  * | 
 | 4 |  * Do not ever include this file from anything else than | 
 | 5 |  * kernel/irq/. Do not even think about using any information outside | 
 | 6 |  * of this file for your non core code. | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 |  */ | 
| Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 8 | #include <linux/irqdesc.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 |  | 
| Thomas Gleixner | c1ee626 | 2011-02-17 17:45:15 +0100 | [diff] [blame] | 10 | #ifdef CONFIG_SPARSE_IRQ | 
 | 11 | # define IRQ_BITMAP_BITS	(NR_IRQS + 8196) | 
 | 12 | #else | 
 | 13 | # define IRQ_BITMAP_BITS	NR_IRQS | 
 | 14 | #endif | 
 | 15 |  | 
| Thomas Gleixner | dbec07b | 2011-02-07 20:19:55 +0100 | [diff] [blame] | 16 | #define istate core_internal_state__do_not_mess_with_it | 
 | 17 |  | 
| Rusty Russell | 2329abf | 2012-01-13 09:32:18 +1030 | [diff] [blame] | 18 | extern bool noirqdebug; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 |  | 
| Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 20 | /* | 
 | 21 |  * Bits used by threaded handlers: | 
 | 22 |  * IRQTF_RUNTHREAD - signals that the interrupt handler thread should run | 
| Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 23 |  * IRQTF_WARNED    - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed | 
 | 24 |  * IRQTF_AFFINITY  - irq thread is requested to adjust affinity | 
| Thomas Gleixner | 8d32a30 | 2011-02-23 23:52:23 +0000 | [diff] [blame] | 25 |  * IRQTF_FORCED_THREAD  - irq action is force threaded | 
| Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 26 |  */ | 
 | 27 | enum { | 
 | 28 | 	IRQTF_RUNTHREAD, | 
| Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 29 | 	IRQTF_WARNED, | 
 | 30 | 	IRQTF_AFFINITY, | 
| Thomas Gleixner | 8d32a30 | 2011-02-23 23:52:23 +0000 | [diff] [blame] | 31 | 	IRQTF_FORCED_THREAD, | 
| Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 32 | }; | 
 | 33 |  | 
| Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 34 | /* | 
 | 35 |  * Bit masks for desc->state | 
 | 36 |  * | 
 | 37 |  * IRQS_AUTODETECT		- autodetection in progress | 
| Thomas Gleixner | 7acdd53 | 2011-02-07 20:40:54 +0100 | [diff] [blame] | 38 |  * IRQS_SPURIOUS_DISABLED	- was disabled due to spurious interrupt | 
 | 39 |  *				  detection | 
| Thomas Gleixner | 6954b75 | 2011-02-07 20:55:35 +0100 | [diff] [blame] | 40 |  * IRQS_POLL_INPROGRESS		- polling in progress | 
| Thomas Gleixner | 3d67bae | 2011-02-07 21:02:10 +0100 | [diff] [blame] | 41 |  * IRQS_ONESHOT			- irq is not unmasked in primary handler | 
| Thomas Gleixner | 163ef30 | 2011-02-08 11:39:15 +0100 | [diff] [blame] | 42 |  * IRQS_REPLAY			- irq is replayed | 
 | 43 |  * IRQS_WAITING			- irq is waiting | 
| Thomas Gleixner | 2a0d6fb | 2011-02-08 12:17:57 +0100 | [diff] [blame] | 44 |  * IRQS_PENDING			- irq is pending and replayed later | 
| Thomas Gleixner | c531e83 | 2011-02-08 12:44:58 +0100 | [diff] [blame] | 45 |  * IRQS_SUSPENDED		- irq is suspended | 
| Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 46 |  */ | 
 | 47 | enum { | 
 | 48 | 	IRQS_AUTODETECT		= 0x00000001, | 
| Thomas Gleixner | 7acdd53 | 2011-02-07 20:40:54 +0100 | [diff] [blame] | 49 | 	IRQS_SPURIOUS_DISABLED	= 0x00000002, | 
| Thomas Gleixner | 6954b75 | 2011-02-07 20:55:35 +0100 | [diff] [blame] | 50 | 	IRQS_POLL_INPROGRESS	= 0x00000008, | 
| Thomas Gleixner | 3d67bae | 2011-02-07 21:02:10 +0100 | [diff] [blame] | 51 | 	IRQS_ONESHOT		= 0x00000020, | 
| Thomas Gleixner | 163ef30 | 2011-02-08 11:39:15 +0100 | [diff] [blame] | 52 | 	IRQS_REPLAY		= 0x00000040, | 
 | 53 | 	IRQS_WAITING		= 0x00000080, | 
| Thomas Gleixner | 2a0d6fb | 2011-02-08 12:17:57 +0100 | [diff] [blame] | 54 | 	IRQS_PENDING		= 0x00000200, | 
| Thomas Gleixner | c531e83 | 2011-02-08 12:44:58 +0100 | [diff] [blame] | 55 | 	IRQS_SUSPENDED		= 0x00000800, | 
| Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 56 | }; | 
 | 57 |  | 
| Thomas Gleixner | 1ce6068 | 2011-02-09 20:44:21 +0100 | [diff] [blame] | 58 | #include "debug.h" | 
 | 59 | #include "settings.h" | 
 | 60 |  | 
| Thomas Gleixner | a77c463 | 2010-10-01 14:44:58 +0200 | [diff] [blame] | 61 | #define irq_data_to_desc(data)	container_of(data, struct irq_desc, irq_data) | 
 | 62 |  | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 63 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, | 
 | 64 | 		unsigned long flags); | 
| Rafael J. Wysocki | 0a0c516 | 2009-03-16 22:33:49 +0100 | [diff] [blame] | 65 | extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp); | 
 | 66 | extern void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume); | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 67 |  | 
| Thomas Gleixner | b4bc724 | 2012-02-08 11:57:52 +0100 | [diff] [blame] | 68 | extern int irq_startup(struct irq_desc *desc, bool resend); | 
| Thomas Gleixner | 4699923 | 2011-02-02 21:41:14 +0000 | [diff] [blame] | 69 | extern void irq_shutdown(struct irq_desc *desc); | 
| Thomas Gleixner | 8792347 | 2011-02-03 12:27:44 +0100 | [diff] [blame] | 70 | extern void irq_enable(struct irq_desc *desc); | 
 | 71 | extern void irq_disable(struct irq_desc *desc); | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 72 | extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); | 
 | 73 | extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); | 
| Thomas Gleixner | d4d5e08 | 2011-02-10 13:16:14 +0100 | [diff] [blame] | 74 | extern void mask_irq(struct irq_desc *desc); | 
 | 75 | extern void unmask_irq(struct irq_desc *desc); | 
| Thomas Gleixner | 4699923 | 2011-02-02 21:41:14 +0000 | [diff] [blame] | 76 |  | 
| Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 77 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); | 
| Mike Travis | 0fa0ebb | 2009-01-10 22:24:06 -0800 | [diff] [blame] | 78 |  | 
| Thomas Gleixner | 4912609 | 2011-02-07 01:08:49 +0100 | [diff] [blame] | 79 | irqreturn_t handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action); | 
 | 80 | irqreturn_t handle_irq_event(struct irq_desc *desc); | 
 | 81 |  | 
| Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 82 | /* Resending of interrupts :*/ | 
 | 83 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | 
| Thomas Gleixner | fe200ae | 2011-02-07 10:34:30 +0100 | [diff] [blame] | 84 | bool irq_wait_for_poll(struct irq_desc *desc); | 
| Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 85 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | #ifdef CONFIG_PROC_FS | 
| Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 87 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); | 
| Thomas Gleixner | 13bfe99 | 2010-09-30 02:46:07 +0200 | [diff] [blame] | 88 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); | 
 | 90 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); | 
 | 91 | #else | 
| Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 92 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } | 
| Thomas Gleixner | 13bfe99 | 2010-09-30 02:46:07 +0200 | [diff] [blame] | 93 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | static inline void register_handler_proc(unsigned int irq, | 
 | 95 | 					 struct irqaction *action) { } | 
 | 96 | static inline void unregister_handler_proc(unsigned int irq, | 
 | 97 | 					   struct irqaction *action) { } | 
 | 98 | #endif | 
 | 99 |  | 
| Thomas Gleixner | 3b8249e | 2011-02-07 16:02:20 +0100 | [diff] [blame] | 100 | extern int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask); | 
| Thomas Gleixner | f6d87f4 | 2008-11-07 13:18:30 +0100 | [diff] [blame] | 101 |  | 
| Thomas Gleixner | 591d2fb | 2009-07-21 11:09:39 +0200 | [diff] [blame] | 102 | extern void irq_set_thread_affinity(struct irq_desc *desc); | 
| Yinghai Lu | 57b150c | 2009-04-27 17:59:53 -0700 | [diff] [blame] | 103 |  | 
| Jiang Liu | 818b0f3 | 2012-03-30 23:11:34 +0800 | [diff] [blame] | 104 | extern int irq_do_set_affinity(struct irq_data *data, | 
 | 105 | 			       const struct cpumask *dest, bool force); | 
 | 106 |  | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 107 | /* Inline functions for support of irq chips on slow busses */ | 
| Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 108 | static inline void chip_bus_lock(struct irq_desc *desc) | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 109 | { | 
| Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 110 | 	if (unlikely(desc->irq_data.chip->irq_bus_lock)) | 
 | 111 | 		desc->irq_data.chip->irq_bus_lock(&desc->irq_data); | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 112 | } | 
 | 113 |  | 
| Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 114 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 115 | { | 
| Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 116 | 	if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) | 
 | 117 | 		desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 118 | } | 
 | 119 |  | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 120 | #define _IRQ_DESC_CHECK		(1 << 0) | 
 | 121 | #define _IRQ_DESC_PERCPU	(1 << 1) | 
 | 122 |  | 
 | 123 | #define IRQ_GET_DESC_CHECK_GLOBAL	(_IRQ_DESC_CHECK) | 
 | 124 | #define IRQ_GET_DESC_CHECK_PERCPU	(_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU) | 
 | 125 |  | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 126 | struct irq_desc * | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 127 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, | 
 | 128 | 		    unsigned int check); | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 129 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); | 
 | 130 |  | 
 | 131 | static inline struct irq_desc * | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 132 | irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check) | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 133 | { | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 134 | 	return __irq_get_desc_lock(irq, flags, true, check); | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 135 | } | 
 | 136 |  | 
 | 137 | static inline void | 
 | 138 | irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) | 
 | 139 | { | 
 | 140 | 	__irq_put_desc_unlock(desc, flags, true); | 
 | 141 | } | 
 | 142 |  | 
 | 143 | static inline struct irq_desc * | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 144 | irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check) | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 145 | { | 
| Marc Zyngier | 31d9d9b | 2011-09-23 17:03:06 +0100 | [diff] [blame] | 146 | 	return __irq_get_desc_lock(irq, flags, false, check); | 
| Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame] | 147 | } | 
 | 148 |  | 
 | 149 | static inline void | 
 | 150 | irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) | 
 | 151 | { | 
 | 152 | 	__irq_put_desc_unlock(desc, flags, false); | 
 | 153 | } | 
 | 154 |  | 
| Ingo Molnar | 43f7775 | 2006-06-29 02:24:58 -0700 | [diff] [blame] | 155 | /* | 
| Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 156 |  * Manipulation functions for irq_data.state | 
 | 157 |  */ | 
 | 158 | static inline void irqd_set_move_pending(struct irq_data *d) | 
 | 159 | { | 
 | 160 | 	d->state_use_accessors |= IRQD_SETAFFINITY_PENDING; | 
| Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 161 | } | 
 | 162 |  | 
 | 163 | static inline void irqd_clr_move_pending(struct irq_data *d) | 
 | 164 | { | 
 | 165 | 	d->state_use_accessors &= ~IRQD_SETAFFINITY_PENDING; | 
| Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 166 | } | 
| Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame] | 167 |  | 
 | 168 | static inline void irqd_clear(struct irq_data *d, unsigned int mask) | 
 | 169 | { | 
 | 170 | 	d->state_use_accessors &= ~mask; | 
 | 171 | } | 
 | 172 |  | 
 | 173 | static inline void irqd_set(struct irq_data *d, unsigned int mask) | 
 | 174 | { | 
 | 175 | 	d->state_use_accessors |= mask; | 
 | 176 | } | 
 | 177 |  | 
| Thomas Gleixner | 2bdd105 | 2011-02-08 17:22:00 +0100 | [diff] [blame] | 178 | static inline bool irqd_has_set(struct irq_data *d, unsigned int mask) | 
 | 179 | { | 
 | 180 | 	return d->state_use_accessors & mask; | 
 | 181 | } |