| Peter De Schrijver | c76fcc8 | 2012-01-26 18:22:02 +0200 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-tegra/sleep.S |
| 3 | * |
| 4 | * Copyright (c) 2010-2011, NVIDIA Corporation. |
| 5 | * Copyright (c) 2011, Google, Inc. |
| 6 | * |
| 7 | * Author: Colin Cross <ccross@android.com> |
| 8 | * Gary King <gking@nvidia.com> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 18 | * more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License along |
| 21 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 22 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 23 | */ |
| 24 | |
| 25 | #include <linux/linkage.h> |
| Stephen Warren | 7175f80 | 2012-03-19 09:55:12 -0600 | [diff] [blame] | 26 | |
| 27 | #include <asm/assembler.h> |
| Joseph Lo | d457ef35 | 2012-10-31 17:41:17 +0800 | [diff] [blame^] | 28 | #include <asm/cp15.h> |
| Stephen Warren | 7175f80 | 2012-03-19 09:55:12 -0600 | [diff] [blame] | 29 | |
| Stephen Warren | 2be39c0 | 2012-10-04 14:24:09 -0600 | [diff] [blame] | 30 | #include "iomap.h" |
| Peter De Schrijver | c76fcc8 | 2012-01-26 18:22:02 +0200 | [diff] [blame] | 31 | |
| 32 | #include "flowctrl.h" |
| Joseph Lo | c2be5bf | 2012-08-16 17:31:50 +0800 | [diff] [blame] | 33 | #include "sleep.h" |
| Peter De Schrijver | c76fcc8 | 2012-01-26 18:22:02 +0200 | [diff] [blame] | 34 | |
| Joseph Lo | d457ef35 | 2012-10-31 17:41:17 +0800 | [diff] [blame^] | 35 | #ifdef CONFIG_PM_SLEEP |
| 36 | /* |
| 37 | * tegra_disable_clean_inv_dcache |
| 38 | * |
| 39 | * disable, clean & invalidate the D-cache |
| 40 | * |
| 41 | * Corrupted registers: r1-r3, r6, r8, r9-r11 |
| 42 | */ |
| 43 | ENTRY(tegra_disable_clean_inv_dcache) |
| 44 | stmfd sp!, {r0, r4-r5, r7, r9-r11, lr} |
| 45 | dmb @ ensure ordering |
| 46 | |
| 47 | /* Disable the D-cache */ |
| 48 | mrc p15, 0, r2, c1, c0, 0 |
| 49 | bic r2, r2, #CR_C |
| 50 | mcr p15, 0, r2, c1, c0, 0 |
| 51 | isb |
| 52 | |
| 53 | /* Flush the D-cache */ |
| 54 | bl v7_flush_dcache_louis |
| 55 | |
| 56 | /* Trun off coherency */ |
| 57 | exit_smp r4, r5 |
| 58 | |
| 59 | ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc} |
| 60 | ENDPROC(tegra_disable_clean_inv_dcache) |
| 61 | |
| 62 | #endif |