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Anton Vorontsov34bcda62009-02-05 22:04:47 +03001* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3The Enhanced Secure Digital Host Controller provides an interface
4for MMC, SD, and SDIO types of memory cards.
5
6Required properties:
7 - compatible : should be
Kumar Gala40461472009-05-08 08:47:45 -05008 "fsl,<chip>-esdhc", "fsl,esdhc"
Anton Vorontsov34bcda62009-02-05 22:04:47 +03009 - reg : should contain eSDHC registers location and length.
10 - interrupts : should contain eSDHC interrupt.
11 - interrupt-parent : interrupt source phandle.
12 - clock-frequency : specifies eSDHC base clock frequency.
Anton Vorontsov50dfe702009-09-22 16:45:14 -070013 - sdhci,wp-inverted : (optional) specifies that eSDHC controller
14 reports inverted write-protect state;
Anton Vorontsov5fe23c72009-06-18 00:14:08 +040015 - sdhci,1-bit-only : (optional) specifies that a controller can
16 only handle 1-bit data transfers.
Anton Vorontsov34bcda62009-02-05 22:04:47 +030017
18Example:
19
20sdhci@2e000 {
Kumar Gala40461472009-05-08 08:47:45 -050021 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
Anton Vorontsov34bcda62009-02-05 22:04:47 +030022 reg = <0x2e000 0x1000>;
23 interrupts = <42 0x8>;
24 interrupt-parent = <&ipic>;
25 /* Filled in by U-Boot */
26 clock-frequency = <0>;
27};