Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * IRQ subsystem internal functions and variables: |
Thomas Gleixner | dbec07b | 2011-02-07 20:19:55 +0100 | [diff] [blame] | 3 | * |
| 4 | * Do not ever include this file from anything else than |
| 5 | * kernel/irq/. Do not even think about using any information outside |
| 6 | * of this file for your non core code. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | */ |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 8 | #include <linux/irqdesc.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | |
Thomas Gleixner | c1ee626 | 2011-02-17 17:45:15 +0100 | [diff] [blame] | 10 | #ifdef CONFIG_SPARSE_IRQ |
| 11 | # define IRQ_BITMAP_BITS (NR_IRQS + 8196) |
| 12 | #else |
| 13 | # define IRQ_BITMAP_BITS NR_IRQS |
| 14 | #endif |
| 15 | |
Thomas Gleixner | dbec07b | 2011-02-07 20:19:55 +0100 | [diff] [blame] | 16 | #define istate core_internal_state__do_not_mess_with_it |
| 17 | |
Thomas Gleixner | a6967ca | 2011-02-10 22:01:25 +0100 | [diff] [blame] | 18 | #ifdef CONFIG_GENERIC_HARDIRQS_NO_COMPAT |
| 19 | # define status status_use_accessors |
| 20 | #endif |
| 21 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | extern int noirqdebug; |
| 23 | |
Thomas Gleixner | 1535dfa | 2011-02-07 01:55:43 +0100 | [diff] [blame] | 24 | /* |
| 25 | * Bits used by threaded handlers: |
| 26 | * IRQTF_RUNTHREAD - signals that the interrupt handler thread should run |
| 27 | * IRQTF_DIED - handler thread died |
| 28 | * IRQTF_WARNED - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed |
| 29 | * IRQTF_AFFINITY - irq thread is requested to adjust affinity |
| 30 | */ |
| 31 | enum { |
| 32 | IRQTF_RUNTHREAD, |
| 33 | IRQTF_DIED, |
| 34 | IRQTF_WARNED, |
| 35 | IRQTF_AFFINITY, |
| 36 | }; |
| 37 | |
Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 38 | /* |
| 39 | * Bit masks for desc->state |
| 40 | * |
| 41 | * IRQS_AUTODETECT - autodetection in progress |
Thomas Gleixner | 7acdd53 | 2011-02-07 20:40:54 +0100 | [diff] [blame] | 42 | * IRQS_SPURIOUS_DISABLED - was disabled due to spurious interrupt |
| 43 | * detection |
Thomas Gleixner | 6954b75 | 2011-02-07 20:55:35 +0100 | [diff] [blame] | 44 | * IRQS_POLL_INPROGRESS - polling in progress |
Thomas Gleixner | 009b4c3 | 2011-02-07 21:48:49 +0100 | [diff] [blame] | 45 | * IRQS_INPROGRESS - Interrupt in progress |
Thomas Gleixner | 3d67bae | 2011-02-07 21:02:10 +0100 | [diff] [blame] | 46 | * IRQS_ONESHOT - irq is not unmasked in primary handler |
Thomas Gleixner | 163ef30 | 2011-02-08 11:39:15 +0100 | [diff] [blame] | 47 | * IRQS_REPLAY - irq is replayed |
| 48 | * IRQS_WAITING - irq is waiting |
Thomas Gleixner | c1594b7 | 2011-02-07 22:11:30 +0100 | [diff] [blame] | 49 | * IRQS_DISABLED - irq is disabled |
Thomas Gleixner | 2a0d6fb | 2011-02-08 12:17:57 +0100 | [diff] [blame] | 50 | * IRQS_PENDING - irq is pending and replayed later |
Thomas Gleixner | 6e40262 | 2011-02-08 12:36:06 +0100 | [diff] [blame] | 51 | * IRQS_MASKED - irq is masked |
Thomas Gleixner | c531e83 | 2011-02-08 12:44:58 +0100 | [diff] [blame] | 52 | * IRQS_SUSPENDED - irq is suspended |
Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 53 | */ |
| 54 | enum { |
| 55 | IRQS_AUTODETECT = 0x00000001, |
Thomas Gleixner | 7acdd53 | 2011-02-07 20:40:54 +0100 | [diff] [blame] | 56 | IRQS_SPURIOUS_DISABLED = 0x00000002, |
Thomas Gleixner | 6954b75 | 2011-02-07 20:55:35 +0100 | [diff] [blame] | 57 | IRQS_POLL_INPROGRESS = 0x00000008, |
Thomas Gleixner | 009b4c3 | 2011-02-07 21:48:49 +0100 | [diff] [blame] | 58 | IRQS_INPROGRESS = 0x00000010, |
Thomas Gleixner | 3d67bae | 2011-02-07 21:02:10 +0100 | [diff] [blame] | 59 | IRQS_ONESHOT = 0x00000020, |
Thomas Gleixner | 163ef30 | 2011-02-08 11:39:15 +0100 | [diff] [blame] | 60 | IRQS_REPLAY = 0x00000040, |
| 61 | IRQS_WAITING = 0x00000080, |
Thomas Gleixner | c1594b7 | 2011-02-07 22:11:30 +0100 | [diff] [blame] | 62 | IRQS_DISABLED = 0x00000100, |
Thomas Gleixner | 2a0d6fb | 2011-02-08 12:17:57 +0100 | [diff] [blame] | 63 | IRQS_PENDING = 0x00000200, |
Thomas Gleixner | 6e40262 | 2011-02-08 12:36:06 +0100 | [diff] [blame] | 64 | IRQS_MASKED = 0x00000400, |
Thomas Gleixner | c531e83 | 2011-02-08 12:44:58 +0100 | [diff] [blame] | 65 | IRQS_SUSPENDED = 0x00000800, |
Thomas Gleixner | bd062e7 | 2011-02-07 20:25:25 +0100 | [diff] [blame] | 66 | }; |
| 67 | |
Thomas Gleixner | 1ce6068 | 2011-02-09 20:44:21 +0100 | [diff] [blame] | 68 | #include "compat.h" |
| 69 | #include "debug.h" |
| 70 | #include "settings.h" |
| 71 | |
Thomas Gleixner | a77c463 | 2010-10-01 14:44:58 +0200 | [diff] [blame] | 72 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) |
| 73 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 74 | /* Set default functions for irq_chip structures: */ |
| 75 | extern void irq_chip_set_defaults(struct irq_chip *chip); |
| 76 | |
David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 77 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
| 78 | unsigned long flags); |
Rafael J. Wysocki | 0a0c516 | 2009-03-16 22:33:49 +0100 | [diff] [blame] | 79 | extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp); |
| 80 | extern void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume); |
David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 81 | |
Thomas Gleixner | 4699923 | 2011-02-02 21:41:14 +0000 | [diff] [blame] | 82 | extern int irq_startup(struct irq_desc *desc); |
| 83 | extern void irq_shutdown(struct irq_desc *desc); |
Thomas Gleixner | 8792347 | 2011-02-03 12:27:44 +0100 | [diff] [blame] | 84 | extern void irq_enable(struct irq_desc *desc); |
| 85 | extern void irq_disable(struct irq_desc *desc); |
Thomas Gleixner | d4d5e08 | 2011-02-10 13:16:14 +0100 | [diff] [blame] | 86 | extern void mask_irq(struct irq_desc *desc); |
| 87 | extern void unmask_irq(struct irq_desc *desc); |
Thomas Gleixner | 4699923 | 2011-02-02 21:41:14 +0000 | [diff] [blame] | 88 | |
Yinghai Lu | 85ac16d | 2009-04-27 18:00:38 -0700 | [diff] [blame] | 89 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); |
Mike Travis | 0fa0ebb | 2009-01-10 22:24:06 -0800 | [diff] [blame] | 90 | |
Thomas Gleixner | 4912609 | 2011-02-07 01:08:49 +0100 | [diff] [blame] | 91 | irqreturn_t handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action); |
| 92 | irqreturn_t handle_irq_event(struct irq_desc *desc); |
| 93 | |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 94 | /* Resending of interrupts :*/ |
| 95 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); |
Thomas Gleixner | fe200ae | 2011-02-07 10:34:30 +0100 | [diff] [blame] | 96 | bool irq_wait_for_poll(struct irq_desc *desc); |
Thomas Gleixner | e144710 | 2010-10-01 16:03:45 +0200 | [diff] [blame] | 97 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | #ifdef CONFIG_PROC_FS |
Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 99 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); |
Thomas Gleixner | 13bfe99 | 2010-09-30 02:46:07 +0200 | [diff] [blame] | 100 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); |
| 102 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); |
| 103 | #else |
Yinghai Lu | 2c6927a | 2008-08-19 20:50:11 -0700 | [diff] [blame] | 104 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
Thomas Gleixner | 13bfe99 | 2010-09-30 02:46:07 +0200 | [diff] [blame] | 105 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | static inline void register_handler_proc(unsigned int irq, |
| 107 | struct irqaction *action) { } |
| 108 | static inline void unregister_handler_proc(unsigned int irq, |
| 109 | struct irqaction *action) { } |
| 110 | #endif |
| 111 | |
Thomas Gleixner | 3b8249e | 2011-02-07 16:02:20 +0100 | [diff] [blame] | 112 | extern int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask); |
Thomas Gleixner | f6d87f4 | 2008-11-07 13:18:30 +0100 | [diff] [blame] | 113 | |
Thomas Gleixner | 591d2fb | 2009-07-21 11:09:39 +0200 | [diff] [blame] | 114 | extern void irq_set_thread_affinity(struct irq_desc *desc); |
Yinghai Lu | 57b150c | 2009-04-27 17:59:53 -0700 | [diff] [blame] | 115 | |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 116 | /* Inline functions for support of irq chips on slow busses */ |
Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 117 | static inline void chip_bus_lock(struct irq_desc *desc) |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 118 | { |
Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 119 | if (unlikely(desc->irq_data.chip->irq_bus_lock)) |
| 120 | desc->irq_data.chip->irq_bus_lock(&desc->irq_data); |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 121 | } |
| 122 | |
Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 123 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 124 | { |
Thomas Gleixner | 3876ec9 | 2010-09-27 12:44:35 +0000 | [diff] [blame] | 125 | if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) |
| 126 | desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); |
Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 127 | } |
| 128 | |
Thomas Gleixner | d5eb4ad | 2011-02-12 12:16:16 +0100 | [diff] [blame^] | 129 | struct irq_desc * |
| 130 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus); |
| 131 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); |
| 132 | |
| 133 | static inline struct irq_desc * |
| 134 | irq_get_desc_buslock(unsigned int irq, unsigned long *flags) |
| 135 | { |
| 136 | return __irq_get_desc_lock(irq, flags, true); |
| 137 | } |
| 138 | |
| 139 | static inline void |
| 140 | irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) |
| 141 | { |
| 142 | __irq_put_desc_unlock(desc, flags, true); |
| 143 | } |
| 144 | |
| 145 | static inline struct irq_desc * |
| 146 | irq_get_desc_lock(unsigned int irq, unsigned long *flags) |
| 147 | { |
| 148 | return __irq_get_desc_lock(irq, flags, false); |
| 149 | } |
| 150 | |
| 151 | static inline void |
| 152 | irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) |
| 153 | { |
| 154 | __irq_put_desc_unlock(desc, flags, false); |
| 155 | } |
| 156 | |
Ingo Molnar | 43f7775 | 2006-06-29 02:24:58 -0700 | [diff] [blame] | 157 | /* |
Thomas Gleixner | f230b6d | 2011-02-05 15:20:04 +0100 | [diff] [blame] | 158 | * Manipulation functions for irq_data.state |
| 159 | */ |
| 160 | static inline void irqd_set_move_pending(struct irq_data *d) |
| 161 | { |
| 162 | d->state_use_accessors |= IRQD_SETAFFINITY_PENDING; |
| 163 | irq_compat_set_move_pending(irq_data_to_desc(d)); |
| 164 | } |
| 165 | |
| 166 | static inline void irqd_clr_move_pending(struct irq_data *d) |
| 167 | { |
| 168 | d->state_use_accessors &= ~IRQD_SETAFFINITY_PENDING; |
| 169 | irq_compat_clr_move_pending(irq_data_to_desc(d)); |
| 170 | } |
Thomas Gleixner | a005677 | 2011-02-08 17:11:03 +0100 | [diff] [blame] | 171 | |
| 172 | static inline void irqd_clear(struct irq_data *d, unsigned int mask) |
| 173 | { |
| 174 | d->state_use_accessors &= ~mask; |
| 175 | } |
| 176 | |
| 177 | static inline void irqd_set(struct irq_data *d, unsigned int mask) |
| 178 | { |
| 179 | d->state_use_accessors |= mask; |
| 180 | } |
| 181 | |
Thomas Gleixner | 2bdd105 | 2011-02-08 17:22:00 +0100 | [diff] [blame] | 182 | static inline bool irqd_has_set(struct irq_data *d, unsigned int mask) |
| 183 | { |
| 184 | return d->state_use_accessors & mask; |
| 185 | } |