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Catalin Marinas9703d9d2012-03-05 11:49:27 +00001/*
2 * Based on arch/arm/kernel/setup.c
3 *
4 * Copyright (C) 1995-2001 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/export.h>
21#include <linux/kernel.h>
22#include <linux/stddef.h>
23#include <linux/ioport.h>
24#include <linux/delay.h>
25#include <linux/utsname.h>
26#include <linux/initrd.h>
27#include <linux/console.h>
28#include <linux/bootmem.h>
29#include <linux/seq_file.h>
30#include <linux/screen_info.h>
31#include <linux/init.h>
32#include <linux/kexec.h>
33#include <linux/crash_dump.h>
34#include <linux/root_dev.h>
35#include <linux/cpu.h>
36#include <linux/interrupt.h>
37#include <linux/smp.h>
38#include <linux/fs.h>
39#include <linux/proc_fs.h>
40#include <linux/memblock.h>
41#include <linux/of_fdt.h>
Catalin Marinasd6bafb92012-12-07 17:47:17 +000042#include <linux/of_platform.h>
Catalin Marinas9703d9d2012-03-05 11:49:27 +000043
44#include <asm/cputype.h>
45#include <asm/elf.h>
46#include <asm/cputable.h>
47#include <asm/sections.h>
48#include <asm/setup.h>
49#include <asm/cacheflush.h>
50#include <asm/tlbflush.h>
51#include <asm/traps.h>
52#include <asm/memblock.h>
53
54unsigned int processor_id;
55EXPORT_SYMBOL(processor_id);
56
57unsigned int elf_hwcap __read_mostly;
58EXPORT_SYMBOL_GPL(elf_hwcap);
59
60static const char *cpu_name;
61static const char *machine_name;
62phys_addr_t __fdt_pointer __initdata;
63
64/*
65 * Standard memory resources
66 */
67static struct resource mem_res[] = {
68 {
69 .name = "Kernel code",
70 .start = 0,
71 .end = 0,
72 .flags = IORESOURCE_MEM
73 },
74 {
75 .name = "Kernel data",
76 .start = 0,
77 .end = 0,
78 .flags = IORESOURCE_MEM
79 }
80};
81
82#define kernel_code mem_res[0]
83#define kernel_data mem_res[1]
84
85void __init early_print(const char *str, ...)
86{
87 char buf[256];
88 va_list ap;
89
90 va_start(ap, str);
91 vsnprintf(buf, sizeof(buf), str, ap);
92 va_end(ap);
93
94 printk("%s", buf);
95}
96
97static void __init setup_processor(void)
98{
99 struct cpu_info *cpu_info;
100
101 /*
102 * locate processor in the list of supported processor
103 * types. The linker builds this table for us from the
104 * entries in arch/arm/mm/proc.S
105 */
106 cpu_info = lookup_processor_type(read_cpuid_id());
107 if (!cpu_info) {
108 printk("CPU configuration botched (ID %08x), unable to continue.\n",
109 read_cpuid_id());
110 while (1);
111 }
112
113 cpu_name = cpu_info->cpu_name;
114
115 printk("CPU: %s [%08x] revision %d\n",
116 cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
117
118 sprintf(init_utsname()->machine, "aarch64");
119 elf_hwcap = 0;
120}
121
122static void __init setup_machine_fdt(phys_addr_t dt_phys)
123{
124 struct boot_param_header *devtree;
125 unsigned long dt_root;
126
127 /* Check we have a non-NULL DT pointer */
128 if (!dt_phys) {
129 early_print("\n"
130 "Error: NULL or invalid device tree blob\n"
131 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
132 "\nPlease check your bootloader.\n");
133
134 while (true)
135 cpu_relax();
136
137 }
138
139 devtree = phys_to_virt(dt_phys);
140
141 /* Check device tree validity */
142 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
143 early_print("\n"
144 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
145 "Expected 0x%x, found 0x%x\n"
146 "\nPlease check your bootloader.\n",
147 dt_phys, devtree, OF_DT_HEADER,
148 be32_to_cpu(devtree->magic));
149
150 while (true)
151 cpu_relax();
152 }
153
154 initial_boot_params = devtree;
155 dt_root = of_get_flat_dt_root();
156
157 machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
158 if (!machine_name)
159 machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
160 if (!machine_name)
161 machine_name = "<unknown>";
162 pr_info("Machine: %s\n", machine_name);
163
164 /* Retrieve various information from the /chosen node */
165 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
166 /* Initialize {size,address}-cells info */
167 of_scan_flat_dt(early_init_dt_scan_root, NULL);
168 /* Setup memory, calling early_init_dt_add_memory_arch */
169 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
170}
171
172void __init early_init_dt_add_memory_arch(u64 base, u64 size)
173{
Catalin Marinasf71a1a42012-10-16 12:00:29 +0100174 base &= PAGE_MASK;
Catalin Marinas9703d9d2012-03-05 11:49:27 +0000175 size &= PAGE_MASK;
Catalin Marinasf71a1a42012-10-16 12:00:29 +0100176 if (base + size < PHYS_OFFSET) {
177 pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
178 base, base + size);
179 return;
180 }
181 if (base < PHYS_OFFSET) {
182 pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
183 base, PHYS_OFFSET);
184 size -= PHYS_OFFSET - base;
185 base = PHYS_OFFSET;
186 }
Catalin Marinas9703d9d2012-03-05 11:49:27 +0000187 memblock_add(base, size);
188}
189
190void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
191{
192 return __va(memblock_alloc(size, align));
193}
194
195/*
196 * Limit the memory size that was specified via FDT.
197 */
198static int __init early_mem(char *p)
199{
200 phys_addr_t limit;
201
202 if (!p)
203 return 1;
204
205 limit = memparse(p, &p) & PAGE_MASK;
206 pr_notice("Memory limited to %lldMB\n", limit >> 20);
207
208 memblock_enforce_memory_limit(limit);
209
210 return 0;
211}
212early_param("mem", early_mem);
213
214static void __init request_standard_resources(void)
215{
216 struct memblock_region *region;
217 struct resource *res;
218
219 kernel_code.start = virt_to_phys(_text);
220 kernel_code.end = virt_to_phys(_etext - 1);
221 kernel_data.start = virt_to_phys(_sdata);
222 kernel_data.end = virt_to_phys(_end - 1);
223
224 for_each_memblock(memory, region) {
225 res = alloc_bootmem_low(sizeof(*res));
226 res->name = "System RAM";
227 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
228 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
229 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
230
231 request_resource(&iomem_resource, res);
232
233 if (kernel_code.start >= res->start &&
234 kernel_code.end <= res->end)
235 request_resource(res, &kernel_code);
236 if (kernel_data.start >= res->start &&
237 kernel_data.end <= res->end)
238 request_resource(res, &kernel_data);
239 }
240}
241
242void __init setup_arch(char **cmdline_p)
243{
244 setup_processor();
245
246 setup_machine_fdt(__fdt_pointer);
247
248 init_mm.start_code = (unsigned long) _text;
249 init_mm.end_code = (unsigned long) _etext;
250 init_mm.end_data = (unsigned long) _edata;
251 init_mm.brk = (unsigned long) _end;
252
253 *cmdline_p = boot_command_line;
254
255 parse_early_param();
256
257 arm64_memblock_init();
258
259 paging_init();
260 request_standard_resources();
261
262 unflatten_device_tree();
263
264#ifdef CONFIG_SMP
265 smp_init_cpus();
266#endif
267
268#ifdef CONFIG_VT
269#if defined(CONFIG_VGA_CONSOLE)
270 conswitchp = &vga_con;
271#elif defined(CONFIG_DUMMY_CONSOLE)
272 conswitchp = &dummy_con;
273#endif
274#endif
275}
276
277static DEFINE_PER_CPU(struct cpu, cpu_data);
278
279static int __init topology_init(void)
280{
281 int i;
282
283 for_each_possible_cpu(i) {
284 struct cpu *cpu = &per_cpu(cpu_data, i);
285 cpu->hotpluggable = 1;
286 register_cpu(cpu, i);
287 }
288
289 return 0;
290}
291subsys_initcall(topology_init);
292
Catalin Marinasd6bafb92012-12-07 17:47:17 +0000293static int __init arm64_device_probe(void)
294{
295 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
296 return 0;
297}
298device_initcall(arm64_device_probe);
299
Catalin Marinas9703d9d2012-03-05 11:49:27 +0000300static const char *hwcap_str[] = {
301 "fp",
302 "asimd",
303 NULL
304};
305
306static int c_show(struct seq_file *m, void *v)
307{
308 int i;
309
310 seq_printf(m, "Processor\t: %s rev %d (%s)\n",
311 cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
312
313 for_each_online_cpu(i) {
314 /*
315 * glibc reads /proc/cpuinfo to determine the number of
316 * online processors, looking for lines beginning with
317 * "processor". Give glibc what it expects.
318 */
319#ifdef CONFIG_SMP
320 seq_printf(m, "processor\t: %d\n", i);
321#endif
322 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
323 loops_per_jiffy / (500000UL/HZ),
324 loops_per_jiffy / (5000UL/HZ) % 100);
325 }
326
327 /* dump out the processor features */
328 seq_puts(m, "Features\t: ");
329
330 for (i = 0; hwcap_str[i]; i++)
331 if (elf_hwcap & (1 << i))
332 seq_printf(m, "%s ", hwcap_str[i]);
333
334 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
335 seq_printf(m, "CPU architecture: AArch64\n");
336 seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
337 seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
338 seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
339
340 seq_puts(m, "\n");
341
342 seq_printf(m, "Hardware\t: %s\n", machine_name);
343
344 return 0;
345}
346
347static void *c_start(struct seq_file *m, loff_t *pos)
348{
349 return *pos < 1 ? (void *)1 : NULL;
350}
351
352static void *c_next(struct seq_file *m, void *v, loff_t *pos)
353{
354 ++*pos;
355 return NULL;
356}
357
358static void c_stop(struct seq_file *m, void *v)
359{
360}
361
362const struct seq_operations cpuinfo_op = {
363 .start = c_start,
364 .next = c_next,
365 .stop = c_stop,
366 .show = c_show
367};