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Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/pci.h>
Ben Hutchings7fc2a612011-04-25 16:54:28 +010024#include <linux/slab.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070025
26#include "xhci.h"
27
Sarah Sharpac9d8fe2009-08-07 14:04:55 -070028/* Device for a quirk */
29#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
31
Maarten Lankhorstc877b3b2011-06-15 23:47:21 +020032#define PCI_VENDOR_ID_ETRON 0x1b6f
33#define PCI_DEVICE_ID_ASROCK_P67 0x7023
34
Sarah Sharp66d4ead2009-04-27 19:52:28 -070035static const char hcd_name[] = "xhci_hcd";
36
37/* called after powerup, by probe or system-pm "wakeup" */
38static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
39{
40 /*
41 * TODO: Implement finding debug ports later.
42 * TODO: see if there are any quirks that need to be added to handle
43 * new extended capabilities.
44 */
45
46 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
47 if (!pci_set_mwi(pdev))
48 xhci_dbg(xhci, "MWI active\n");
49
50 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
51 return 0;
52}
53
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -070054typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *);
55
56static int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
Sarah Sharp66d4ead2009-04-27 19:52:28 -070057{
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -080058 struct xhci_hcd *xhci;
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -070059 struct device *dev = hcd->self.controller;
Sarah Sharp66d4ead2009-04-27 19:52:28 -070060 int retval;
Sarah Sharp006d5822010-07-29 22:13:22 -070061 u32 temp;
Sarah Sharp66d4ead2009-04-27 19:52:28 -070062
Sarah Sharpbc88d2e2010-05-18 16:05:21 -070063 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
David Vrabel4c1bd3d2009-08-24 14:44:30 +010064
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -080065 if (usb_hcd_is_primary_hcd(hcd)) {
66 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
67 if (!xhci)
68 return -ENOMEM;
69 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
70 xhci->main_hcd = hcd;
71 /* Mark the first roothub as being USB 2.0.
72 * The xHCI driver will register the USB 3.0 roothub.
73 */
74 hcd->speed = HCD_USB2;
75 hcd->self.root_hub->speed = USB_SPEED_HIGH;
76 /*
77 * USB 2.0 roothub under xHCI has an integrated TT,
78 * (rate matching hub) as opposed to having an OHCI/UHCI
79 * companion controller.
80 */
81 hcd->has_tt = 1;
82 } else {
83 /* xHCI private pointer was set in xhci_pci_probe for the second
84 * registered roothub.
85 */
86 xhci = hcd_to_xhci(hcd);
87 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
88 if (HCC_64BIT_ADDR(temp)) {
89 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
90 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
91 } else {
92 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
93 }
94 return 0;
95 }
Sarah Sharpb02d0ed2010-10-26 11:03:44 -070096
Sarah Sharp66d4ead2009-04-27 19:52:28 -070097 xhci->cap_regs = hcd->regs;
98 xhci->op_regs = hcd->regs +
99 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
100 xhci->run_regs = hcd->regs +
101 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
102 /* Cache read-only capability registers */
103 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
104 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
105 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
Sarah Sharpac1c1b72009-09-04 10:53:20 -0700106 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
107 xhci->hci_version = HC_VERSION(xhci->hcc_params);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700108 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
109 xhci_print_registers(xhci);
110
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -0700111 get_quirks(dev, xhci);
112
113 /* Make sure the HC is halted. */
114 retval = xhci_halt(xhci);
115 if (retval)
116 goto error;
117
118 xhci_dbg(xhci, "Resetting HCD\n");
119 /* Reset the internal HC memory state and registers. */
120 retval = xhci_reset(xhci);
121 if (retval)
122 goto error;
123 xhci_dbg(xhci, "Reset complete\n");
124
125 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
126 if (HCC_64BIT_ADDR(temp)) {
127 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
128 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
129 } else {
130 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
131 }
132
133 xhci_dbg(xhci, "Calling HCD init\n");
134 /* Initialize HCD and host controller data structures. */
135 retval = xhci_init(hcd);
136 if (retval)
137 goto error;
138 xhci_dbg(xhci, "Called HCD init\n");
139 return 0;
140error:
141 kfree(xhci);
142 return retval;
143}
144
145static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
146{
147 struct pci_dev *pdev = to_pci_dev(dev);
148
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700149 /* Look for vendor-specific quirks */
150 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
Sarah Sharpf5182b42011-06-02 11:33:02 -0700151 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
152 if (pdev->revision == 0x0) {
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700153 xhci->quirks |= XHCI_RESET_EP_QUIRK;
154 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
155 " endpoint cmd after reset endpoint\n");
Sarah Sharpf5182b42011-06-02 11:33:02 -0700156 }
157 /* Fresco Logic confirms: all revisions of this chip do not
158 * support MSI, even though some of them claim to in their PCI
159 * capabilities.
160 */
161 xhci->quirks |= XHCI_BROKEN_MSI;
162 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
163 "has broken MSI implementation\n",
164 pdev->revision);
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700165 }
Sarah Sharpf5182b42011-06-02 11:33:02 -0700166
Sarah Sharp02386342010-05-24 13:25:28 -0700167 if (pdev->vendor == PCI_VENDOR_ID_NEC)
168 xhci->quirks |= XHCI_NEC_HOST;
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700169
Andiry Xu7e393a82011-09-23 14:19:54 -0700170 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
171 xhci->quirks |= XHCI_AMD_0x96_HOST;
172
Andiry Xuc41136b2011-03-22 17:08:14 +0800173 /* AMD PLL quirk */
174 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
175 xhci->quirks |= XHCI_AMD_PLL_FIX;
Sarah Sharpad808332011-05-25 10:43:56 -0700176 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
177 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
178 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
Sarah Sharp2cf95c12011-05-11 16:14:58 -0700179 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
180 xhci->limit_active_eps = 64;
Sarah Sharp86cc5582011-09-02 11:05:54 -0700181 xhci->quirks |= XHCI_SW_BW_CHECKING;
Sarah Sharpad808332011-05-25 10:43:56 -0700182 }
Maarten Lankhorstc877b3b2011-06-15 23:47:21 +0200183 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
184 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
185 xhci->quirks |= XHCI_RESET_ON_RESUME;
186 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
187 }
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -0700188}
Andiry Xuc41136b2011-03-22 17:08:14 +0800189
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -0700190/* called during probe() after chip reset completes */
191static int xhci_pci_setup(struct usb_hcd *hcd)
192{
193 struct xhci_hcd *xhci;
194 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
195 int retval;
196
197 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700198 if (retval)
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -0700199 return retval;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700200
Sebastian Andrzej Siewiorda3c9c42011-09-23 14:20:00 -0700201 xhci = hcd_to_xhci(hcd);
202 if (!usb_hcd_is_primary_hcd(hcd))
203 return 0;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700204
205 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
206 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
207
208 /* Find any debug ports */
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700209 retval = xhci_pci_reinit(xhci, pdev);
210 if (!retval)
211 return retval;
212
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700213 kfree(xhci);
214 return retval;
215}
216
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800217/*
218 * We need to register our own PCI probe function (instead of the USB core's
219 * function) in order to create a second roothub under xHCI.
220 */
221static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
222{
223 int retval;
224 struct xhci_hcd *xhci;
225 struct hc_driver *driver;
226 struct usb_hcd *hcd;
227
228 driver = (struct hc_driver *)id->driver_data;
229 /* Register the USB 2.0 roothub.
230 * FIXME: USB core must know to register the USB 2.0 roothub first.
231 * This is sort of silly, because we could just set the HCD driver flags
232 * to say USB 2.0, but I'm not sure what the implications would be in
233 * the other parts of the HCD code.
234 */
235 retval = usb_hcd_pci_probe(dev, id);
236
237 if (retval)
238 return retval;
239
240 /* USB 2.0 roothub is stored in the PCI device now. */
241 hcd = dev_get_drvdata(&dev->dev);
242 xhci = hcd_to_xhci(hcd);
243 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
244 pci_name(dev), hcd);
245 if (!xhci->shared_hcd) {
246 retval = -ENOMEM;
247 goto dealloc_usb2_hcd;
248 }
249
250 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
251 * is called by usb_add_hcd().
252 */
253 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
254
255 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
Yong Zhangb5dd18d2011-09-07 16:10:52 +0800256 IRQF_SHARED);
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800257 if (retval)
258 goto put_usb3_hcd;
259 /* Roothub already marked as USB 3.0 speed */
260 return 0;
261
262put_usb3_hcd:
263 usb_put_hcd(xhci->shared_hcd);
264dealloc_usb2_hcd:
265 usb_hcd_pci_remove(dev);
266 return retval;
267}
268
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700269static void xhci_pci_remove(struct pci_dev *dev)
270{
271 struct xhci_hcd *xhci;
272
273 xhci = hcd_to_xhci(pci_get_drvdata(dev));
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800274 if (xhci->shared_hcd) {
275 usb_remove_hcd(xhci->shared_hcd);
276 usb_put_hcd(xhci->shared_hcd);
277 }
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700278 usb_hcd_pci_remove(dev);
279 kfree(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700280}
281
Andiry Xu5535b1d2010-10-14 07:23:06 -0700282#ifdef CONFIG_PM
283static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
284{
285 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
286 int retval = 0;
287
Sarah Sharpb3209372011-03-07 11:24:07 -0800288 if (hcd->state != HC_STATE_SUSPENDED ||
289 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
Andiry Xu5535b1d2010-10-14 07:23:06 -0700290 return -EINVAL;
291
292 retval = xhci_suspend(xhci);
293
294 return retval;
295}
296
297static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
298{
299 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp69e848c2011-02-22 09:57:15 -0800300 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
Andiry Xu5535b1d2010-10-14 07:23:06 -0700301 int retval = 0;
302
Sarah Sharp69e848c2011-02-22 09:57:15 -0800303 /* The BIOS on systems with the Intel Panther Point chipset may or may
304 * not support xHCI natively. That means that during system resume, it
305 * may switch the ports back to EHCI so that users can use their
306 * keyboard to select a kernel from GRUB after resume from hibernate.
307 *
308 * The BIOS is supposed to remember whether the OS had xHCI ports
309 * enabled before resume, and switch the ports back to xHCI when the
310 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
311 * writers.
312 *
313 * Unconditionally switch the ports back to xHCI after a system resume.
314 * We can't tell whether the EHCI or xHCI controller will be resumed
315 * first, so we have to do the port switchover in both drivers. Writing
316 * a '1' to the port switchover registers should have no effect if the
317 * port was already switched over.
318 */
319 if (usb_is_intel_switchable_xhci(pdev))
320 usb_enable_xhci_ports(pdev);
321
Andiry Xu5535b1d2010-10-14 07:23:06 -0700322 retval = xhci_resume(xhci, hibernated);
323 return retval;
324}
325#endif /* CONFIG_PM */
326
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700327static const struct hc_driver xhci_pci_hc_driver = {
328 .description = hcd_name,
329 .product_desc = "xHCI Host Controller",
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700330 .hcd_priv_size = sizeof(struct xhci_hcd *),
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700331
332 /*
333 * generic hardware linkage
334 */
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700335 .irq = xhci_irq,
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800336 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700337
338 /*
339 * basic lifecycle operations
340 */
341 .reset = xhci_pci_setup,
342 .start = xhci_run,
Andiry Xu5535b1d2010-10-14 07:23:06 -0700343#ifdef CONFIG_PM
344 .pci_suspend = xhci_pci_suspend,
345 .pci_resume = xhci_pci_resume,
346#endif
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700347 .stop = xhci_stop,
348 .shutdown = xhci_shutdown,
349
350 /*
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700351 * managing i/o requests and associated device resources
352 */
Sarah Sharpd0e96f52009-04-27 19:58:01 -0700353 .urb_enqueue = xhci_urb_enqueue,
354 .urb_dequeue = xhci_urb_dequeue,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700355 .alloc_dev = xhci_alloc_dev,
356 .free_dev = xhci_free_dev,
Sarah Sharpeab1caf2010-04-05 10:55:58 -0700357 .alloc_streams = xhci_alloc_streams,
358 .free_streams = xhci_free_streams,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700359 .add_endpoint = xhci_add_endpoint,
360 .drop_endpoint = xhci_drop_endpoint,
Sarah Sharpa1587d92009-07-27 12:03:15 -0700361 .endpoint_reset = xhci_endpoint_reset,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700362 .check_bandwidth = xhci_check_bandwidth,
363 .reset_bandwidth = xhci_reset_bandwidth,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700364 .address_device = xhci_address_device,
Sarah Sharpb356b7c2009-09-04 10:53:24 -0700365 .update_hub_device = xhci_update_hub_device,
Andiry Xuf0615c42010-10-14 07:22:48 -0700366 .reset_device = xhci_discover_or_reset_device,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700367
368 /*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700369 * scheduling support
370 */
371 .get_frame_number = xhci_get_frame,
372
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700373 /* Root hub support */
374 .hub_control = xhci_hub_control,
375 .hub_status_data = xhci_hub_status_data,
Andiry Xu9777e3c2010-10-14 07:23:03 -0700376 .bus_suspend = xhci_bus_suspend,
377 .bus_resume = xhci_bus_resume,
Andiry Xu95743232011-09-23 14:19:51 -0700378 /*
379 * call back when device connected and addressed
380 */
381 .update_device = xhci_update_device,
Andiry Xu65580b432011-09-23 14:19:52 -0700382 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700383};
384
385/*-------------------------------------------------------------------------*/
386
387/* PCI driver selection metadata; PCI hotplugging uses this */
388static const struct pci_device_id pci_ids[] = { {
389 /* handle any USB 3.0 xHCI controller */
390 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
391 .driver_data = (unsigned long) &xhci_pci_hc_driver,
392 },
393 { /* end: all zeroes */ }
394};
395MODULE_DEVICE_TABLE(pci, pci_ids);
396
397/* pci driver glue; this is a "new style" PCI driver module */
398static struct pci_driver xhci_pci_driver = {
399 .name = (char *) hcd_name,
400 .id_table = pci_ids,
401
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800402 .probe = xhci_pci_probe,
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700403 .remove = xhci_pci_remove,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700404 /* suspend and resume implemented later */
405
406 .shutdown = usb_hcd_pci_shutdown,
Andiry Xu5535b1d2010-10-14 07:23:06 -0700407#ifdef CONFIG_PM_SLEEP
408 .driver = {
409 .pm = &usb_hcd_pci_pm_ops
410 },
411#endif
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700412};
413
Randy Dunlap326b4812010-04-19 08:53:50 -0700414int xhci_register_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700415{
416 return pci_register_driver(&xhci_pci_driver);
417}
418
Randy Dunlap326b4812010-04-19 08:53:50 -0700419void xhci_unregister_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700420{
421 pci_unregister_driver(&xhci_pci_driver);
422}