| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: isar.h,v 1.11.2.2 2004/01/12 22:52:27 keil Exp $ | 
 | 2 |  * | 
 | 3 |  * ISAR (Siemens PSB 7110) specific defines | 
 | 4 |  * | 
 | 5 |  * Author       Karsten Keil | 
 | 6 |  * Copyright    by Karsten Keil      <keil@isdn4linux.de> | 
 | 7 |  *  | 
 | 8 |  * This software may be used and distributed according to the terms | 
 | 9 |  * of the GNU General Public License, incorporated herein by reference. | 
 | 10 |  * | 
 | 11 |  */ | 
 | 12 |   | 
 | 13 | #define ISAR_IRQMSK	0x04 | 
 | 14 | #define ISAR_IRQSTA	0x04 | 
 | 15 | #define ISAR_IRQBIT	0x75 | 
 | 16 | #define ISAR_CTRL_H	0x61 | 
 | 17 | #define ISAR_CTRL_L	0x60 | 
 | 18 | #define ISAR_IIS	0x58 | 
 | 19 | #define ISAR_IIA	0x58 | 
 | 20 | #define ISAR_HIS	0x50 | 
 | 21 | #define ISAR_HIA	0x50 | 
 | 22 | #define ISAR_MBOX	0x4c | 
 | 23 | #define ISAR_WADR	0x4a | 
 | 24 | #define ISAR_RADR	0x48  | 
 | 25 |  | 
 | 26 | #define ISAR_HIS_VNR		0x14 | 
 | 27 | #define ISAR_HIS_DKEY		0x02 | 
 | 28 | #define ISAR_HIS_FIRM		0x1e | 
 | 29 | #define ISAR_HIS_STDSP		0x08 | 
 | 30 | #define ISAR_HIS_DIAG		0x05 | 
 | 31 | #define ISAR_HIS_WAITSTATE	0x27 | 
 | 32 | #define ISAR_HIS_TIMERIRQ	0x25 | 
 | 33 | #define ISAR_HIS_P0CFG		0x3c | 
 | 34 | #define ISAR_HIS_P12CFG		0x24 | 
 | 35 | #define ISAR_HIS_SARTCFG	0x25	 | 
 | 36 | #define ISAR_HIS_PUMPCFG	0x26	 | 
 | 37 | #define ISAR_HIS_PUMPCTRL	0x2a	 | 
 | 38 | #define ISAR_HIS_IOM2CFG	0x27 | 
 | 39 | #define ISAR_HIS_IOM2REQ	0x07 | 
 | 40 | #define ISAR_HIS_IOM2CTRL	0x2b | 
 | 41 | #define ISAR_HIS_BSTREQ		0x0c | 
 | 42 | #define ISAR_HIS_PSTREQ		0x0e | 
 | 43 | #define ISAR_HIS_SDATA		0x20 | 
 | 44 | #define ISAR_HIS_DPS1		0x40 | 
 | 45 | #define ISAR_HIS_DPS2		0x80 | 
 | 46 | #define SET_DPS(x)		((x<<6) & 0xc0) | 
 | 47 |  | 
 | 48 | #define ISAR_CMD_TIMERIRQ_OFF	0x20 | 
 | 49 | #define ISAR_CMD_TIMERIRQ_ON	0x21 | 
 | 50 |  | 
 | 51 |  | 
 | 52 | #define ISAR_IIS_MSCMSD		0x3f | 
 | 53 | #define ISAR_IIS_VNR		0x15 | 
 | 54 | #define ISAR_IIS_DKEY		0x03 | 
 | 55 | #define ISAR_IIS_FIRM		0x1f | 
 | 56 | #define ISAR_IIS_STDSP		0x09 | 
 | 57 | #define ISAR_IIS_DIAG		0x25 | 
 | 58 | #define ISAR_IIS_GSTEV		0x00 | 
 | 59 | #define ISAR_IIS_BSTEV		0x28 | 
 | 60 | #define ISAR_IIS_BSTRSP		0x2c | 
 | 61 | #define ISAR_IIS_PSTRSP		0x2e | 
 | 62 | #define ISAR_IIS_PSTEV		0x2a | 
 | 63 | #define ISAR_IIS_IOM2RSP	0x27 | 
 | 64 | #define ISAR_IIS_RDATA		0x20 | 
 | 65 | #define ISAR_IIS_INVMSG		0x3f | 
 | 66 |  | 
 | 67 | #define ISAR_CTRL_SWVER	0x10 | 
 | 68 | #define ISAR_CTRL_STST	0x40 | 
 | 69 |  | 
 | 70 | #define ISAR_MSG_HWVER	{0x20, 0, 1} | 
 | 71 |  | 
 | 72 | #define ISAR_DP1_USE	1 | 
 | 73 | #define ISAR_DP2_USE	2 | 
 | 74 | #define ISAR_RATE_REQ	3 | 
 | 75 |  | 
 | 76 | #define PMOD_DISABLE	0 | 
 | 77 | #define PMOD_FAX	1 | 
 | 78 | #define PMOD_DATAMODEM	2 | 
 | 79 | #define PMOD_HALFDUPLEX	3 | 
 | 80 | #define PMOD_V110	4 | 
 | 81 | #define PMOD_DTMF	5 | 
 | 82 | #define PMOD_DTMF_TRANS	6 | 
 | 83 | #define PMOD_BYPASS	7 | 
 | 84 |  | 
 | 85 | #define PCTRL_ORIG	0x80 | 
 | 86 | #define PV32P2_V23R	0x40 | 
 | 87 | #define PV32P2_V22A	0x20 | 
 | 88 | #define PV32P2_V22B	0x10 | 
 | 89 | #define PV32P2_V22C	0x08 | 
 | 90 | #define PV32P2_V21	0x02 | 
 | 91 | #define PV32P2_BEL	0x01 | 
 | 92 |  | 
 | 93 | // LSB MSB in ISAR doc wrong !!! Arghhh | 
 | 94 | #define PV32P3_AMOD	0x80 | 
 | 95 | #define PV32P3_V32B	0x02 | 
 | 96 | #define PV32P3_V23B	0x01 | 
 | 97 | #define PV32P4_48	0x11 | 
 | 98 | #define PV32P5_48	0x05 | 
 | 99 | #define PV32P4_UT48	0x11 | 
 | 100 | #define PV32P5_UT48	0x0d | 
 | 101 | #define PV32P4_96	0x11 | 
 | 102 | #define PV32P5_96	0x03 | 
 | 103 | #define PV32P4_UT96	0x11 | 
 | 104 | #define PV32P5_UT96	0x0f | 
 | 105 | #define PV32P4_B96	0x91 | 
 | 106 | #define PV32P5_B96	0x0b | 
 | 107 | #define PV32P4_UTB96	0xd1 | 
 | 108 | #define PV32P5_UTB96	0x0f | 
 | 109 | #define PV32P4_120	0xb1 | 
 | 110 | #define PV32P5_120	0x09 | 
 | 111 | #define PV32P4_UT120	0xf1 | 
 | 112 | #define PV32P5_UT120	0x0f | 
 | 113 | #define PV32P4_144	0x99 | 
 | 114 | #define PV32P5_144	0x09 | 
 | 115 | #define PV32P4_UT144	0xf9 | 
 | 116 | #define PV32P5_UT144	0x0f | 
 | 117 | #define PV32P6_CTN	0x01 | 
 | 118 | #define PV32P6_ATN	0x02 | 
 | 119 |  | 
 | 120 | #define PFAXP2_CTN	0x01 | 
 | 121 | #define PFAXP2_ATN	0x04 | 
 | 122 |  | 
 | 123 | #define PSEV_10MS_TIMER	0x02 | 
 | 124 | #define PSEV_CON_ON	0x18 | 
 | 125 | #define PSEV_CON_OFF	0x19 | 
 | 126 | #define PSEV_V24_OFF	0x20 | 
 | 127 | #define PSEV_CTS_ON	0x21 | 
 | 128 | #define PSEV_CTS_OFF	0x22 | 
 | 129 | #define PSEV_DCD_ON	0x23 | 
 | 130 | #define PSEV_DCD_OFF	0x24 | 
 | 131 | #define PSEV_DSR_ON	0x25 | 
 | 132 | #define PSEV_DSR_OFF	0x26 | 
 | 133 | #define PSEV_REM_RET	0xcc | 
 | 134 | #define PSEV_REM_REN	0xcd | 
 | 135 | #define PSEV_GSTN_CLR	0xd4 | 
 | 136 |  | 
 | 137 | #define PSEV_RSP_READY	0xbc | 
 | 138 | #define PSEV_LINE_TX_H	0xb3 | 
 | 139 | #define PSEV_LINE_TX_B	0xb2 | 
 | 140 | #define PSEV_LINE_RX_H	0xb1 | 
 | 141 | #define PSEV_LINE_RX_B	0xb0 | 
 | 142 | #define PSEV_RSP_CONN	0xb5 | 
 | 143 | #define PSEV_RSP_DISC	0xb7 | 
 | 144 | #define PSEV_RSP_FCERR	0xb9 | 
 | 145 | #define PSEV_RSP_SILDET	0xbe | 
 | 146 | #define PSEV_RSP_SILOFF	0xab | 
 | 147 | #define PSEV_FLAGS_DET	0xba | 
 | 148 |  | 
 | 149 | #define PCTRL_CMD_FTH	0xa7 | 
 | 150 | #define PCTRL_CMD_FRH	0xa5 | 
 | 151 | #define PCTRL_CMD_FTM	0xa8 | 
 | 152 | #define PCTRL_CMD_FRM	0xa6 | 
 | 153 | #define PCTRL_CMD_SILON	0xac | 
 | 154 | #define PCTRL_CMD_CONT	0xa2 | 
 | 155 | #define PCTRL_CMD_ESC	0xa4 | 
 | 156 | #define PCTRL_CMD_SILOFF 0xab | 
 | 157 | #define PCTRL_CMD_HALT	0xa9 | 
 | 158 |  | 
 | 159 | #define PCTRL_LOC_RET	0xcf | 
 | 160 | #define PCTRL_LOC_REN	0xce | 
 | 161 |  | 
 | 162 | #define SMODE_DISABLE	0 | 
 | 163 | #define SMODE_V14	2 | 
 | 164 | #define SMODE_HDLC	3 | 
 | 165 | #define SMODE_BINARY	4 | 
 | 166 | #define SMODE_FSK_V14	5 | 
 | 167 |  | 
 | 168 | #define SCTRL_HDMC_BOTH	0x00 | 
 | 169 | #define SCTRL_HDMC_DTX	0x80 | 
 | 170 | #define SCTRL_HDMC_DRX	0x40 | 
 | 171 | #define S_P1_OVSP	0x40 | 
 | 172 | #define S_P1_SNP	0x20 | 
 | 173 | #define S_P1_EOP	0x10 | 
 | 174 | #define S_P1_EDP	0x08 | 
 | 175 | #define S_P1_NSB	0x04 | 
 | 176 | #define S_P1_CHS_8	0x03 | 
 | 177 | #define S_P1_CHS_7	0x02 | 
 | 178 | #define S_P1_CHS_6	0x01 | 
 | 179 | #define S_P1_CHS_5	0x00 | 
 | 180 |  | 
 | 181 | #define S_P2_BFT_DEF	0x10 | 
 | 182 |  | 
 | 183 | #define IOM_CTRL_ENA	0x80 | 
 | 184 | #define IOM_CTRL_NOPCM	0x00 | 
 | 185 | #define IOM_CTRL_ALAW	0x02 | 
 | 186 | #define IOM_CTRL_ULAW	0x04 | 
 | 187 | #define IOM_CTRL_RCV	0x01 | 
 | 188 |  | 
 | 189 | #define IOM_P1_TXD	0x10 | 
 | 190 |  | 
 | 191 | #define HDLC_FED	0x40 | 
 | 192 | #define HDLC_FSD	0x20 | 
 | 193 | #define HDLC_FST	0x20 | 
 | 194 | #define HDLC_ERROR	0x1c | 
 | 195 | #define HDLC_ERR_FAD	0x10 | 
 | 196 | #define HDLC_ERR_RER	0x08 | 
 | 197 | #define HDLC_ERR_CER	0x04 | 
 | 198 | #define SART_NMD	0x01 | 
 | 199 |  | 
 | 200 | #define BSTAT_RDM0	0x1 | 
 | 201 | #define BSTAT_RDM1	0x2 | 
 | 202 | #define BSTAT_RDM2	0x4 | 
 | 203 | #define BSTAT_RDM3	0x8 | 
 | 204 | #define BSTEV_TBO	0x1f | 
 | 205 | #define BSTEV_RBO	0x2f | 
 | 206 |  | 
 | 207 | /* FAX State Machine */ | 
 | 208 | #define STFAX_NULL	0 | 
 | 209 | #define STFAX_READY	1 | 
 | 210 | #define STFAX_LINE	2 | 
 | 211 | #define STFAX_CONT	3 | 
 | 212 | #define STFAX_ACTIV	4 | 
 | 213 | #define STFAX_ESCAPE	5 | 
 | 214 | #define STFAX_SILDET	6 | 
 | 215 |  | 
 | 216 | #define ISDN_FAXPUMP_HALT	100 | 
 | 217 |  | 
 | 218 | extern int ISARVersion(struct IsdnCardState *cs, char *s); | 
 | 219 | extern void isar_int_main(struct IsdnCardState *cs); | 
 | 220 | extern void initisar(struct IsdnCardState *cs); | 
 | 221 | extern void isar_fill_fifo(struct BCState *bcs); | 
 | 222 | extern int isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic); |