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Peter Ujfalusia53b8e32011-06-04 08:16:41 +03001/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030026#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030028
29#include <plat/i2c.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030030#include <plat/usb.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030031
32#include "twl-common.h"
Kevin Hilman46232a32011-11-23 14:43:01 -080033#include "pm.h"
Tero Kristo49c008e2012-02-20 12:26:08 +020034#include "voltage.h"
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030035
36static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .addr = 0x48,
38 .flags = I2C_CLIENT_WAKE,
39};
40
Tero Kristo49c008e2012-02-20 12:26:08 +020041static int twl_set_voltage(void *data, int target_uV)
42{
43 struct voltagedomain *voltdm = (struct voltagedomain *)data;
44 return voltdm_scale(voltdm, target_uV);
45}
46
47static int twl_get_voltage(void *data)
48{
49 struct voltagedomain *voltdm = (struct voltagedomain *)data;
50 return voltdm_get_voltage(voltdm);
51}
52
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030053void __init omap_pmic_init(int bus, u32 clkrate,
54 const char *pmic_type, int pmic_irq,
55 struct twl4030_platform_data *pmic_data)
56{
57 strncpy(pmic_i2c_board_info.type, pmic_type,
58 sizeof(pmic_i2c_board_info.type));
59 pmic_i2c_board_info.irq = pmic_irq;
60 pmic_i2c_board_info.platform_data = pmic_data;
61
62 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
63}
Peter Ujfalusib22f9542011-06-07 10:26:46 +030064
Kevin Hilman46232a32011-11-23 14:43:01 -080065void __init omap_pmic_late_init(void)
66{
67 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
68 if (!pmic_i2c_board_info.irq)
69 return;
70
71 omap3_twl_init();
72 omap4_twl_init();
73}
74
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +030075#if defined(CONFIG_ARCH_OMAP3)
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030076static struct twl4030_usb_data omap3_usb_pdata = {
77 .usb_mode = T2_USB_MODE_ULPI,
78};
79
80static int omap3_batt_table[] = {
81/* 0 C */
8230800, 29500, 28300, 27100,
8326000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
8417200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
8511600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
868020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
875640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
884040, 3910, 3790, 3670, 3550
89};
90
91static struct twl4030_bci_platform_data omap3_bci_pdata = {
92 .battery_tmp_tbl = omap3_batt_table,
93 .tblsize = ARRAY_SIZE(omap3_batt_table),
94};
95
96static struct twl4030_madc_platform_data omap3_madc_pdata = {
97 .irq_line = 1,
98};
99
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300100static struct twl4030_codec_data omap3_codec;
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300101
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300102static struct twl4030_audio_data omap3_audio_pdata = {
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300103 .audio_mclk = 26000000,
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300104 .codec = &omap3_codec,
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300105};
106
Peter Ujfalusib252b0e2011-06-07 11:38:24 +0300107static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
108 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
109};
110
111static struct regulator_init_data omap3_vdac_idata = {
112 .constraints = {
113 .min_uV = 1800000,
114 .max_uV = 1800000,
115 .valid_modes_mask = REGULATOR_MODE_NORMAL
116 | REGULATOR_MODE_STANDBY,
117 .valid_ops_mask = REGULATOR_CHANGE_MODE
118 | REGULATOR_CHANGE_STATUS,
119 },
120 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
121 .consumer_supplies = omap3_vdda_dac_supplies,
122};
123
124static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
125 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
Tomi Valkeinen7c68dd92011-08-03 14:00:57 +0300126 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
Peter Ujfalusib252b0e2011-06-07 11:38:24 +0300127};
128
129static struct regulator_init_data omap3_vpll2_idata = {
130 .constraints = {
131 .min_uV = 1800000,
132 .max_uV = 1800000,
133 .valid_modes_mask = REGULATOR_MODE_NORMAL
134 | REGULATOR_MODE_STANDBY,
135 .valid_ops_mask = REGULATOR_CHANGE_MODE
136 | REGULATOR_CHANGE_STATUS,
137 },
138 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
139 .consumer_supplies = omap3_vpll2_supplies,
140};
141
Tero Kristo23e22a52012-02-20 12:26:07 +0200142static struct regulator_consumer_supply omap3_vdd1_supply[] = {
143 REGULATOR_SUPPLY("vcc", "mpu.0"),
144};
145
146static struct regulator_consumer_supply omap3_vdd2_supply[] = {
147 REGULATOR_SUPPLY("vcc", "l3_main.0"),
148};
149
150static struct regulator_init_data omap3_vdd1 = {
151 .constraints = {
152 .name = "vdd_mpu_iva",
153 .min_uV = 600000,
154 .max_uV = 1450000,
155 .valid_modes_mask = REGULATOR_MODE_NORMAL,
156 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
157 },
158 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
159 .consumer_supplies = omap3_vdd1_supply,
160};
161
162static struct regulator_init_data omap3_vdd2 = {
163 .constraints = {
164 .name = "vdd_core",
165 .min_uV = 600000,
166 .max_uV = 1450000,
167 .valid_modes_mask = REGULATOR_MODE_NORMAL,
168 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
169 },
170 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
171 .consumer_supplies = omap3_vdd2_supply,
172};
173
Tero Kristo49c008e2012-02-20 12:26:08 +0200174static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
175 .get_voltage = twl_get_voltage,
176 .set_voltage = twl_set_voltage,
177};
178
179static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
180 .get_voltage = twl_get_voltage,
181 .set_voltage = twl_set_voltage,
182};
183
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300184void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
185 u32 pdata_flags, u32 regulators_flags)
186{
187 if (!pmic_data->irq_base)
188 pmic_data->irq_base = TWL4030_IRQ_BASE;
189 if (!pmic_data->irq_end)
190 pmic_data->irq_end = TWL4030_IRQ_END;
Tero Kristo49c008e2012-02-20 12:26:08 +0200191 if (!pmic_data->vdd1) {
192 omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
193 omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
Tero Kristo23e22a52012-02-20 12:26:07 +0200194 pmic_data->vdd1 = &omap3_vdd1;
Tero Kristo49c008e2012-02-20 12:26:08 +0200195 }
196 if (!pmic_data->vdd2) {
197 omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
198 omap3_vdd2_drvdata.data = voltdm_lookup("core");
Tero Kristo23e22a52012-02-20 12:26:07 +0200199 pmic_data->vdd2 = &omap3_vdd2;
Tero Kristo49c008e2012-02-20 12:26:08 +0200200 }
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300201
202 /* Common platform data configurations */
203 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
204 pmic_data->usb = &omap3_usb_pdata;
205
206 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
207 pmic_data->bci = &omap3_bci_pdata;
208
209 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
210 pmic_data->madc = &omap3_madc_pdata;
211
212 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
213 pmic_data->audio = &omap3_audio_pdata;
214
215 /* Common regulator configurations */
216 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
217 pmic_data->vdac = &omap3_vdac_idata;
218
219 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
220 pmic_data->vpll2 = &omap3_vpll2_idata;
221}
222#endif /* CONFIG_ARCH_OMAP3 */
223
224#if defined(CONFIG_ARCH_OMAP4)
225static struct twl4030_usb_data omap4_usb_pdata = {
226 .phy_init = omap4430_phy_init,
227 .phy_exit = omap4430_phy_exit,
228 .phy_power = omap4430_phy_power,
229 .phy_set_clock = omap4430_phy_set_clk,
230 .phy_suspend = omap4430_phy_suspend,
231};
232
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300233static struct regulator_init_data omap4_vdac_idata = {
234 .constraints = {
235 .min_uV = 1800000,
236 .max_uV = 1800000,
237 .valid_modes_mask = REGULATOR_MODE_NORMAL
238 | REGULATOR_MODE_STANDBY,
239 .valid_ops_mask = REGULATOR_CHANGE_MODE
240 | REGULATOR_CHANGE_STATUS,
241 },
242};
243
244static struct regulator_init_data omap4_vaux2_idata = {
245 .constraints = {
246 .min_uV = 1200000,
247 .max_uV = 2800000,
248 .apply_uV = true,
249 .valid_modes_mask = REGULATOR_MODE_NORMAL
250 | REGULATOR_MODE_STANDBY,
251 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
252 | REGULATOR_CHANGE_MODE
253 | REGULATOR_CHANGE_STATUS,
254 },
255};
256
257static struct regulator_init_data omap4_vaux3_idata = {
258 .constraints = {
259 .min_uV = 1000000,
260 .max_uV = 3000000,
261 .apply_uV = true,
262 .valid_modes_mask = REGULATOR_MODE_NORMAL
263 | REGULATOR_MODE_STANDBY,
264 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
265 | REGULATOR_CHANGE_MODE
266 | REGULATOR_CHANGE_STATUS,
267 },
268};
269
270static struct regulator_consumer_supply omap4_vmmc_supply[] = {
271 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
272};
273
274/* VMMC1 for MMC1 card */
275static struct regulator_init_data omap4_vmmc_idata = {
276 .constraints = {
277 .min_uV = 1200000,
278 .max_uV = 3000000,
279 .apply_uV = true,
280 .valid_modes_mask = REGULATOR_MODE_NORMAL
281 | REGULATOR_MODE_STANDBY,
282 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
283 | REGULATOR_CHANGE_MODE
284 | REGULATOR_CHANGE_STATUS,
285 },
286 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
287 .consumer_supplies = omap4_vmmc_supply,
288};
289
290static struct regulator_init_data omap4_vpp_idata = {
291 .constraints = {
292 .min_uV = 1800000,
293 .max_uV = 2500000,
294 .apply_uV = true,
295 .valid_modes_mask = REGULATOR_MODE_NORMAL
296 | REGULATOR_MODE_STANDBY,
297 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
298 | REGULATOR_CHANGE_MODE
299 | REGULATOR_CHANGE_STATUS,
300 },
301};
302
303static struct regulator_init_data omap4_vana_idata = {
304 .constraints = {
305 .min_uV = 2100000,
306 .max_uV = 2100000,
307 .valid_modes_mask = REGULATOR_MODE_NORMAL
308 | REGULATOR_MODE_STANDBY,
309 .valid_ops_mask = REGULATOR_CHANGE_MODE
310 | REGULATOR_CHANGE_STATUS,
311 },
312};
313
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300314static struct regulator_consumer_supply omap4_vcxio_supply[] = {
315 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
316 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
317 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
318};
319
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300320static struct regulator_init_data omap4_vcxio_idata = {
321 .constraints = {
322 .min_uV = 1800000,
323 .max_uV = 1800000,
324 .valid_modes_mask = REGULATOR_MODE_NORMAL
325 | REGULATOR_MODE_STANDBY,
326 .valid_ops_mask = REGULATOR_CHANGE_MODE
327 | REGULATOR_CHANGE_STATUS,
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300328 .always_on = true,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300329 },
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300330 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
331 .consumer_supplies = omap4_vcxio_supply,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300332};
333
334static struct regulator_init_data omap4_vusb_idata = {
335 .constraints = {
336 .min_uV = 3300000,
337 .max_uV = 3300000,
338 .apply_uV = true,
339 .valid_modes_mask = REGULATOR_MODE_NORMAL
340 | REGULATOR_MODE_STANDBY,
341 .valid_ops_mask = REGULATOR_CHANGE_MODE
342 | REGULATOR_CHANGE_STATUS,
343 },
344};
345
346static struct regulator_init_data omap4_clk32kg_idata = {
347 .constraints = {
348 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
349 },
350};
351
Tero Kristoe160dda2012-02-22 12:40:40 +0200352static struct regulator_consumer_supply omap4_vdd1_supply[] = {
353 REGULATOR_SUPPLY("vcc", "mpu.0"),
354};
355
356static struct regulator_consumer_supply omap4_vdd2_supply[] = {
357 REGULATOR_SUPPLY("vcc", "iva.0"),
358};
359
360static struct regulator_consumer_supply omap4_vdd3_supply[] = {
361 REGULATOR_SUPPLY("vcc", "l3_main.0"),
362};
363
364static struct regulator_init_data omap4_vdd1 = {
365 .constraints = {
366 .name = "vdd_mpu",
367 .min_uV = 500000,
368 .max_uV = 1500000,
369 .valid_modes_mask = REGULATOR_MODE_NORMAL,
370 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
371 },
372 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
373 .consumer_supplies = omap4_vdd1_supply,
374};
375
376static struct regulator_init_data omap4_vdd2 = {
377 .constraints = {
378 .name = "vdd_iva",
379 .min_uV = 500000,
380 .max_uV = 1500000,
381 .valid_modes_mask = REGULATOR_MODE_NORMAL,
382 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
383 },
384 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
385 .consumer_supplies = omap4_vdd2_supply,
386};
387
388static struct regulator_init_data omap4_vdd3 = {
389 .constraints = {
390 .name = "vdd_core",
391 .min_uV = 500000,
392 .max_uV = 1500000,
393 .valid_modes_mask = REGULATOR_MODE_NORMAL,
394 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
395 },
396 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
397 .consumer_supplies = omap4_vdd3_supply,
398};
399
400
401static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
402 .get_voltage = twl_get_voltage,
403 .set_voltage = twl_set_voltage,
404};
405
406static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
407 .get_voltage = twl_get_voltage,
408 .set_voltage = twl_set_voltage,
409};
410
411static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
412 .get_voltage = twl_get_voltage,
413 .set_voltage = twl_set_voltage,
414};
415
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300416void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
417 u32 pdata_flags, u32 regulators_flags)
418{
419 if (!pmic_data->irq_base)
420 pmic_data->irq_base = TWL6030_IRQ_BASE;
421 if (!pmic_data->irq_end)
422 pmic_data->irq_end = TWL6030_IRQ_END;
423
Tero Kristoe160dda2012-02-22 12:40:40 +0200424 if (!pmic_data->vdd1) {
425 omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
426 omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
427 pmic_data->vdd1 = &omap4_vdd1;
428 }
429
430 if (!pmic_data->vdd2) {
431 omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
432 omap4_vdd2_drvdata.data = voltdm_lookup("iva");
433 pmic_data->vdd2 = &omap4_vdd2;
434 }
435
436 if (!pmic_data->vdd3) {
437 omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
438 omap4_vdd3_drvdata.data = voltdm_lookup("core");
439 pmic_data->vdd3 = &omap4_vdd3;
440 }
441
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300442 /* Common platform data configurations */
443 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
444 pmic_data->usb = &omap4_usb_pdata;
445
446 /* Common regulator configurations */
447 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
448 pmic_data->vdac = &omap4_vdac_idata;
449
450 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
451 pmic_data->vaux2 = &omap4_vaux2_idata;
452
453 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
454 pmic_data->vaux3 = &omap4_vaux3_idata;
455
456 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
457 pmic_data->vmmc = &omap4_vmmc_idata;
458
459 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
460 pmic_data->vpp = &omap4_vpp_idata;
461
462 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
463 pmic_data->vana = &omap4_vana_idata;
464
465 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
466 pmic_data->vcxio = &omap4_vcxio_idata;
467
468 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
469 pmic_data->vusb = &omap4_vusb_idata;
470
471 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
472 !pmic_data->clk32kg)
473 pmic_data->clk32kg = &omap4_clk32kg_idata;
474}
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300475#endif /* CONFIG_ARCH_OMAP4 */