| David S. Miller | e1c21c4 | 2006-02-04 03:12:14 -0800 | [diff] [blame] | 1 | #ifndef _SPARC64_INTR_QUEUE_H |
| 2 | #define _SPARC64_INTR_QUEUE_H |
| 3 | |
| 4 | /* Sun4v interrupt queue registers, accessed via ASI_QUEUE. */ |
| 5 | |
| 6 | #define INTRQ_CPU_MONDO_HEAD 0x3c0 /* CPU mondo head */ |
| 7 | #define INTRQ_CPU_MONDO_TAIL 0x3c8 /* CPU mondo tail */ |
| 8 | #define INTRQ_DEVICE_MONDO_HEAD 0x3d0 /* Device mondo head */ |
| 9 | #define INTRQ_DEVICE_MONDO_TAIL 0x3d8 /* Device mondo tail */ |
| 10 | #define INTRQ_RESUM_MONDO_HEAD 0x3e0 /* Resumable error mondo head */ |
| 11 | #define INTRQ_RESUM_MONDO_TAIL 0x3e8 /* Resumable error mondo tail */ |
| 12 | #define INTRQ_NONRESUM_MONDO_HEAD 0x3f0 /* Non-resumable error mondo head */ |
| 13 | #define INTRQ_NONRESUM_MONDO_TAIL 0x3f8 /* Non-resumable error mondo head */ |
| 14 | |
| 15 | #endif /* !(_SPARC64_INTR_QUEUE_H) */ |