blob: 3dec962b0770aa9f088829da920c76a44a9d4113 [file] [log] [blame]
Shawn Guo69c31b72011-09-06 14:59:40 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/errno.h>
14#include <asm/cacheflush.h>
Shawn Guo602bf402012-05-22 22:13:46 +080015#include <asm/cp15.h>
Shawn Guoe3372472012-09-13 21:01:00 +080016
17#include "common.h"
Shawn Guo69c31b72011-09-06 14:59:40 +080018
Shawn Guo602bf402012-05-22 22:13:46 +080019static inline void cpu_enter_lowpower(void)
20{
21 unsigned int v;
22
23 flush_cache_all();
24 asm volatile(
25 "mcr p15, 0, %1, c7, c5, 0\n"
26 " mcr p15, 0, %1, c7, c10, 4\n"
27 /*
28 * Turn off coherency
29 */
30 " mrc p15, 0, %0, c1, c0, 1\n"
31 " bic %0, %0, %3\n"
32 " mcr p15, 0, %0, c1, c0, 1\n"
33 " mrc p15, 0, %0, c1, c0, 0\n"
34 " bic %0, %0, %2\n"
35 " mcr p15, 0, %0, c1, c0, 0\n"
36 : "=&r" (v)
37 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
38 : "cc");
39}
40
Shawn Guo69c31b72011-09-06 14:59:40 +080041/*
42 * platform-specific code to shutdown a CPU
43 *
44 * Called with IRQs disabled
45 */
Marc Zyngiere4f2d972011-09-08 13:15:22 +010046void imx_cpu_die(unsigned int cpu)
Shawn Guo69c31b72011-09-06 14:59:40 +080047{
Shawn Guo602bf402012-05-22 22:13:46 +080048 cpu_enter_lowpower();
Shawn Guo69c31b72011-09-06 14:59:40 +080049 imx_enable_cpu(cpu, false);
Shawn Guo69c31b72011-09-06 14:59:40 +080050
Shawn Guoc944b0b2012-08-18 14:27:32 +080051 /* spin here until hardware takes it down */
52 while (1)
53 ;
Shawn Guo69c31b72011-09-06 14:59:40 +080054}